CN1571503A - A video playback system that can generate progressive scan and interlaced video signals together - Google Patents

Abstract

An image playing system comprises a main picture processor, an interlaced signal reconstruction module and a video coding module. The main picture processor generates a corresponding line-by-line main picture signal according to the image signal transmitted from the image memory. The progressive main picture signal can be processed by a predetermined image processing program to generate a progressive format signal. The interlaced signal reconstruction module can receive the progressive format signal and selectively store the progressive format signal by using a temporary storage mode of odd-even interleaving so as to obtain the interlaced format signal. The video coding module can code the progressive format signal and the interlaced format signal into the progressive video signal and the interlaced video signal according to the video specification of the image display device. Therefore, the image playing system can provide the progressive video signal and the interlaced video signal to the corresponding image display device together for image display.

Description

A video playback system capable of generating both progressive and interlaced video signals

technical field

The invention relates to an image playing system capable of generating progressive scan and interlaced scan video signals together.

Background technique

Known dynamic images are continuously played one by one, utilizing the persistence of vision of the human eye to generate the effect of dynamic images. The playback of each screen starts from the upper left of the screen, draws a horizontal line horizontally to the right, and then starts the next horizontal line. This is the "scanning line". For example, in the known NTSC standard, 525 scanning lines constitute a screen, and the effective scanning number of the screen is 483 lines.

When an image display device such as a TV, a projector, or a computer screen plays an image, it can usually be divided into two scanning methods, one is an interlace scan technology, and the other is a progressive scan (progressive scan) technology. technology. Interlaced scanning technology has been developed for a long time, and it is also the most commonly used. At present, most TVs on the market play images in an interlaced scanning manner. However, in recent years, the demand for displaying images by progressive scanning is increasing day by day, so some display devices are also designed to display images by progressive scanning.

Interlaced scanning means that after the first line is scanned, the next step is not to scan the second line, but to scan in the order of the 3rd, 5th, and 7th lines until the 525th line to complete the first line. A picture is called a field. Then go back to the second line and scan in the order of the 4th, 6th, and 8th lines to complete the second field. Therefore, the seemingly smooth picture obtained by interlaced scanning is actually composed of odd and even interlaced scanning.

Progressive scanning is twice the scanning speed of interlaced scanning, in the order of the 1st, 2nd, 3rd,,, 524, 525th lines, and scans progressively. A progressive scan picture is called a frame, and therefore it is more detailed than an interlaced scan picture, but the data volume of a progressive scan video signal is usually more than twice that of an interlaced scan video signal.

Please refer to FIG. 1 , which is a block diagram of a known video playing system 10 . The known video playback system 10 is usually designed in a single chip. A known video playback system 10 performs video processing on a video signal 22 input from an external video memory 20 to output an interlaced video signal 11 that can be played by a display device. The image playback system 10 includes an interlaced frame processor 12 and a video encoder 14 . The interlaced format image processor 12 reads the image signal 22 from the image memory 20 in a manner consistent with interlaced scanning, and transmits it to the video encoder 14 for low-pass filtering, brightness adjustment, chroma adjustment, and contrast adjustment etc. to facilitate image adjustment processing, and encode the interlaced format signal into an interlaced video signal 11 conforming to the video standard of the image display device.

Please refer to FIG. 2 . FIG. 2 is a schematic diagram of converting the interlaced video signal 11 of FIG. 1 into a progressive video signal 31 . In order to make a display device capable of progressive scanning display images in a progressive scanning manner, the input video signal must be a corresponding progressive video signal 31 . In the known video playback system 10, the method for converting the interlaced video signal 11 into a progressive video signal 31 is to use an interlaced progressive conversion integrated circuit 13 arranged outside the video playback system 10 to convert the adjacent interlaced video signals 11 A scan line signal is added between two scan line signals by means of interpolation or simulation, that is, the field signal is converted into a frame signal by means of interpolation or simulation. In this way, the interlaced video can be The signal 11 is converted into a progressive video signal 31 . Since the interlaced progressive conversion circuit 13 needs to be designed on another chip outside the image playback system 10, the manufacturing cost is quite high, so this method is limited by the cost in practical application.

Please refer to FIG. 3 . FIG. 3 is a block diagram of another known video playback system 30 for generating a progressive video signal 31 . A known video playback system 30 is used to generate a progressive video signal 31 . The known image playing system 30 can also be designed on a single chip.

In addition to having the same functions as the corresponding video playback system 10 , this known video playback system 30 can further perform video processing conforming to progressive scanning according to the video signal 22 . This is because the image processor 32 has a built-in interpolation or emulation function, which can generate frame signals conforming to progressive scanning when the image signal 22 is read. In addition, the video encoder 34 can further encode the signal from the frame processor 32 into a progressive video signal 31 conforming to the video standard of the image display device.

Please refer to FIG. 4 . FIG. 4 is a block diagram of the video playback system 30 in FIG. 3 for generating the interlaced video signal 11 . It is worth mentioning that the video playback system 30 has the same function as the video playback system 10 , and can also output the interlaced video signal 11 independently. When the video playback system 30 is used to generate the interlaced video signal 11, the frame processor 32 reads the video signal 22 in the same manner as the frame processor 12 of FIG. 1 without interpolation or emulation. In other words, the picture processor 12 of the video playback system 30 has two modes: progressive mode and interlaced mode, so the video playback system 30 can output the progressive video signal 31 or the interlaced video signal 11 according to the requirements. .

Comparing the embodiment of the image playback system 30 in FIG. 3 and FIG. 4 with the embodiment of the image playback system 10 in FIG. 2, it can be seen that when the progressive scanning video signal 31 needs to be formed, the image playback system 30 does not need to use an external interlaced progressive conversion circuit. 13, thus reducing the manufacturing cost, but the image playback system 30 can only selectively play the progressive scan video signal 31 or the interlaced scan video signal 11, but cannot play both together.

Contents of the invention

The purpose of the present invention is to provide a simple and cost-effective image playback system with a single chip design, and can output both progressive scan and interlaced video together for use by various image display devices such as televisions and projectors. .

The present invention is a video playback system used for simultaneously generating a progressive video signal and an interlaced video signal to at least one image display device. The image playback system includes a main picture processor, an interlaced signal generating module and a video encoding module, wherein the interlaced signal generating module includes a luminance (luminance) column register, at least one chroma (chroma) (chroma) column register, and a Control circuit. The main picture processor (main picture processor) generates corresponding progressive main picture signals according to the video signals transmitted from the video memory (memory). The progressive main picture signal can be subsequently processed through a predetermined image processing procedure to generate a progressive signal stream. The interlaced signal generating module can receive the progressive signal stream, and selectively store the progressive signal stream into the column buffer by using a parity interleaved temporary storage method, so as to reconstruct an interlaced signal stream. The video coding module can encode the progressive signal stream and the interlaced signal stream respectively into the progressive video signal and the interlaced video signal conforming to the video standard of the image display device according to the video standard of the image display device. Therefore, the image playing system can output the progressive video signal and the interlaced video signal together, so that the corresponding image display device can display the image.

The present invention adds an interlaced signal generation module to the known single-chip video playback system architecture, so that the video playback system of the present invention can still output progressive output together without using an external circuit The purpose of scanning and interlacing video signals. Because the use of external circuits is avoided, the invention can greatly reduce the manufacturing cost. The video playback device adopting the video playback system of the present invention, such as: digital laser video disc player (DVD Player), can output progressive scanning video signal and interlaced scanning video signal simultaneously in the most cost-effective manner, so when the digital laser video disc player needs At the same time, connect a first image display device (such as a TV) that only accepts interlaced video signals, and a second video display device that accepts progressive video signals (such as a projector, or a high-end TV) ), the two image display devices can simultaneously exert their maximum performance.

The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the accompanying drawings.

Description of drawings

FIG. 1 is a schematic diagram of a known video playback system 10;

FIG. 2 is a schematic diagram of a device for forming a progressive video signal 31 from the interlaced video signal 11 of FIG. 1;

FIG. 3 is a schematic diagram of a known video playback system 30;

FIG. 4 is a schematic diagram of the known video playback system 30 in FIG. 3 for generating an interlaced video signal 11;

FIG. 5 is a schematic diagram of an image playing system 50 of the present invention;

FIG. 6 is a schematic diagram of the video playback system 50 in FIG. 5 outputting the interlaced video signal 11 alone;

FIG. 7 is a schematic diagram of an image playing system 90 according to another embodiment of the present invention;

FIG. 8 is a schematic diagram of a parity interleaved temporary storage method used by the interlaced signal reconstruction module 60 of FIG. 5 .

FIG. 9 is a schematic diagram of the interlaced signal reconstruction module 60 of the present invention; and

FIG. 10 is a schematic diagram of an external progressive signal stream 86 used by the video playback system 50 of FIG. 5 .

Explanation of reference numbers

10, 30: Known video playback system 11: Interlaced video signal

13: Interlaced progressive conversion circuit 14, 34: Video encoder

20: Image memory 22: Image signal

32: Picture processor 50, 90: Video playback system

52: Main picture processor 54: Auxiliary picture processor

56: Mixer 58, 96, 98: Pre-processor

60, 92: interlaced signal generation module 61: brightness column buffer

62: Video encoding module 63: Progressive video encoding module

64: Interlaced video coding module 65: First chroma column buffer

66: Sub-picture decoder 67: Second chroma column buffer

68: Visual control display menu processor 69: Control circuit

72: Low-pass filter 74: Brightness adjuster

76: Chromaticity Adjuster 78: Contrast Adjuster

80: Progressive main picture signal 81: Interlaced main picture signal

82: Progressive sub-picture signal 83: Interlaced sub-picture signal

84: Progressive OSD signal 85: Interlaced OSD signal

86, 93: Progressive signal flow 88, 94: Interlaced signal flow

96: Progressive interlaced video signal symbiosis device

Detailed ways

Please refer to FIG. 5 , which is a block diagram of an image playing system 50 of the present invention. The video playback system 50 includes a main picture processor 52 , an auxiliary picture processor 54 , a mixer 56 , a pre-processor 58 , an interlaced signal generation module 60 and a video encoding module 62 . The auxiliary picture processor 54 includes a sub picture decoder 66 and a video control display menu processor 68 . The front-end processor 58 includes a low-pass filter 72 , a brightness adjuster 74 , a hue adjuster 76 and a contrast adjuster 78 .

The image playing system 50 is used for generating a progressive video signal 31 and an interlaced video signal 11 together to at least one image display device for image display.

As shown in FIG. 5 , the main picture processor 52 can generate a corresponding progressive main picture signal 80 according to the video signal 22 transmitted from the video memory 20 . If the video signal 20 is an interlaced form, the main picture processor 52 performs interpolation or simulation between adjacent scanning lines on the video signal 22 to generate a progressive main picture signal 80 . If the video signal 20 is in a progressive format, the interpolation or emulation process is not needed, and the main picture processor 52 can generate a progressive main picture signal 80 . The progressive main picture signal 80 includes video data of the main picture to be played. The progressive main picture signal 80 undergoes a predetermined image processing procedure to generate a progressive signal stream 86 .

The predetermined image processing procedure is performed through the auxiliary picture processor 54 , the mixer 56 and the pre-processing circuit 58 .

The auxiliary picture processor 54 includes a sub-picture (Sub-picture) decoder 66 and an On Screen Display (OSD) processor 68 . The sub-picture decoder 66 decodes the corresponding progressive sub-picture signal 82 according to the video signal 22 . The video control display menu processor 68 generates a corresponding progressive OSD signal 84 according to the image signal 22 . The progressive sub-picture signal 82 includes video data of sub-pictures (such as subtitles, trademarks, ,, etc.) that can be superimposed on the main picture. The progressive OSD signal 84 includes video data for operating an On Screen Display Menu (OSD Menu) of the video playback system 50 . The mixer 56 mixes the progressive sub-picture signal 82 , the progressive OSD signal 84 and the progressive main picture signal 80 , and then sends it to the pre-processing circuit 58 for image processing and adjustment.

As shown in Figure 5, the pre-stage processing circuit 58 includes a low-pass filter (lowpass filter) 72, a brightness adjuster (brightness adjuster) 74, a chromaticity adjuster (color adjuster) 76 and a contrast adjuster (contrast adjuster) )78. After the progressive main picture signal 80 is mixed, the front-end processing circuit 58 can further perform low-pass filtering, image brightness, chroma and contrast adjustment to generate a progressive signal stream 86 .

The interlaced signal generation module 60 can receive the progressive signal stream 86 , and selectively store the progressive format signal in the internal column buffer by using a parity interleaved temporary storage method, so as to reconstruct an interlaced signal stream 88 . Please refer to FIG. 9 , which is a schematic diagram of an interlaced signal generating module 60 of the present invention. This embodiment adopts the color representation format of luminance (Luminance) and chrominance (Chrominance), Y represents the luminance value, and C represents the chrominance value (C includes CB and CR, respectively representing the first and second chrominance values). Therefore, the interlaced signal generating module 60 internally includes a luminance column register 61 to temporarily store brightness information; a first chroma column register 65 and a second chroma column register 67 to temporarily store chrominance information; and a control circuit 69 to temporarily store chrominance information; Control the access of brightness and chrominance information. Three sampling formats are defined in MPEG-2, which are respectively 4:2:0 sampling format, 4:2:2 sampling format, and 4:4:4 sampling format, respectively representing three different chroma sampling frequencies. known to those in the industry. Therefore, one or two chrominance column buffers may be provided in the interlaced signal generating module 60 to temporarily store chrominance information.

As shown in FIG. 5 , the video encoding module 62 includes a progressive video encoding module 63 and an interlaced video encoding module 64 . The progressive video encoding module 63 and the interlaced video encoding module 64 can respectively encode the progressive signal stream 86 and the interlaced signal stream 88 into a progressive video signal 31 and an interlaced video signal 11 conforming to the video standard of the image display device.

Therefore, the image playback system can output the progressive video signal 31 and the interlaced video signal 11 together, so that one or more corresponding image display devices can display images.

It should be noted here that the so-called "together" in the present invention is to consider that the conversion process between signals may cause the progressive video signal 31 and the interlaced video signal 11 not to be generated "simultaneously". In other words, regardless of whether the time points at which the progressive video signal 31 and the interlaced video signal 11 are generated are the same, the progressive video signal 31 and the interlaced video signal 11 can be "together" generated for the image display device to display and play an image. All playback systems should fall within the scope of the claims of the present invention. In the image playback system 50 shown in FIG. 5 , the main picture processor 52 , the sub picture decoder 66 , and the video control display menu processor 68 all operate in a progressive scan manner. Compared with the known video playback system 30 shown in FIG. 3 and FIG. 4 , it can only selectively output the progressive scanning video signal 31 or the interlaced scanning video signal 11 , but cannot play both together. The image playing system 50 of the present invention uses an interlaced signal reconstruction module 60 and a parity interleaved temporary storage method to finally output the progressive scanning video signal 51 and the interlaced scanning video signal 11 together.

Please refer to FIG. 6 . FIG. 6 is a block diagram of the video playback system 50 in FIG. 5 outputting the interlaced video signal 11 separately. In addition to outputting the progressive video signal 31 and the interlaced video signal 11 together, the image playing system 50 of the present invention can also output the interlaced video signal 11 separately. When the video playback system 50 is used to output the interlaced video signal 11 alone, the main picture processor 52 does not perform interpolation or analog processing between adjacent scanning lines. The main picture processor 52, the sub-picture decoder 66, and the video control display menu processor 68 respectively operate in a manner conforming to interlaced scanning, and generate an interlaced main picture signal 81, an interlaced sub-picture signal 83, and an interlaced OSD signal 85 . This embodiment is the same as the known technique of FIG. 4 . In this embodiment, the interlaced signal generating module 60 and the progressive video encoding module 64 are inactive.

Please refer to FIG. 7 , which is a block diagram of an image playing system 90 according to another embodiment of the present invention. The main difference between the video playing system 90 in FIG. 7 and the video playing system 50 in FIG. 5 lies in the circuit configuration of the interlaced signal generating module 92 . The interlaced signal generating module 92 selectively stores the progressive signal stream 93 from the mixer 56 in a parity-interleaved storage manner to obtain an interlaced signal stream 94 .

As shown in FIG. 7 , the progressive signal stream 93 and the interlaced signal stream 94 are respectively subjected to low-pass filtering, image brightness, chroma and contrast adjustment through the pre-processor 96 and the pre-processor 98 . Furthermore, the progressive video encoding module 63 and the interlaced video encoding module 64 respectively encode the progressive signal stream 93 and the interlaced signal stream 94 into a progressive video signal 31 and an interlaced video signal 11 conforming to the video standard of the image display device.

Comparing the embodiment of FIG. 5 with that of FIG. 7, it can be known that the embodiment of FIG. 5 performs low-pass filtering, image brightness, chromaticity and contrast adjustment before using the interlaced signal generating module 60 to generate the interlaced signal stream 88, so it can reduce one The use of pre-processing circuits. And only two sets of circuits of the progressive video encoding module 63 and the interlaced video encoding module 64 are respectively designed for the video encoding part that must be processed separately.

Please refer to FIG. 10 . FIG. 10 is a schematic diagram of an external progressive signal stream 86 used by the video playback system 50 of FIG. 5 . In the foregoing embodiments, the image playing system 50 is used for playing image data stored in image storage media such as VCD and DVD. As shown in FIG. 10 , the video playback system 50 of the present invention can further utilize an external progressive signal stream 86 to generate a progressive video signal 31 and an interlaced video signal 11 together. The external progressive signal stream 86 generally comes from high-order cable or wireless TV signals. For example, some sports programs use the interlaced signal stream 86 with a large amount of data to improve the image quality during motion. In addition, many cities and countries are also planning to change the specification of wireless TV signals to a progressive scan format to comply with display devices with a progressive scan function. In this embodiment, the interlaced signal generating module 60 and the video encoding module 62 of the image playback system 50 can be regarded as a progressive interlaced video signal co-generation device 96, so that when reading the progressive signal stream 86, the interlaced The signal generating module 60 generates an interlaced signal stream 88 , and uses the video encoding module 62 to encode the two signal streams into an interlaced video signal 31 and a progressive video signal 11 .

Please refer to FIG. 8 . FIG. 8 is a schematic diagram of a parity interleaved temporary storage method used by the interlaced signal generating module 60 in FIG. 5 . P1 is a progressive scan signal constituting one screen. The odd scanning line signals (P1L1, P1L3, P1L5,,,) of P1 are reserved, and the even scanning line signals (P1L2, P1L4, P1L6,,,) are discarded. The reserved signals are stored in one or more column registers in the interlaced signal generating module 60 . Since the speed of the progressive scan is twice that of the interlaced scan, the interlaced signal generating module 60 outputs the stored data at half the frequency of P1 to generate an interlaced scan signal I1. This is the data conversion of one screen. The even-numbered scanning line signals (P2L1, P2L3, P2L5,,,) of the progressive scanning signal P2 constituting the next picture are reserved, and the odd-numbered scanning line signals (P2L2, P2L4, P2L6,,,,) are discarded. And the reserved signals are stored in one or more column registers in the interlaced signal generating module 60 . Make the interlaced signal generating module 60 output the stored data at half the frequency of P2 to generate the interlaced scanning signal I2 constituting the frame. In the next frame, the odd-numbered scanning line signals (P3L1, P3L3, P3L5,,,,,,,,,,,,,,,,,,,,,,, P322 , P3L2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, P3L6,,,,,,,,,,,,,,,,,,,,,,,,,, and, of the next frame with even-numbered-numbered number of numbered number of scanning-line signals are provided. This is the method for the interlaced signal generation module 60 of the present invention to selectively store the progressive format signal in a parity interleaved temporary storage method to reconstruct an interlaced format signal. In this way the progressive format signal 86 can be converted to an interlaced format signal 88 . Based on the above, the present invention adds a design of an interlaced signal reconstruction module under the framework of a known single-chip video playback system, so that the video playback system of the present invention can be used without using an external circuit. , still achieve the purpose of simultaneously outputting progressive scan and interlaced scan video signals. Because the use of external circuits is avoided, the invention can greatly reduce the manufacturing cost.

Through the detailed description of the preferred embodiments above, it is hoped that the features and spirit of the present invention can be described more clearly, rather than limiting the scope of the present invention by the preferred embodiments disclosed above. On the contrary, the intention is to cover various modifications and equivalent arrangements within the scope of the appended claims of the present invention.

Claims (20)

1. image playing system, be used for producing together one line by line video signal and an interlacing video signal give at least one image display, this image playing system includes:

One key frame processor is used for the signal of video signal that transmitted according to a shadow memory, and produces corresponding one main screen signal line by line, this line by line main screen signal can produce progressive signal stream in follow-up via a predetermined image processing program;

One interlace signal generation module wherein comprises at least one row buffer, can receive this progressive signal stream, and use the temporary mode of an oem character set optionally this progressive signal stream to be stored, to produce interlace signal stream; And

One video coding module can be according to the video signal specification of this image display, and this that this progressive signal stream and this interlace signal flow point is not encoded into the video signal specification that meets this image display be video signal and this interlacing video signal line by line;

By this this image playing system can with this line by line video signal provide with this interlacing video signal and give this image display and show to carry out image.

2. interlacing video signal co-generator line by line, be used for according to a progressive signal flow to and produce together one line by line video signal and an interlacing video signal give at least one image display, this line by line interlacing video signal co-generator include:

One interlace signal generation module wherein comprises at least one row buffer, can receive progressive signal stream, and use the temporary mode of an oem character set optionally this progressive signal stream to be stored, to produce interlace signal stream; And

One video coding module can be according to the video signal specification of this image display, and this that this progressive signal stream and this interlace signal flow point is not encoded into the video signal specification that meets this image display be video signal and this interlacing video signal line by line;

By this this image playing system can with this line by line video signal provide with this interlacing video signal and give this image display and show to carry out image.

3. image playing system as claimed in claim 1, wherein this image playing system also comprises an auxiliary image processor and a blender, and this auxiliary image processor comprises:

One sprite decoder is according to the signal of video signal of this shadow memory, to be decoded into the corresponding signal of sprite line by line; And

One looks control display menu processor, according to the signal of video signal of this shadow memory, to produce corresponding osd signal line by line;

Wherein this blender can with this line by line sprite signal and this line by line osd signal with this line by line main screen signal carry out mixing of signal.

4. image playing system as claimed in claim 2, wherein this image playing system also comprises a prime treatment circuit, carry out the processing and the adjustment of image with the signal that will be imported, this prime treatment circuit comprises a low pass filter, a brightness adjuster, a colourity adjuster and a contrast adjuster.

5. image playing system as claimed in claim 4, wherein should predetermined image processing program be with this line by line main screen signal mix via this blender, and via this prime processing circuit processes and adjustment.

6. image playing system as claimed in claim 1, wherein this video coding module comprises a video coding module and an interlacing video coding module line by line.

7. image playing system as claimed in claim 6, wherein this interlacing video coding module and can read and produce this interlace signal and flow in the follow-up frequency that will stored signal flows half with this progressive signal.

8. image playing system as claimed in claim 1, wherein this progressive signal stream system is made up of a plurality of frame signal, and described frame signal is made up of multi-strip scanning line signal.

9. image playing system as claimed in claim 8, wherein the temporary mode of this oem character set is meant that this interlace signal generation module can carry out following signal processing for the one first and one second adjacent frame signal that is received:

Only store wherein odd number bar scanning-line signal for this first frame signal, and only store wherein even number bar scanning-line signal for this second frame signal.

10. image playing system as claimed in claim 8, wherein the temporary mode of this oem character set is meant that this interlace signal generation module can carry out following signal processing for the one first and one second adjacent frame signal that is received:

Only store wherein even number bar scanning-line signal for this first frame signal, and only store wherein odd number bar scanning-line signal for this second frame signal.

11. image playing system as claimed in claim 1, wherein this image playing system can be connected to two different image displays, and this image playing system produced this video signal and this interlacing video signal can send above-mentioned two image displays respectively to and show to carry out image line by line.

12. image playing system as claimed in claim 1, wherein the described row buffer in this interlace signal generation module is a brightness row buffer and at least one colourity row buffer; The quantity of this colourity row buffer is looked the chroma sampling frequency and is determined with the different of brightness sampling frequency ratio.

13. one kind utilize an interlace signal generation module and make an image playing system can produce one together video signal and an interlacing video signal give the method for at least one image display line by line, this image playing system includes this interlace signal generation module, wherein comprises at least one row buffer; And a video coding module, can be according to the video signal specification of this image display, this that a progressive signal stream and an interlacing lattice signal flow is encoded into the video signal specification that meets this image display respectively be video signal and this interlacing video signal line by line;

This method comprises the following step:

Before this progressive signal stream is not encoded via this video coding module as yet, this progressive signal fluently optionally is stored in this interlace signal generation module with the temporary mode of an oem character set, to produce this interlace signal stream; And

This progressive signal stream is not encoded into this video signal and this interlacing video signal line by line with this interlace signal flow point;

This image playing system can produce this together video signal and this interlacing video signal give this image display and show to carry out image line by line by this.

14. method as claimed in claim 13, wherein this image playing system via a predetermined image processing program, and produces this progressive signal stream according to the signal of video signal that shadow memory transmitted of an outside

15. method as claimed in claim 13, wherein this video coding module comprises a video coding module and an interlacing video coding module line by line.

16. method as claimed in claim 15, wherein this interlacing video coding module and can read and produce this interlace signal and flow in the follow-up frequency that will stored signal flows half with this progressive signal.

17. method as claimed in claim 13, wherein this progressive signal stream system is made up of a plurality of frame signal, and described frame signal system is made up of multi-strip scanning line signal.

18. method as claimed in claim 17, wherein the temporary mode of this oem character set is meant that this interlace signal generation module can carry out following signal processing for the one first and one second adjacent frame signal that is received:

Only store wherein odd number bar scanning-line signal for this first frame signal, and only store wherein even number bar scanning-line signal for this second frame signal.

19. method as claimed in claim 17, wherein the temporary mode of this oem character set is meant that this interlace signal generation module can carry out following signal processing for the one first and one second adjacent frame signal that is received:

Only store wherein even number bar scanning-line signal for this first frame signal, and only store wherein odd number bar scanning-line signal for this second frame signal.

20. method as claimed in claim 17, wherein the described row buffer in this interlace signal generation module is a brightness row buffer and at least one colourity row buffer; The quantity of this colourity row buffer is looked the chroma sampling frequency and is determined with the different of brightness sampling frequency ratio.

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