CN1453708A

CN1453708A - Automatic test system and method for power switch cycle of computer equipment

Info

Publication number: CN1453708A
Application number: CN 02118902
Authority: CN
Inventors: 詹益新
Original assignee: Mitac International Corp
Current assignee: Mitac International Corp
Priority date: 2002-04-27
Filing date: 2002-04-27
Publication date: 2003-11-05
Anticipated expiration: 2022-04-27
Also published as: CN1223942C

Abstract

The invention provides a power switch period automatic test system of computer equipment, which comprises a remote main control computer, a data collecting circuit, a plurality of data acquisition and transmission circuits, a plurality of data transmission lines and a power switch period switching unit. The computer machine to be tested sends the generated starting-up test error code to the data input port of the data collecting circuit through the connected data capturing and transmitting circuit in the switching period of the power switching period test power supply, and then the data capturing and transmitting circuit transmits and records the starting-up test error code transmitted by each computer machine to be tested in the remote main control computer.

Description

The power switch automatic periodic test system and the method thereof of computer equipment

Technical field

The invention relates to a kind of measuring technology of computer equipment, be meant a kind of power switch automatic periodic test system and method for testing thereof of computer equipment especially.

Background technology

The computer installation of general new research and development design during the stage, can be done the test of each side in test manufacture to this computer installation, uses and guarantees its product quality.For example in the test of production reliability project, power switch period measuring (Power On-off Cycles Test) is to be one of considerable production reliability test event.

In the design of computer system, when computing machine activates, the ROM-BIOS of computing machine (BIOS) can be carried out a series of test to system hardware, display, keyboard, internal memory, hard disk for example to being connected in this computer system ... Deng testing, system's self test program (Power On SelfTest) of being carried out during this start generally abbreviates POST as.In start self test program,, promptly can produce corresponding start test errors sign indicating number (POST Code) if when having detected arbitrary device and existing mistake in computer system.For example when memory test detects mistake, promptly can be on computer screen the display memory test errors message or send the caution sound.At present the widely used personal computer system of institute mostly follows the definition of IBM standard error sign indicating number, and for example error code 201 is to represent memory test mistake (Memory Test Failed).User, technician can be according to the definition of this error code, and inquire system mistake place.And for computing machine is made manufacturer, assembling manufacturer or maintenance manufacturer, the important especially test message of this start test errors sign indicating number.

When carrying out the test in this power switch cycle, present test mode, often need be about more than 2000 times or the time more than 3 days to this power switch follow-on test, and each tested computing machine board must be by test, do not having mistake or taking place under the machine phenomenon, can guarantee the production reliability of this computer equipment, just consider a large amount of production then.

Yet, in present power switch period measuring technology or method, if when test period has twice or repeatedly wrong a generation, often can't in real time its bad phenomenon complete documentation be got off.Because when tested computing machine board power supply is started shooting again and normally during activation system, its error messages or error code will not exist along with shutdown, and be difficult to carry out tracking, the analysis of mistake.In present measuring technology, only writing down each time, electric power starting makes system's activation (System Boot) carry out specific archives afterwards, and its count value (Counter) is added 1, and exist in the test result data file (Report File) of floppy disk or hard disk or write down each tested computing machine board and the power supply execution result and the bad phenomenon of switching computer circuit each time at any time on the side by the special messenger.Yet the traditional method of testing of this kind both imperfection also is not inconsistent efficient.

Summary of the invention

Edge this, fundamental purpose of the present invention promptly is at the disappearance of aforementioned common technology and actual demand, and develop a kind of computer power switch period measuring system, with reach save manpower again can the complete documentation test process in the practice condition in power switch cycle of each tested computing machine board and tested each time computing machine board.

Another object of the present invention provides a kind of computer power switch automatic periodic test system, it utilizes a long-range main control computer to monitor several tested computing machine boards simultaneously, and with the practice condition that each tested computing machine board is taken place when carrying out the electric power starting self test program note, and can be with this electric power starting self test program in the start test errors sign indicating number that produced be sent in the long-range main control computer, to make comparisons or to produce the test result form.

Another object of the present invention provides a kind of computer power switch period measuring system of being convenient to carry out follow-up error tracking and analysis, the testing engineering personnel only need when the test duration finishes, inspect the record result of the specific archives on long-range main control computer and the tested computing machine board, just can learn each tested computing machine board detailed execution result of Switching Power Supply each time easily.

Another object of the present invention provides a kind of power switch automatic periodic test method of computer equipment, it carries out the test in power switch cycle with a long-range main control computer to many tested computing machine boards, when each tested computing machine board is carrying out the electric power starting self test program, and produce when starting shooting the test errors sign indicating number, can be captured by the data acquisition transfer circuit test errors sign indicating number of should starting shooting, again by a data sink collector with acquisition in each data acquisition transfer circuit to start test errors sign indicating number read, and compile and be sent in the long-range main control computer.

In order to reach above-mentioned purpose, include a long-range main control computer, a data sink collector, a plurality of data acquisition transfer circuit, many data lines, a power switch cycle switch unit in the preferred embodiment of the present invention, utilize above-mentioned circuit arrangement, so that many tested computing machine boards are carried out the automatic test in power switch cycle.This tested computing machine board is in the switch periods of power switch period measuring power supply, the start test errors sign indicating number that produces is delivered to data-in port in the data sink collector via the data acquisition transfer circuit that connects, the start test errors sign indicating number that each tested computing machine board is sent by this data acquisition transfer circuit transmits and is recorded in the long-range main control computer again.

For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.

Description of drawings

Fig. 1 is the connection diagram that shows computer power switch automatic periodic test system of the present invention;

Fig. 2 is the output waveform figure that shows employed switch periods testing power supply among the present invention;

Fig. 3 is the annexation figure that shows between the further circuit block diagram of data sink collector of the present invention and this data sink collector and long-range main control computer, tested computing machine board;

Fig. 4 is the annexation figure that shows between the further circuit block diagram of data acquisition transfer circuit of the present invention and this data acquisition transfer circuit and tested computing machine board, data sink collector;

Fig. 5 shows control flow chart of the present invention.

Embodiment

At first consult shown in Figure 1, it has shown the connection diagram of the power switch automatic periodic test system of computer equipment of the present invention, this test macro includes a long-range main control computer (Remote ControlPC) 1, one data sink collector (Data Acquisition Device) 2, a plurality of data acquisition transfer circuits (Data Port Capture Device) 3a, 3b ... 3n, many data lines (Data TransferCable) 4a, 4b ... 4n, one power switch cycle switch unit 5 (Power On-off Cycles SwitchUnit), utilize above-mentioned circuit arrangement, can be to many tested

computing machine board

6a, 6b ... 6n carries out the automatic test in power switch cycle.

This data sink collector 2 is to can be made into the plug-in card pattern, can be plugged on the bus of this long-range main control computer 1, for example pci bus groove (PCI Bus Slot).Data sink collector 2 has several FPDP (DataPort) or data channel, and each FPDP is respectively via

data line

4a, 4b ... 4n and connect data

acquisition transfer circuit

3a, 3b respectively ... 3n.This data

acquisition transfer circuit

3a, 3b ... 3n also can be made into the plug-in card pattern, can be plugged on tested

computing machine board

6a, 6b ... bus on the 6n, for example pci bus groove (PCI Bus Slot).

Each tested

computing machine board

6a, 6b ... the switch periods testing power supply ACV ' of 6n is provided by power switch cycle switch unit 5.In the present embodiment, after this power switch cycle switch unit 5 is obtained AC power by an AC power ACV, export this switch periods testing power supply ACV ' (joining shown in Figure 2) by its power output end, for example its electric power starting (Power On) time is 50 seconds (T1), and power-off (Power Off) time is 5 seconds (T2).So periodically supply this switch periods testing power supply ACV ' to each tested

computing machine board

6a, 6b ... 6n, by this and can this computing machine board of emulation the number of times of power switch operation when actual use the in the future.

Shown in Figure 3, shown the annexation figure between the further circuit block diagram of data sink collector 2 of the present invention and this data sink collector 2 and long-range main control computer, tested computing machine board.Include known members such as central processing unit 11, primary memory 12, data bus 13, address bus 14, control bus 15, PCI bridge 16 and pci bus 17 at long-range main control computer 1.And include several data buffers (Data Buffer) 21a, 21b in this data sink collector 2 ... 21n, each

data buffer

21a, 21b ... the data bus of 21n (AD Bus) is the pci bus 17 that is connected to long-range main control computer.

In addition, include several and

door

22a, 22b in this data sink collector 2 ... 22n, each and

door

22a, 22b ... the wherein input end of 22n is to be connected to the I/O device that pci bus produces to read signal IOR, and another input end then is connected to I/O port address selected in the long-range main control computer 1 (38OH ~ 39CH) for example respectively.Utilize this I/O device to read signal IOR and I/O port address signal, make and

door

22a, 22b ... the output terminal of 22n can produce enable signal respectively and deliver to this

data buffer

21a, 21b ... the activation end G of 21n, and can select this data buffer of activation.

Each

data buffer

21a, 21b ... data-in port P1, the P2 of 21n ... Pn is via

data line

4a, 4b ... 4n and be connected to tested

computing machine board

6a, 6b ... data acquisition transfer circuit 3a, the 3b of 6n ... 3n.This

data line

4a, 4b ... 4n can adopt the signal transmission cable of general 9 lines, wherein 8 lines are the eight bit data signal wires that are connected to start test errors code data, an other line is the working power Vcc that is connected to electronic package on the tested computing machine board, uses this tested computing machine board of judgement whether during start (Power On).Certainly this signal data transmission line also can adopt the signal data transmission line of other kenel.

Fig. 4 is the annexation figure that shows between the further circuit block diagram of data acquisition transfer circuit of the present invention and this data acquisition transfer circuit and tested computing machine board, data sink collector.At tested computing machine board, for example among first tested computing machine board 6a, include known members such as central processing unit 61, primary memory 62, data bus 63, address bus 64, control bus 65, PCI bridge 66 and pci bus 67.And including a data bolt lock device 31 among this data acquisition transfer circuit 3a, its data bus (AD Bus) is the pci bus 67 that is connected to this tested computing machine board 6a.

In addition, include among this data acquisition transfer circuit 3a one with the door 32, wherein an input end is connected to the I/O device write signal IOW that the pci bus 67 of this tested computing machine board 6a is produced, and another input end then is connected to the wherein I/O port address (for example 08XH) of tested computing machine board 6a.Utilize this I/O device write signal IOW and I/O port address signal, make with door 32 output terminal and can produce the activation end G that enable signal is delivered to this data bolt lock device 31, and can select this data bolt lock device of activation.The data-out port D0-D7 of this data bolt lock device 31 promptly is first data-in port P1 that is connected to data sink collector 2 via data line 4a.So, the start test errors sign indicating number (POST Code) that tested computing machine board be produced in the test process in start can be seen through this data bolt lock device, data line, and data buffer and delivering in the long-range main control computer.

When long-range main control computer when beginning to carry out test, at first carry out the fetch program (I/O Ports Read Program) of each I/O port, and the beginning reading of data is compiled the data of the fixedly output port address that each the tested computing machine board on the circuit is connected to, and writing down start test errors sign indicating number (POST Code) on each tested computing machine board that each set time reads, this start test errors sign indicating number can be stored in the internal memory or disk of this long-range main control computer.And at each tested computing machine board when testing, this tested computing machine board also can demonstrate the start test errors sign indicating number of each tested computing machine board in real time, also this start test errors sign indicating number can be stored in the internal memory or disk of this tested computing machine board.

Fig. 5 has shown the control flow chart of specific embodiments of the invention, cooperate now Fig. 1 to framework shown in Figure 4 with treatment step explanation of the present invention as after.Step of the present invention mainly comprises by power switch cycle switch unit 5 supplies one switch periods testing power supply ACV ' to each tested

computing machine board

6a, 6b ... 6n (step 101).During this switch periods testing power supply ACV ' power supply, each tested

computing machine board

6a, 6b ... 6n carries out electric power starting self test program (step 102), and produces start test errors sign indicating number (POST Code) in this electric power starting self test program.At this moment, each tested

computing machine board

6a, 6b ... 6n can be stored in this start test errors sign indicating number in the specific archives in internal memory or the disk (step 103), also this start test errors sign indicating number can be presented on its display.

In the step 104, by each data

acquisition transfer circuit

3a, 3b ... tested

computing machine board

6a, 6b that 3n will connect ... the start test errors sign indicating number that 6n is sent when carrying out the electric power starting self test program is captured, and is stored in the data bolt lock device of each data acquisition transfer circuit.

In the step 105, by data sink collector 2 with each data

acquisition transfer circuit

3a, 3b ... the tested computing machine board 6a, the 6b that are captured among the 3n ... the start test errors sign indicating number of 6n is read, and compiles and be sent in the long-range main control computer 1.At this moment, each long-range main control computer 1 can be stored in this start test errors sign indicating number in the specific archives in internal memory or the disk (step 106), also this start test errors sign indicating number can be presented on its display.

Utilize above-mentioned explanation as can be known, test macro of the present invention utilizes a long-range main control computer to monitor several (for example 8-16 platform) tested computing machine boards simultaneously, and with the practice condition that each tested computing machine board is taken place when carrying out the electric power starting self test program note, and can be with this electric power starting self test program in the start test errors sign indicating number that produced be sent in the long-range main control computer, to make comparisons or to produce the test result form.So the testing engineering personnel only need to inspect the record result of the specific archives on long-range main control computer and the tested computing machine board again when the test duration finishes, and just can learn each tested computing machine board detailed execution result of Switching Power Supply each time easily.Therefore, the industrial utilization of the true tool height of the present invention.

Certainly, those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.

Claims

1. A power switch cycle automatic test system for computer equipment, comprising:

a remote master computer;

A data collection circuit, including a plurality of data buffers, the data bus of each data buffer is connected to the bus of the remote master computer, and the data buffer is controlled by an enabling signal generated by the remote master computer;

A plurality of data acquisition and transmission circuits, each data acquisition and transmission circuit includes a data latch, its data bus is connected to the bus of the computer machine under test, and its data output port is connected to one of the data collection circuits a data input port of a data buffer, the data latch being controlled by an enable signal generated by the computer machine under test;

A power switching cycle switching unit, after obtaining AC power from an AC power supply, outputs switching cycle test power from its power output end, and supplies it to each tested computer machine;

When performing the test, the remote master computer will read the execution status of each tested computer machine when executing the power-on self-test program through the data collection circuit and the data acquisition transmission circuit, and record each The error code of the power-on test of the computer under test.

2. The automatic test system for power switch cycle of computer equipment as claimed in claim 1, characterized in that, the data collection circuit is made into a plug-in card type, which can be inserted into the PCI bus slot of the remote host computer.

3. The power switch cycle automatic test system of computer equipment as claimed in claim 1, wherein the data acquisition and transmission circuit is made into a plug-in card type, which can be inserted into the PCI bus slot of the computer machine under test .

4. The power switch cycle automatic test system of computer equipment as claimed in claim 1, characterized in that, the data acquisition and transmission circuit is connected with the data collection circuit with a data transmission line, so that the data acquisition and transmission circuit The retrieved startup test error code sent by the tested computer machine is sent to the data collection circuit through the data transmission line.

5. The power switch cycle automatic test system of computer equipment as claimed in claim 4, is characterized in that, this data transmission line comprises a plurality of signal data transmission lines as data signal line, also comprises that a line is connected to the computer machine under test The working power on the computer is used to judge whether the computer machine under test is in the power-on period.

6. The power switch cycle automatic test system of computer equipment as claimed in claim 1, it is characterized in that, the power-on test error code that this tested computer machine produces is also displayed in this tested computer machine in real time, and the power-on The test error code is stored in the tested computer machine.

7. The power switch cycle automatic test system of computer equipment as claimed in claim 1, characterized in that, several AND gates are included in the data collection circuit, and one of the input ends of each AND gate is connected to the remote main control computer The I/O device generated by the bus reads the signal, and the other input end is respectively connected to the selected I/O port address in the remote host computer, and the I/O device is used to read the signal and the I/O port address signal, so that The output end of the AND gate generates an enable signal and sends it to the enable end of each corresponding data buffer.

8. The automatic test system for the power switch cycle of computer equipment as claimed in claim 1, wherein the data acquisition transmission circuit includes an AND gate, and one of the input terminals of each AND gate is connected to the computer under test The I/O device write signal generated by the bus of the computer, and the other input end is connected to the selected I/O port address in the computer machine under test, and the I/O device is used to write the signal and the I/O port address signal, so that The output end of the AND gate generates an enable signal and sends it to the enable end of the data latch.

9. A method for automatically testing the power switch cycle of computer equipment, which is to test the power switch cycle of multiple tested computer machines with a remote master computer. The remote master computer is connected to a data collection circuit, and each A data acquisition transmission circuit is connected to a computer machine under test, and the test method includes the following steps:

supplying a switching cycle test power supply to each tested computer machine;

During the switching cycle test power supply period, each computer machine under test performs a power-on self-test program and generates a power-on test error code;

The power-on test error code sent by the connected computer machine under test when executing the power-on self-test program is retrieved by each data retrieval transmission circuit, and stored in the data latch of each data retrieval transmission circuit; and

The data collection circuit reads the boot test error codes of the tested computer machines captured by each data collection and transmission circuit, and collects and transmits them to the remote main control computer.

10. The power switch cycle automatic testing method of computer equipment as claimed in claim 9, is characterized in that, also comprises the power-on test error code that each tested computer machine produces is stored in the internal memory of the tested computer machine or in the magnetic disk A step of.

11. The automatic test method for the power switch cycle of computer equipment as claimed in claim 9, further comprising the step of displaying the error codes of the power-on test produced by each computer under test on the monitor of the computer under test.

12. The automatic test method of power switch cycle of computer equipment as claimed in claim 9, is characterized in that, also comprises the power-on test error code that each tested computer platform produces is stored in the internal memory of this remote host computer or disk A step of.

13. The automatic test method for the power switch cycle of computer equipment as claimed in claim 9, further comprising the step of displaying the error codes of the power-on test generated by each tested computer machine on the display of the remote master computer.