Summary of the invention
Technical matters: the purpose of this invention is to provide a kind of oscilloscope condition triggering method based on finite state machine, this method has very strong versatility and specificity.Versatility is: the user can be provided with very complicated trigger condition arbitrarily and carry out the waveform triggering, and, just can realize edge triggering, pulsewidth triggering, burr triggering, overtime triggering, postpone to trigger, owe diversified complicated triggering mode in the modern oscillographs such as width of cloth triggering, saltus step triggering as long as it is carried out correct setting; Specificity is that the user can use this triggering method to filter out the very strong waveform of specificity, as specific amplitude, specific slope and specific time.
Technical scheme:
Condition triggering method is based on the finite state machine with N+1 state of a complexity.N in the following formula can be for arbitrarily more than or equal to 1 integer, the programmable trigger waiting status of expression programmable trigger machine: and " 1 " in the following formula is " triggering enables " state, for all triggering machines common.
In this state machine, except that triggering enabled state, each state (being each programmable trigger waiting status) can jump to other any one state.For making things convenient for device, can represent the jump condition of setting able to programme with " Con m:n " from the m state to the n state.Jump condition add up to M, general,
。Each condition can be selected from 4 preset condition.Preset condition comprises " condition automatically ", " disable condition ", " overtime condition " and " edge condition ".Wherein, automatically condition refers to that this condition sets up forever, the edge condition refers to satisfy the condition (level and edge polarity be set by the user) of the certain edges thereof of particular level along the polarity chron establishment, overtime condition refers to satisfy the condition of setting up after the specific time of time-delay (time is set by the user), and disable condition refers to that this condition never sets up.
Condition triggering method is: the user is n according to the progression that the complexity of waveform is provided with state machine, n be one more than or equal to 1 integer: system provides four kinds of optional conditioies to the user, is respectively: 1. condition, 2. edge condition, 3. overtime condition, 4. disable condition automatically; Wherein, automatically condition refers to that time condition sets up forever, and the edge condition refers to satisfy the condition that the certain edges thereof of particular level is set up along polarity chron, and overtime condition refers to satisfy the condition of setting up after the specific time of time-delay, and disable condition refers to that this condition never sets up; In order to reach correct triggering, the user need come each jump condition is selected according to the shape of waveform.The system of selection of condition is as follows:
A) if want to make this condition to set up forever, can select " condition automatically ", this condition generally is used for the unconditional transfer of determining step;
B) if want that condition is set up when waveform reaches specific level and meets specific edge polarity, can select " edge condition ";
C) if the special time postcondition of wanting to delay time is set up, can select " overtime condition ";
D) if want to make this condition never to set up, can select " disable condition ";
(i, j are the natural number that is less than or equal to n and i ≠ j) to the user as condition i: j by one in four conditions to be selected that system provided by waveform to be measured and above-described system of selection;
Condition triggering method is as follows:
1) system's Rule of judgment 1: 2~1 successively: whether n sets up, in case find 1: i set up (2≤i≤n), then jump to step I, this step that then stays on of all being false is else if judged;
2) system's Rule of judgment 2: 1~2 successively: whether n sets up, in case find 2: i sets up (1≤i≤n and i ≠ 2), then jumps to step I, and this step that then stays on of all being false is else if judged;
3) system's Rule of judgment 3: 1~3 successively: whether n sets up, in case find 3: i sets up (1≤i≤n and i ≠ 3), then jumps to step I, and this step that then stays on of all being false is else if judged;
......
N-1) system successively Rule of judgment n-1: 1~n-1: n whether set up, in case find n-1: i set up (1≤i≤n and i ≠ n-1), then jump to step I, this step that then stays on of all being false is else if judged;
N) system successively Rule of judgment n: 1~n: n-1 whether set up, in case find n: i set up (1≤i≤n-1), then jump to step I, all being false else if then jumps to step n+1; N+1) whether system's Rule of judgment n: t sets up, if set up then jump to step n+2, all being false else if then jumps to step n;
N+2) system's output triggers enable signal;
N+3) finish.
The automatic condition that system provides refers to that this condition is set up forever; System runs to the jump method that should set up according to condition immediately when judging this condition and carries out the redirect of step.
The edge condition that system provides refers to, reaches particular level and satisfies specific edge polarity chron when importing waveform, and this condition is set up; Its level should be set arbitrarily in maximum signal level and minimum signal level by the user, and edge polarity should be selected in " rising edge ", " negative edge " and " two edge " by the user.
The overtime condition that system provides refers to: pick up counting from entering the step of judging this condition, finish timing up to the specific time; This condition is false during the timing, and this condition is set up immediately after reaching the special time timing and stopping; This time should be set arbitrarily by the user.
After selection was finished, the triggering machine was started working.The redirect of the state of state machine along with the variation of input waveform.In case the state of state machine jumps to " triggering enables " state, illustrate that the input waveform has satisfied user's requirement fully.At this moment, one of triggering machine output triggers enable signal, and the condition of finishing triggers.
Beneficial effect: as long as N is enough big, this triggering method can trigger the waveform of any complexity almost.N=3 is worked as in the engineering practice explanation, just can satisfy the application of most occasions in the time of P=7.
The suitable condition setting of carrying out, this triggering method can also equivalence be other triggering method.For example, Con1, Con2 in accompanying drawing 2 are " automatically ", and Con4 is that the edge triggers, and other conditions are when forbidding, this triggering mode just equivalence is the edge triggering of ordinary oscilloscope; Con2 in accompanying drawing 2 is overtime, and Con1, Con4 are that the edge triggers, and other conditions are when forbidding, the equivalence of this triggering mode triggers for postponing.Similarly, by the user to the triggering machine correctly, condition setting cleverly, this triggering mode can equivalence for edge triggerings, pulsewidth triggering, burr triggering, overtime triggering, delay triggering, owe diversified triggering mode in the modern oscillographs such as width of cloth triggering, saltus step triggering.
Embodiment
Enforcement of the present invention can be divided into two parts: finite state machine and condition generator.Wherein, finite state machine can be by logical device, comprise programmable logic array (Field Programmable GateArray, FPGA) or special IC (ASIC) etc. realize very easily.And the condition generator can be realized by the method for analog to digital converter (ADC)+logical device or level comparator+logical device.
In the oscilloscope condition triggering method based on finite state machine of the present invention, condition triggering method is:
The user is n according to the progression that the complexity of waveform is provided with state machine, n be one more than or equal to 1 integer; System provides four kinds of optional conditioies to the user, is respectively: 1. automatically condition, 2. edge condition, 3. overtime condition, 4. disable condition; Wherein, automatically condition refers to that time condition sets up forever, and the edge condition refers to satisfy the condition that the certain edges thereof of particular level is set up along polarity chron, and overtime condition refers to satisfy the condition of setting up after the specific time of time-delay, and disable condition refers to that this condition never sets up; The system of selection of condition is as follows:
E) if want to make this condition to set up forever, can select " condition automatically ", this condition generally is used for the unconditional transfer of determining step;
F) if want that condition is set up when waveform reaches specific level and meets specific edge polarity, can select " edge condition ";
G) if the special time postcondition of wanting to delay time is set up, can select " overtime condition ";
H) if want to make this condition never to set up, can select " disable condition ";
(i, j are the natural number that is less than or equal to n and i ≠ j) to the user as condition i: j by one in four conditions to be selected that system provided by waveform to be measured and above-described system of selection; Condition triggering method is as follows:
1) Rule of judgment 1: 2~1 successively of uniting: whether n sets up, in case find 1: i set up (2≤i≤n), then jump to step I, this step that then stays on of all being false is else if judged;
2) system's Rule of judgment 2: 1~2 successively: whether n sets up, in case find 2: i sets up (1≤i≤n and i ≠ 2), then jumps to step I, and this step that then stays on of all being false is else if judged;
3) Rule of judgment 3: 1~3 successively: whether n sets up, in case find 3: i sets up (1≤i≤n and i ≠ 3), then jumps to step I, and this step that then stays on of all being false is else if judged;
......
N-1) system successively Rule of judgment n-1: 1~n-1: n whether set up, in case find n-1: i set up (1≤i≤n and i ≠ n-1), then jump to step I, this step that then stays on of all being false is else if judged;
N) system successively Rule of judgment n: 1~n: n-1 whether set up, in case find n: i set up (1≤i≤n-1), then jump to step I, all being false else if then jumps to step n+1; N+1) whether system's Rule of judgment n: t sets up, if set up then jump to step n+2, all being false else if then jumps to step n;
N+2) system's output triggers enable signal;
N+3) finish.
The automatic condition that system provides refers to that this condition is set up forever; System runs to the jump method that should set up according to condition immediately when judging this condition and carries out the redirect of step.
The edge condition that system provides refers to, reaches particular level and satisfies specific edge polarity chron when importing waveform, and this condition is set up; Its level should be set arbitrarily in maximum signal level and minimum signal level by the user, and edge polarity should be selected in " rising edge ", " negative edge " and " two edge " by the user.
The overtime condition that system provides refers to: pick up counting from entering the step of judging this condition, finish timing up to the specific time; This condition is false during the timing, and this condition is set up immediately after reaching the special time timing and stopping; This time should be set arbitrarily by the user.
An embodiment when accompanying drawing 6 is this method P=7.Among the figure, DA is a digital to analog converter.Level comparator+digital to analog converter has constituted complete edge comparer and has been used for producing required edge trigger condition.Conditions such as that this condition and FPGA internal algorithm produce is overtime, automatic, forbid are through sending into the finite state machine in the FPGA after selecting.Finite state machine is finished final triggering task.The advantage of this method is to have than in real time edge compare facility and higher overall operation speed faster.