CN1324850C - Testing method for nucleus plate of digital user inserting into module - Google Patents

Abstract

The invention relates to a method for testing a DSLAM core board, comprising the following steps: setting the core board to be tested and a computer in the same subnet segment, setting the IP address of the core board to be tested and the UDP port number used for testing on the computer; The core board and the computer send UDP protocol packets to exchange test information; the computer sends a test command packet specified by the user to carry parameters, and the core board receives the test command packet sent by the computer, analyzes the test command packet; judges whether to test the connectivity of the business, if , then carry out the connectivity test of the business, if not, go to the next step; judge whether to locate the business connectivity fault or internal flow information, if so, collect the cell count value of each internal sampling point; if not, go to the next step; judge The core board abnormal alarm is no, if yes, collect the abnormal information, if not, go to the next step; the computer receives the test result from the core board and displays the test result. The testing method of the invention is simple and fast, and the positioning is timely and accurate.

Description

A test method for digital subscriber line access module core board

technical field

The invention relates to a testing method for data equipment, in particular to a testing method for a core board of a digital subscriber line access module.

Background technique

With the continuous expansion of the ADSL broadband access market, there is an increasingly urgent need to provide simple test tools for the DSLAM core board during the DSLAM (Digital Subscriber Line Access Module) R&D self-test, system test and production stages.

The DSLAM core board itself cannot be directly connected to the user line or the tester. At present, the core board can only be tested by connecting other hardware boards with external devices such as the tester or Modem, and then the function and performance of the core board can be tested. Such a test method has the following disadvantages:

In the self-test stage of core board development, it takes time and effort to build a more complex test environment like the above, and the resources needed for the test environment are often not in place in time;

In the R&D, testing and production stages, when encountering core board hardware or software failures, the above test methods cannot accurately locate the location of the failure;

In the stages of R&D, testing and production, once the test function needs to be added, it is difficult to complete because the test function on the core board is scattered among other functional modules and the coupling is tight;

Contents of the invention

The technical problem to be solved by the present invention is to provide a test method based on the DSLAM core board, which makes the test of the DSLAM core board simple and fast, and timely and accurately locates the faults of each chip of the core board and its related bus.

In order to achieve the above object, the present invention provides a method for testing the core board of a data subscriber line access module, which is characterized in that it includes the following steps:

A test module is set on the core board to be tested, a monitoring module is set on the computer, and the core board to be tested and the computer are arranged in the same subnet segment, and the IP of the core board to be tested is set on the computer The UDP (User Data Packet Protocol User Datagram Protocol) port number that address, test module uses, and test module listens to the UDP packet that monitoring module sends on this UDP port number;

The core board and the computer send UDP protocol packets to each other to exchange test information;

The computer sends a test command packet with parameters specified by the user, and the core board receives the test command packet sent by the computer and parses the test command packet;

Determine whether to test the connectivity of the business, if so, perform the connectivity test of the business by inserting and extracting cell operations, and then go to the next step; if not, go to the next step;

Determine whether to locate service connectivity faults or internal traffic information, if yes, collect the cell count value of each internal sampling point, and then go to the next step; if not, go to the next step;

Determine whether there is an abnormal alarm on the core board, if so, collect abnormal information, report the operation result to the computer, and then go to the next step; if not, go to the next step;

The computer receives the test results from the core board and displays the test results.

The method for testing the core board of the above-mentioned data subscriber line access module is characterized in that the step of performing the connectivity test of the business by inserting and extracting cell operations further includes the following steps:

Construct a specific cell, which is used to identify that this is a cell inserted by the test system when recycling;

Select the location of the loopback cell;

The computer monitoring module orders the test module to actively create a two-way permanent virtual connection internally as a path for inserting and extracting cells according to the information to be tested;

The test module inserts test cells along the entrance of one direction of the connection, and receives the test cells after setting the loop state at the entrance of the other direction during initialization to determine whether the connectivity test of the connection is successful.

The method for testing the core board of the above-mentioned data subscriber line access module is characterized in that the method for selecting the position of the loopback cell can be one of the following methods: short-circuit a specific port of a designated chip to send and receive low-voltage differential signals Line, used to test the business connection performance of the specific port; or the chip loopback on the core board, used to test the bus connectivity between the chip and other chips; or other hardware of the system connected to the core board A loopback is set up on a single board or other systems to test the connectivity between the chips and the bus on the entire path.

The method for testing of the above-mentioned data subscriber line access module core board is characterized in that the specific content of the test command is stored on the data field of the UDP protocol packet, and the test command includes a frame type field, an operation indication field, and a response status field and the message field.

The above-mentioned method for testing the core board of the data subscriber line access module is characterized in that the positioning service connectivity fault or internal flow information refers to positioning the specified permanent virtual connection in a certain direction from the entrance to the exit of a certain link business Connectivity failure or observe internal traffic information in that direction.

The method for testing the core board of the above-mentioned data subscriber line access module is characterized in that the cell count value of each sampling point inside the collection further refers to the computer monitoring module ordering the test module to actively collect the inside of the designated direction of the permanent virtual connection. The cell count of each key point is reported to the computer monitoring module.

The test method of the above-mentioned data subscriber line access module core board is characterized in that, when the computer monitoring module initiates the flow performance test, the test module first selects the sampling point of the cell flow test corresponding to the specified connection on each chip, and the real-time Collect the cell flow information of each sampling point, package it, and send it to the monitoring module in the agreed format for real-time display and analysis.

The above-mentioned test method for the core board of the data subscriber line access module is characterized in that, when it comes to the analysis of the business flow of IP and asynchronous transfer mode, each sampling point collects the information of the data packet, and analyzes the connection from the perspective of the data packet. Intra-packet flow performance, or mixed packet and cell flow analysis at the same time.

The method for testing the core board of the above-mentioned data subscriber line access module is characterized in that the step of collecting abnormal information and reporting the operation result to the computer is to monitor the alarm information inside the main control board by the test module at a certain frequency, and in the prescribed Within a certain period of time, if a certain alarm information accumulates to a certain set threshold, a capture message is actively sent to the monitoring module and displayed on the monitoring module interface. The above-mentioned test method for the data subscriber line access module core board is characterized in that the test method is based on the data subscriber line access module core board of the PMC asynchronous transfer mode switching chip.

DSLAM core board test method of the present invention has following advantages:

The test environment is simple, no external devices such as other hardware boards, testers or Modems are required, and only one PC is needed to connect to the core board;

It can quickly and accurately locate the hardware and software faults of each ATM switching multiplexing chip of the core board and its related bus, and provide a powerful reference for problem solving;

Since the test module is used as a separate module of the core board, it is easy to maintain and expand, and it is extremely convenient to add new functions;

The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

Description of drawings

Fig. 1 is the test implementation schematic diagram of asynchronous transfer mode switching chip;

Fig. 2 is a flow chart of method steps of the present invention;

Fig. 3 is a schematic diagram of a short-circuited loopback of a low-voltage differential signal line;

Fig. 4 is the schematic diagram of the loopback that PMC chip sets;

Fig. 5 is a schematic diagram of an optical fiber loopback of the same system;

Figure 6 is a schematic diagram of optical fiber loopbacks in different systems;

Detailed ways

The test method of the present invention will be described below by taking an ATM switching multiplexing chip DSLAM core board as an example, but it is not a limitation of the present invention.

Referring to Fig. 1, the user actively initiates a test request by the monitoring module 3 of the PC 1, and the test module 4 on the core board 2 listens to and receives UDP packets on the designated UDP port continuously, once the UDP packets are received. According to the message format agreed between the monitoring module 3 of the PC 1 and the test module 4 of the core board 2, the content of the test item and the test sub-item is analyzed, and the test module performs the test in combination with the analyzed parameter information of the measured object. The function of each test item and test sub-item is relatively independent, respectively testing a certain aspect of the core board 2 business characteristics. In Figure 1, A and B are two actual physical ports.

Please refer to Fig. 2, for the specific implementation steps of the present invention, including:

Step 10, a test module is set on the core board to be tested, and a monitoring module is set on a computer (PC), and the core board to be tested and the PC are arranged in the same subnet segment, on the PC Set the IP address of the core board to be tested and the UDP port number used by the test module. The test module listens to the UDP data packet sent by the PC monitoring module on the UDP port.

Step 20, the core board and the PC exchange test information by sending UDP protocol packets to each other.

The specific content of the test command is stored on the data field of the UDP protocol packet, and the test command is formed as follows: frame type Operating Instructions Response status indication message content + padding (1 byte) (1 byte) (2 bytes) (64 bytes)

The explanation of each component is as follows:

Frame type field: indicates the functional module to which the test command belongs, such as business management module, alarm management module, etc.;

Operation instruction field: Indicates the command to be executed by the test command, such as performing a business connectivity test in the business management module;

Response status field: indicates the result of the execution of the corresponding command: success or failure reason indication;

Message field: store the parameters carried by the PC monitoring module when issuing a specific operation command, or the response information of the core board test module; considering the scalability of the message, the message field only specifies the maximum length, and the actual effective length is determined by the receiving message end explain;

Step 30, the PC sends a test command packet carrying parameters specified by the user, and the core board receives the test command packet sent by the PC, and analyzes the test packet. The core board analyzes the received test command packet according to the agreed format described above, and decides which test item to test for which test object.

Step 40, judging whether to test the connectivity of the service. If yes, go to step 401, and perform a service connectivity test by inserting and extracting cells. If not, go to step 50 directly.

When performing a business connectivity test, the PC monitoring module can order the core board test module to actively create a two-way permanent virtual connection (PVC) internally according to the information to be tested, and the test module actively follows the entrance of one direction of the connection (such as A- >B) Insert the test cell, set the ring state at the entrance of the other direction (B->A) to receive the test cell after initialization, and determine whether the connectivity test of the connection is successful according to the number of sent and received test cells.

Taking the PMC multiplexing chip as an example, the core board is mainly composed of the PMC switching multiplexing chip and the MPC850 as the CPU (Central processing unit) of the entire core board. Among them, the ATM switching multiplexing chip includes: PM7326 to realize the ATM layer function And PM7324, ATM physical layer multiplexing chip PM7350 and PM7351. Using the interface between the MPC850 and PM7324 chips on the core board, the connectivity test and fault diagnosis of each switching multiplexing chip and related buses on the core board are realized through the insertion and extraction of cell mechanisms of the PM7324. The following steps are adopted:

Step A, constructing a cell. Construct a specific cell, which is used to identify that this is a cell inserted by the test system when recycling;

Step B. Select the position of the loopback cell. There are several options for the location of the loopback cell. By choosing different loopback cell locations, different chips and buses can be tested.

Step C, create a bidirectional ATM PVC connection, as the insertion and extraction path of the cell;

Step D, by the interface of MPC850 and PM7324, insert the cell of the structure of specified number;

Step E, using the interrupt mechanism of the PM7324 to recycle the cells. If the cell is successfully looped back at the loopback position and connected back to the PM7324 chip through the ATM PVC, the PM7324 chip will generate an interrupt and extract the cell and count, and then according to the specific number and content of the recycled cell, it can After the chip and the bus to make a diagnosis.

In the above method, the loopback cell position of the step B can have the following options:

B1. Short-circuit the low-voltage differential signal line (LVDS) for sending and receiving a specific port of the designated line card, and use it to detect whether the service connectivity performance of the specific port is normal without connecting external devices (such as Modem equipment), such as As shown in Figure 3;

B2. Loopback on the PM7350 chip on the core board, where the loopback can test the connectivity of the PM7324, PM7326, PM7350 chips and the bus between them; loopback on the PM7351 chip on the core board, where the loopback can be tested PM7324, PM7326, PM7351 chips and the bus connectivity between them; as shown in Figure 4;

B3. Set up loopbacks on other hardware single boards (as shown in Figure 5) or other systems (as shown in Figure 6) of the system connected to the core board, which can test the connectivity between each chip and the bus on the entire path sex;

Step 50, judge whether to locate the service connectivity fault or internal flow information, if locate the service connectivity fault of a certain link from the entrance to the exit of a certain direction of the PVC, or observe the internal flow information in this direction, the PC monitoring module The command test module actively collects the cell count of each key point inside the PVC in the specified direction, and reports it to the PC monitoring module for real-time analysis.

When the monitoring module on the PC initiates a flow performance test, the test module first selects the sampling points of the cell flow test corresponding to the specified connection on each chip, collects the cell flow information of each sampling point in real time, packs them, and transmits them to the monitoring in the agreed format module for display analysis. The packet length is enough to accommodate the instantaneous flow information of each sampling point. Since there are only accumulative cell counts in the chip, the accumulative counts of each sampling point are reset every sampling. Every time the monitoring module sends a flow test request, the test module takes a sample. The test module is completely passive to sample, instead of regularly sampling and actively sending the flow information of each sampling point. The sampling interval is completely controlled by the monitoring module, which can reduce the impact on the test module. The overall workload of the system.

The cell flow information of each internal sampling point is displayed in the monitoring module in real time, and the internal flow model that cannot be known by conventional testers can be analyzed. Once abnormal traffic performance is found, use this method to locate the fault point inside the core board that causes abnormal connection traffic.

When it comes to the traffic analysis of the conversion between IP and ATM, each sampling point samples the data packet information, and analyzes the data packet flow performance inside the connection from the perspective of data packets; at the same time, it can also perform mixed analysis of data packets and cell flows, The implementation method is the same as above.

Step 60. Determine whether the core board has an abnormal alarm. If yes, execute step 601 to collect abnormal information. If not, execute step 70.

When the core board system is abnormal, the test module can actively collect many alarm information of the internal chip and report it to the PC monitoring module; report the operation result to the PC for analysis and display. The specific implementation method is: the test module monitors the alarm information inside the main control board at a certain frequency. Once a certain alarm information accumulates to a certain threshold within a specified time, it will actively send a TRAP message to the monitoring module of the PC. It is displayed graphically on the module interface.

Step 70, the PC receives the test result from the core board, and displays the test result in a friendly interface.

The above test method is actually completed by the test module on the core board and the monitoring module on the PC. A relatively simple message convention is used between the core board and the PC to exchange test information, and the content of the test item and test sub-item is specified in the message. Using this test method, the registers and connection table information of each chip inside the core board can be actively queried or set on the PC monitoring module side, and the status of the core board hardware can be further known.

Of course, the present invention can also have other various embodiments, and those skilled in the art can make various corresponding changes and deformations according to the present invention without departing from the spirit and essence of the present invention, but these corresponding Changes and deformations should belong to the scope of protection of the appended claims of the present invention.

Claims (10)

1, a kind of test method of data subscriber line access module core board, is characterized in that, comprises the steps: A test module is set on the core board to be tested, a monitoring module is set on the computer, and the core board to be tested and the computer are arranged in the same subnet segment, and the IP of the core board to be tested is set on the computer Address, the UDP port number that the test module uses, and the test module listens to the UDP data packet that the monitoring module sends on this UDP port number; The core board and the computer send UDP protocol packets to each other to exchange test information; The computer sends a test command packet with parameters specified by the user, and the core board receives the test command packet sent by the computer and parses the test command packet; Determine whether to test the connectivity of the business, if so, perform the connectivity test of the business by inserting and extracting cell operations, and then go to the next step; if not, go to the next step; Determine whether to locate service connectivity faults or internal traffic information, if yes, collect the cell count value of each internal sampling point, and then go to the next step; if not, go to the next step; Determine whether there is an abnormal alarm on the core board, if so, collect abnormal information, report the operation result to the computer, and then go to the next step; if not, go to the next step; The computer receives the test results from the core board and displays the test results. 2. The method for testing the data subscriber line access module core board according to claim 1, wherein the step of performing the connectivity test of the service by inserting and extracting cell operations further comprises the following steps: Construct a specific cell, which is used to identify that this is a cell inserted by the test system when recycling; Select the location of the loopback cell; The computer monitoring module orders the test module to actively create a two-way permanent virtual connection internally as a path for inserting and extracting cells according to the information to be tested; The test module inserts test cells along the entrance of one direction of the connection, and receives the test cells after setting the loop state at the entrance of the other direction during initialization to determine whether the connectivity test of the connection is successful. 3. The method for testing the core board of the data subscriber line access module according to claim 2, wherein the method for selecting the position of the loopback cell can be one of the following methods: short-circuit a designated chip A specific port sends and receives low-voltage differential signal lines to test the service connectivity of the specific port; or the chip loopback on the core board is used to test the bus connectivity between the chip and other chips; Loopbacks are set on other connected hardware boards or other systems of this system to test the connectivity between the chips and the bus on the entire path. 4. The method for testing the data subscriber line access module core board according to claim 1, 2 or 3, wherein the data field of the UDP protocol packet stores the specific content of the test command, and the test command includes Frame type field, operation indication field, response status field and message field. 5. The method for testing a core board according to claim 1, wherein said locating service connectivity faults or internal flow information refers to locating a certain link from the entrance to the exit of a certain direction of a designated permanent virtual connection Service connectivity failure or observe internal traffic information in this direction. 6. The method for testing the core board of the data subscriber line access module according to claim 1, wherein the cell count value of each sampling point in the collection further refers to the active collection of the test module by the computer monitoring module command test module. The cell count of each key point inside the designated direction of the permanent virtual connection is reported to the computer monitoring module. 7. The method for testing the core board of the data subscriber line access module according to claim 6, wherein, when the computer monitoring module initiates a flow performance test, the test module first selects the cell corresponding to the specified connection on each chip Sampling points for traffic testing, collect cell flow information of each sampling point in real time, package them, and send them to the monitoring module in the agreed format for real-time display and analysis. 8. The method for testing the data subscriber line access module core board according to claim 6, characterized in that, when it comes to the traffic analysis of IP and asynchronous transfer mode conversion, each sampling point collects the information of the data packet, Analyze the performance of packet flow inside the connection from the perspective of packets, or perform mixed analysis of packets and cell flows at the same time. 9. The method for testing the core board of the data subscriber line access module according to claim 1, wherein the step of collecting abnormal information and reporting the operation result to the computer is to monitor the main control board with a certain frequency by the test module For the internal alarm information, if the alarm information accumulates to a certain set threshold within a specified time, a capture message is actively sent to the monitoring module and displayed on the interface of the monitoring module. 10. The method for testing the core board of the data subscriber line access module according to claim 1, wherein the test method is based on the core board of the data subscriber line access module based on the PMC asynchronous transfer mode switching chip.

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