CN1323521C - A Method of Time Slot Adjustment in Virtual Concatenation Group - Google Patents
A Method of Time Slot Adjustment in Virtual Concatenation Group Download PDFInfo
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- CN1323521C CN1323521C CNB031316352A CN03131635A CN1323521C CN 1323521 C CN1323521 C CN 1323521C CN B031316352 A CNB031316352 A CN B031316352A CN 03131635 A CN03131635 A CN 03131635A CN 1323521 C CN1323521 C CN 1323521C
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Abstract
一种虚级联组中时隙调整的方法,包括:在SDH映射路径的上行和解映射路径的下行分别加一个交叉矩阵(交叉容量根据实际需要配置),用于作虚级联时隙调整;将虚拟支路代替虚级联每个能够处理的VC12,按照虚级联要求的时隙顺序配置虚级联组中各个虚拟支路对应的VC4总线和VC12的顺序号;对所述交叉矩阵进行初始化配置;对虚级联组进行时隙配置和时隙调整。采用本发明所述的方法,可以降低了交叉板的时分压力,也降低了由于时隙算法修改所带来的风险。
A method for adjusting time slots in a virtual concatenation group, comprising: adding a crossover matrix (crossover capacity configured according to actual needs) on the uplink of the SDH mapping path and the downlink of the demapping path, for adjusting the virtual concatenation time slots; Replace each VC12 that can be handled by virtual concatenation with virtual branches, and configure the corresponding VC4 bus and VC12 sequence numbers of each virtual branch in the virtual concatenation group according to the time slot order required by virtual concatenation; Initialize the configuration; perform time slot configuration and time slot adjustment for the virtual concatenation group. By adopting the method of the present invention, the time division pressure of the cross board can be reduced, and the risk caused by the modification of the time slot algorithm can also be reduced.
Description
技术领域technical field
本发明涉及同步数字体系(SDH:Synchronous Digital Hierarchy)光传输设备的虚级联组时隙的处理方法。The invention relates to a processing method for a virtual concatenation group time slot of a Synchronous Digital Hierarchy (SDH: Synchronous Digital Hierarchy) optical transmission device.
背景技术Background technique
近年来,基于SDH的多业务传送平台(MSTP:Multi-Service TransportPlatform)技术在城域网中得到了广泛应用,技术该技术的核心思想就是采用VC虚级联的方式来传输数据的业务。VC指的是虚容器,是SDH中的一个专业术语,VC4和VC12表示不同粒度的虚容器,VC4是一个140M的虚容器,VC12是一个2M的虚容器。由于不同的数据业务对带宽要求不一样,而对SDH来说,其每个虚容器承载的业务带宽是有限制的。例如VC12就是一个2M的虚容器,VC4计时一个140M的虚容器。但是实际数据业务的带宽要求可能大于一个虚容器的容量,这就需要将虚容器级联起来合成一个更大带宽的容器承载数据业务,在原理上有两种级联方式,即相邻级联和虚级联。由于虚级联可以进行多路径传输,因此在数据业务的承载过程中,一般采用的是虚级联。通过虚级联对级联的虚容器数量的配置,可以灵活的满足各种数据业务的要求。In recent years, SDH-based Multi-Service Transport Platform (MSTP: Multi-Service Transport Platform) technology has been widely used in metropolitan area networks. The core idea of this technology is to use VC virtual concatenation to transmit data services. VC refers to a virtual container, which is a technical term in SDH. VC4 and VC12 represent virtual containers of different granularities. VC4 is a 140M virtual container, and VC12 is a 2M virtual container. Because different data services have different bandwidth requirements, for SDH, the service bandwidth carried by each virtual container is limited. For example, VC12 is a 2M virtual container, and VC4 counts a 140M virtual container. However, the bandwidth requirements of actual data services may be greater than the capacity of a virtual container, which requires cascading virtual containers to form a larger bandwidth container to carry data services. In principle, there are two cascading methods, that is, adjacent cascading and virtual concatenation. Since the virtual concatenation can carry out multi-path transmission, the virtual concatenation is generally used in the process of carrying data services. The configuration of the number of cascaded virtual containers through virtual cascading can flexibly meet the requirements of various data services.
为了便于恢复,虚级联的时隙排列往往是按照顺序排列的。在以往的处理方式中,这个时隙调整在交叉板上完成,这样不仅会增加交叉板的时分压力,重新配置时隙的时候可能会引起业务的中断,而且降低了配置的灵活性。In order to facilitate restoration, the time slots of the virtual concatenation are often arranged in sequence. In the previous processing method, this time slot adjustment is completed on the cross-connect board, which not only increases the time division pressure on the cross-connect board, may cause service interruption when reconfiguring time slots, but also reduces configuration flexibility.
发明内容Contents of the invention
本发明提出了一种虚级联组的时隙调整的方法,解决虚级联要求的时隙排列方式。根据虚级联的要求,完成时隙顺序的调整,简化网管对数据业务的时隙配置。使得数据业务能够按照电支路板的时隙配置,能够在原有的系统上直接支持数据业务。The invention proposes a time slot adjustment method of a virtual concatenation group, which solves the time slot arrangement mode required by the virtual concatenation. According to the requirements of virtual concatenation, the adjustment of the sequence of time slots is completed, and the time slot configuration for data services by the network management is simplified. The data service can be configured according to the time slot of the electrical tributary board, and the data service can be directly supported on the original system.
在虚级联中并没有支路的概念,但是为了便于描述,在本发明中,将虚级联每个能够处理的VC12当作虚拟支路。There is no branch concept in the virtual concatenation, but for the convenience of description, in the present invention, each VC12 that can be processed by the virtual concatenation is regarded as a virtual branch.
本发明的技术方案为:Technical scheme of the present invention is:
1、一种虚级联组中时隙调整的方法,包括:1. A method for time slot adjustment in a virtual concatenation group, comprising:
1)在SDH映射路径的上行和解映射路径的下行分别加一个交叉矩阵(交叉容量根据实际需要配置),用于作虚级联时隙调整;1) Add a cross-connect matrix to the uplink of the SDH mapping path and the downlink of the de-mapping path (the cross-connect capacity is configured according to actual needs) for virtual concatenation time slot adjustment;
2)将虚拟支路代替虚级联每个能够处理的VC12,按照虚级联要求的时隙顺序配置虚级联组中各个虚拟支路对应的VC4总线和VC12的顺序号;2) Replace each VC12 that can be processed by virtual concatenation with virtual branches, and configure the corresponding VC4 bus and VC12 sequence numbers of each virtual branch in the virtual concatenation group according to the time slot sequence required by virtual concatenation;
3)对所述交叉矩阵进行初始化配置;3) performing initialization configuration on the intersection matrix;
4)对虚级联组进行时隙配置和时隙调整。4) Time slot configuration and time slot adjustment are performed on the virtual concatenation group.
时隙配置变化时,重复上述步骤4)。When the time slot configuration changes, repeat the above step 4).
在上述方案中,对所述交叉矩阵进行初始化配置的方法为:清除上下行交叉矩阵的配置,虚级联组中的时隙清空,虚拟支路的时隙配置信息也清空。In the above scheme, the method for initializing the configuration of the cross-connect matrix is: clearing the configuration of the uplink and downlink cross-connect matrix, clearing the time slots in the virtual concatenation group, and clearing the time slot configuration information of the virtual branches.
在上述方案中,对虚级联组进行时隙配置和时隙调整的方法为:当有时隙配置下发的时候,按虚拟支路号记录每个支路对应的下VC4总线和VC12顺序号以及记录每个支路对应的VC4总线和VC12顺序号,将相应虚拟支路记录的下VC4总线的VC12交叉到相应虚拟支路对应的VC4总线的VC12;,同样将相应虚拟支路的对应的VC4总线的VC12交叉到上VC4总线的VC12;循环处理每个虚拟支路的时隙处理。In the above scheme, the method of time slot configuration and time slot adjustment for the virtual concatenation group is: when the time slot configuration is issued, record the corresponding lower VC4 bus and VC12 sequence number of each branch according to the virtual branch number And record the corresponding VC4 bus and VC12 sequence number of each branch, cross the VC12 of the lower VC4 bus recorded by the corresponding virtual branch to the VC12 of the corresponding VC4 bus of the corresponding virtual branch; The VC12 of the VC4 bus is crossed to the VC12 of the upper VC4 bus; the time slot processing of each virtual branch is processed in a loop.
采用本发明所述的方法,解决了SDH设备上数据业务时需要对时隙算法的修改(可以将数据业务板当作普通支路板来配置,其中支路的数量等于虚级联组能够处理的VC12的数量),降低了交叉板的时分压力,也降低了由于时隙算法修改所带来的风险。同时也加快了数据业务的软件开发时间,当虚级联处理模块能够处理的VC12的数目增加/减少的时候,只需要增加/减少虚拟支路数目,增大/减小交叉矩阵的容量且修改虚级联组中各个支路对应的VC4总线和VC12的顺序号即可,其他处理方式相类似。Adopt the method described in the present invention, need to revise to time slot algorithm when solving the data business on SDH equipment (data service board can be configured as common tributary circuit board, wherein the quantity of branch circuit is equal to virtual concatenation group and can handle The number of VC12), which reduces the time division pressure of the cross-connect board, and also reduces the risk caused by the modification of the time slot algorithm. At the same time, it also speeds up the software development time of data services. When the number of VC12s that can be processed by the virtual concatenation processing module increases/decreases, it is only necessary to increase/decrease the number of virtual branches, increase/decrease the capacity of the cross-connect matrix and modify The sequence numbers of the VC4 bus and VC12 corresponding to each branch in the virtual concatenation group are sufficient, and other processing methods are similar.
附图说明Description of drawings
图1是时隙调整的硬件连接关系图;Fig. 1 is the hardware connection diagram of time slot adjustment;
图2是时隙调整的初始化配置图;Fig. 2 is an initialization configuration diagram of time slot adjustment;
图3是时隙命令配置流程图;Fig. 3 is a time slot command configuration flowchart;
图4是本发明的一个实施例的硬件连接关系图。Fig. 4 is a hardware connection diagram of an embodiment of the present invention.
具体实施方式Detailed ways
图1是本发明的时隙调整的硬件连接关系图。在数据业务映射到SDH方向的上行增加上一个N×N的交叉矩阵,在SDH方向解映射方向下行增加一个N×N的交叉矩阵。Fig. 1 is a hardware connection diagram of time slot adjustment in the present invention. An N×N cross-connect matrix is added in the uplink where the data service is mapped to the SDH direction, and an N×N cross-connect matrix is added in the downlink in the demapping direction of the SDH direction.
图2和图3共同组成本发明的时隙调整流程。其中,图2描述时隙调整的初始化配置流程;图3描述时隙配置流程。在技术方案部分已对此进行详细说明,此处不再重复。Figure 2 and Figure 3 together constitute the time slot adjustment process of the present invention. Among them, FIG. 2 describes the initialization configuration process of time slot adjustment; FIG. 3 describes the time slot configuration process. This has been described in detail in the technical solution section, and will not be repeated here.
图4是本发明的一个实施例的硬件连接关系图。下面结合图4对本发明的时隙调整进行具体说明。Fig. 4 is a hardware connection diagram of an embodiment of the present invention. The time slot adjustment of the present invention will be specifically described below with reference to FIG. 4 .
假设虚级联处理模块能够处理126个VC12,其对应2条VC4总线,每条VC4总线有63个VC12。虚级联恢复时2条VC4总线是按照间插排列的。我们按照如下处理:数据业务可以映射进126个虚拟支路口,其中第i个虚拟支路口对应虚级联模块处理中的(i%2,i/2)时隙(注:第一个参数代表VC4总线号,第二个代表VC12号)。Assume that the virtual cascade processing module can handle 126 VC12s, which correspond to two VC4 buses, and each VC4 bus has 63 VC12s. When the virtual cascade is restored, the two VC4 buses are arranged in an interleaved manner. We process it as follows: data services can be mapped into 126 virtual tributary ports, where the i-th virtual tributary port corresponds to the (i%2, i/2) time slot in the processing of the virtual concatenation module (note: the first parameter represents VC4 bus number, the second represents VC12 number).
当初始化的时候,126个虚拟支路对应所有VC12的时隙都通过上下行时隙交叉矩阵清空。When initializing, the 126 virtual tributaries corresponding to all VC12 time slots are cleared through the uplink and downlink time slot crossover matrix.
当有时隙配置命令下发的时候,通过第i虚拟支路对应的时隙映射表,首先将配置虚拟支路的下时隙(K,L)(注:K为下VC4总线号,L为VC12时隙号)交叉到虚级联处理的时隙(i%2,i/2),同时记录下时隙;接着配置虚级联处理的时隙(i%2,i/2)交叉到上时隙(M,N)(注:M为上VC4总线号,N为VC12时隙号),同时记录上时隙。轮询每个支路完成时隙顺序的调整。When the time slot configuration command is issued, through the time slot mapping table corresponding to the i-th virtual branch, firstly configure the lower time slot (K, L) of the virtual branch (Note: K is the lower VC4 bus number, L is VC12 time slot number) crosses to the time slot (i%2, i/2) of virtual concatenation processing, and records the time slot simultaneously; then configures the time slot (i%2, i/2) of virtual concatenation processing to cross to Upper time slot (M, N) (note: M is the number of the upper VC4 bus, N is the number of the VC12 time slot), and record the upper time slot at the same time. Polling each tributary to complete the adjustment of the slot sequence.
当时隙配置发生变化的时候,只是重新配置上下行交叉矩阵即可,虚拟支路与虚级联处理的时隙对应关系不发生不变化。When the slot configuration changes, it is only necessary to reconfigure the uplink and downlink cross-connect matrix, and the corresponding relationship between the virtual tributary and the virtual concatenation processing time slot does not change.
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| CN100440770C (en) * | 2005-07-22 | 2008-12-03 | 中兴通讯股份有限公司 | A method for returning remote defect indication of a virtual concatenation group |
| CN1905425B (en) * | 2005-07-28 | 2011-11-30 | 中兴通讯股份有限公司 | Method of light plate-to-light plate time slot time division optimizing configaration of SDH system |
| CN1905426B (en) * | 2005-07-28 | 2010-07-14 | 中兴通讯股份有限公司 | A time-division optimal allocation method of time slots in lower branch of SDH system optical board |
| CN101179351B (en) * | 2006-11-07 | 2012-05-09 | 中兴通讯股份有限公司 | Dynamic allocation method for space/time division cross time slot resource of synchronous digital hierarchy equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1028101A (en) * | 1996-07-10 | 1998-01-27 | Fujitsu Ltd | Time-division signal switching system |
| WO2001047158A1 (en) * | 1999-12-20 | 2001-06-28 | Kabushiki Kaisha Toshiba | Transmitter and tributary interface board |
| CN1400790A (en) * | 2001-07-28 | 2003-03-05 | 深圳市中兴通讯股份有限公司上海第二研究所 | Rolay interface device based on synchronous digital transmission system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1028101A (en) * | 1996-07-10 | 1998-01-27 | Fujitsu Ltd | Time-division signal switching system |
| WO2001047158A1 (en) * | 1999-12-20 | 2001-06-28 | Kabushiki Kaisha Toshiba | Transmitter and tributary interface board |
| CN1400790A (en) * | 2001-07-28 | 2003-03-05 | 深圳市中兴通讯股份有限公司上海第二研究所 | Rolay interface device based on synchronous digital transmission system |
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