CN1318914C - Method for making wafer coupons and method for evaluating overlay alignment between mask patterns - Google Patents

Abstract

A method for evaluating the overlay level between two masks. First, a first mask having a first mask pattern is used to perform a photolithography process to define an etching wafer and form a first exposure pattern. Then, a photoresist layer is covered on the surface of the wafer, and a second mask with a second mask pattern is used to define the photoresist layer to form a second exposure pattern. Then, the offset values of the first exposure pattern and the second exposure pattern on the wafer in the X direction, the Y direction or the X and Y directions are measured. Then, the exposure distortion value (scaling) and the overlay offset value (overlay offset) of the offset value are corrected to obtain the overlay level between the first and second mask patterns. Finally, whether the overlay level meets a certain specification is determined.

Description

The method of the contraposition standard that changes between the method for making wafer test piece and assessment mask pattern

Technical field

The invention relates to manufacture of semiconductor, be particularly in the photolithography in semiconductor manufacturing, assess the anterior layer mask and work as a layer mask, or stride the repeatedly method of contraposition standard (mask registration) between layer mask.

Background technology

In manufacture of semiconductor, each little shadow step (photolithography) all means the set pattern of formation on the semiconductor-based end, for example forms conductive layer, semiconductor layer or the insulation course etc. of set pattern.And in order to form semiconductor subassembly on the semiconductor-based end, both little each time shadow mask of fixed structure in the proxy component all need carry out accurately repeatedly to calibration (overlay registration) corresponding to the semiconductor-based end.

Generally speaking, the semiconductor-based end,, and in little shadow mask, respectively comprise one group of corresponding mutually alignment mark (alignment marks) usually, as the usefulness of the aligning between follow-up little shadow step as semiconductor crystal wafer.Since the alignment mark that in little shadow last time, forms may be in processing procedure etched erasing, so in the little shadow mask of each layer difform alignment mark may be set, use and recognize each alignment mark corresponding to which layer pattern and its relative position.And, then can in little shadow step of exposure, determine interstructural configuration relation by the position distribution of each alignment mark.

In general, the aligning specification (registration specification) of pattern can be for reference in the subsidiary usually mask of the mask that dispatches from the factory of mask fabrication company.General step of exposure then is directly to aim at default alignment mark (alignment mark).Referring to Fig. 1, be depicted as in the known techniques, on wafer, aim at the synoptic diagram of exposure with mask.As can be seen from Figure, set in advance four alignment marks 12 on the wafer 10.And the alignment mark (alignment mark) 22 of four corners of the exposing patterns 20 on the mask on falling each is repeatedly right with the alignment mark 12 on the wafer.By aiming at of alignment mark 22 and alignment mark 12, can guarantee pattern 20 on the mask correct transfer to both allocations on the wafer 10.

In above-mentioned exposure process, mask carries out with aiming at by alignment mark of wafer, yet is present in offset error existing in the mask pattern 20, and can't eliminate by the calibration in when exposure.Therefore, in the semiconductor structure that it is right that multilayer changes, changing to skew between two-layer little shadow pattern perhaps striden changing to error between the layer, may surpass intrinsic permissible range.And along with the critical dimension reduction of manufacture of semiconductor, to above-mentioned repeatedly also more little to the tolerance of error.

In known techniques, desire detects and changes to skew, carries out processing procedure usually and studies, and after the wafer after will studying makes test piece, with the profile of X-ray scanning type electron microscope (X-SEM) observation test piece, as shown in Figure 2, to confirm to observe the repeatedly contraposition standard between each layer.Yet, the shortcoming of this kind method be the profile of test piece only can reflect mask pattern ad-hoc location repeatedly to accuracy, but can't show mask pattern integral body repeatedly to skew situation and degrees of offset.On the other hand, if desire to observe the pattern distribution on test piece surface with critical size-scanning type electron microscope (CD-SEM), be widely used in the bottom anti-reflection layer (BARC) of improving little shadow quality in the processing procedure at present, its material is disturbed the signal of CD-SEM easily, therefore also is difficult for direct repeatedly contraposition standard with CD-SEM Direct observation crystal column surface pattern.

Summary of the invention

In order to address the above problem, one object of the present invention is to provide a kind of repeatedly method of assessing between mask of contraposition standard, can be in order to the position accurate (registration data) of assessment mask pattern.

Another object of the present invention is to provide a kind of method of assessing the contraposition standard that changes between the discontinuous mask, can be in order to assess the repeatedly contraposition standard between discrete two-layer mask.

A further object of the present invention is to provide a kind of method for making with the wafer test piece, can make the wafer test piece of finishing directly observe and measure crystal column surface with critical size-scanning type electron microscope (CD-SEM), to assess the repeatedly contraposition standard between two masks.

The method of the contraposition standard (mask registration) that changes between a kind of assessment mask pattern wherein comprises the following step:

Carry out micro-photographing process with one first manufacture of semiconductor mask, form one first exposing patterns with definition etching one wafer with one first mask pattern;

Cover a photoresist layer at this crystal column surface;

Define this photoresist layer and form one second exposing patterns with one second manufacture of semiconductor mask with one second mask pattern, wherein this first manufacture of semiconductor mask and this second manufacture of semiconductor mask comprise one when layer and anterior layer repeatedly to relation or stride interlayer repeatedly to concerning;

First exposing patterns on the measurement wafer and second exposing patterns are in the off-set value of directions X, Y direction or X and Y direction;

Proofread and correct the exposure deformation values (scaling) of this off-set value and repeatedly to off-set value (overlay offset) to obtain the repeatedly contraposition standard between first and second mask pattern; And

Judge repeatedly whether the contraposition standard closes in a set specification.

The method of the contraposition standard (mask registration) that changes between a kind of assessment mask pattern comprises the following step:

With one first manufacture of semiconductor mask, on a wafer, define and form one first pattern;

Cover an anti-reflecting layer at crystal column surface;

Form a photoresist layer on the anti-reflecting layer surface;

Define this photoresist layer to form one second pattern with one second manufacture of semiconductor mask, wherein this first manufacture of semiconductor mask and this second manufacture of semiconductor mask comprise one when layer and anterior layer repeatedly to relation or stride interlayer repeatedly to concerning;

Remove the anti-reflecting layer that exposes in second pattern;

Measure between first pattern on the wafer and second pattern in the off-set value of directions X, Y direction or X and Y direction;

Proofread and correct the little shadow distortion (scaling) of this off-set value with repeatedly to skew (overlay offset) to obtain the contraposition standard that changes between first and second mask; And

Judge repeatedly whether the contraposition standard closes in a specification.

Described first mask pattern and second mask pattern are respectively one of active region (AA) pattern, grid structure (GC) pattern, zanjon electric capacity (DT) pattern, bonding land contact window (CS) pattern, bit line contacting window opening (CB) pattern or set metal interconnecting layer pattern.

The method of the contraposition standard (mask registration) that changes between described assessment mask pattern, wherein: described this off-set value is to scan microscope (CD-SEM) by critical size-electronics to measure in top view (top-view) mode.

The method of the contraposition standard (mask registration) that changes between described assessment mask pattern, wherein first and second exposing patterns is to be exposing unit with first and second manufacture of semiconductor mask pattern distinctly, exposure forms through the A subzone on wafer.

The method of contraposition standard (mask registration) repeatedly between described assessment mask pattern wherein measures first exposing patterns and the off-set value of second exposing patterns on the wafer, is to be measured by B exposure area of selection in A the zone, wherein B≤A.

The method of the contraposition standard (mask registration) that changes between described assessment mask pattern, wherein exposing patterns is a rectangle, and comprises exposure area and at least one intermediate exposures zone in four corners of this rectangle in this B exposure area at least.

Described directions X off-set value is the directions X by each B zone, each selects complex points, off-set value between first and second exposing patterns of measurement each point, and described Y direction off-set value, then by each B regional Y direction, each selects complex points, the off-set value between first and second exposing patterns of measurement each point.

The complex points of described directions X is by the selected M row of each regional directions X, whenever lists and gets N point, measures the off-set value of each point, and the complex points of described Y direction is by the selected P hurdle of each regional Y direction, whenever lists and gets Q point, measures the off-set value of each point.

The method of the contraposition standard (mask registration) that changes between described assessment mask pattern, wherein the exposure in each zone distortion (scaling) rate is the slope (S) of N some off-set value after linearity returns of the every row of directions X, perhaps is the slope (S) of Q some off-set value after linearity returns on the every hurdle of Y direction.

The method of the contraposition standard (mask registration) that changes between described assessment mask pattern, wherein each hurdle or respectively changing to off-set value (overlay offset) of row are the mean value of each sampling spot in every hurdle or the every row after (scaling) correction is out of shape in exposure.

The method of the contraposition standard (mask registration) that changes between described assessment mask pattern judges wherein repeatedly whether the contraposition standard closes in set specification, is to be undertaken by a statistics method.

A kind of method of making the wafer test piece is applicable to and makes the wafer test piece that is applicable to that critical size-scanning type electron microscope (CD-SEM) is observed, and wherein comprises the following step:

With one first manufacture of semiconductor mask, on a wafer, define and form one first pattern;

Form a photoresist layer at crystal column surface;

Define this photoresist layer to form one second pattern with one second manufacture of semiconductor mask, to form the wafer test piece of observing usefulness for one critical size-scanning type electronics, wherein this first manufacture of semiconductor mask and this second manufacture of semiconductor mask comprise one when layer and anterior layer repeatedly to relation or stride the changing of interlayer to concerning.

A kind of method of making the wafer test piece is applicable to and makes the wafer test piece that is applicable to that critical size-scanning type electron microscope (CD-SEM) is observed, and wherein comprises the following step:

With one first manufacture of semiconductor mask, on a wafer, define and form one first pattern;

Cover an anti-reflecting layer at crystal column surface;

Form a photoresist layer on the anti-reflecting layer surface;

Define this photoresist layer to form one second pattern with one second manufacture of semiconductor mask;

Remove the anti-reflecting layer that exposes in this second pattern, to form the wafer test piece of observing usefulness for one critical size-scanning type electronics, wherein this first manufacture of semiconductor mask and this second manufacture of semiconductor mask comprise one when layer and anterior layer repeatedly to relation or stride the changing of interlayer to concerning.

The method of the repeatedly contraposition standard between assessment mask provided by the present invention can be assessed the position accurate (registration data) of mask pattern; And assess between the discontinuous mask the repeatedly method of contraposition standard, can be in order to assess the repeatedly contraposition standard between discrete two-layer mask; Another method for making with the wafer test piece of the present invention can make the wafer test piece of finishing directly observe and measure crystal column surface with critical size-scanning type electron microscope (CD-SEM), to assess the repeatedly contraposition standard between two masks.

Description of drawings

Figure 1 shows that known mask on wafer, aim at the exposure synoptic diagram.

Figure 2 shows that in the known techniques, observe changing in the wafer test piece profile accuracy with X-ray scanning type electron microscope (X-SEM).

Figure 3 shows that according in one embodiment of the invention the method flow of the contraposition standard that changes between the assessment mask pattern.

Fig. 4 A to Fig. 4 E is depicted as according in one embodiment of the invention, makes the flow process of wafer test piece with two set mask patterns.

Fig. 5 A to Fig. 5 B is depicted as according in one embodiment of the invention, the picture on surface of observing and measure the wafer test piece with critical size-scanning type electron microscope (CD-SEM) the right synoptic diagram that changes.

Fig. 6 A to Fig. 6 C is depicted as according in one embodiment of the invention, measures the sampling method of exposing patterns off-set value in a wafer test piece.

Fig. 7 A is depicted as one of exposure distortion (scaling) after the mask pattern exposure.

Fig. 7 B is depicted as changing to one of skew (overlay offset) between two mask patterns.

Fig. 8 A and Fig. 8 B are depicted as the directions X of Fig. 6 C and the curve of deviation of Y direction sampling spot.

Fig. 8 C and Fig. 8 D are depicted as the curve of deviation after exposure is out of shape (scaling) and repeatedly skew (overlay offset) is proofreaied and correct among Fig. 8 A and Fig. 8 B.

Embodiment

The invention provides a kind of method for making of wafer test piece, and the contraposition standard (mask registration) that further changes between its assessment mask pattern of mat.At first, carry out micro-photographing process, in a wafer test piece, define and form first exposing patterns with first mask with first mask pattern.Then, form a photoresist layer, define photoresist layer to form second exposing patterns with second mask again with second mask pattern at this crystal column surface.Afterwards, with first exposing patterns on critical size-scanning type electron microscope (CD-SEM) measurement wafer and second exposing patterns changing in directions X, Y direction or X and Y direction to off-set value.Secondly, proofread and correct the exposure deformation values (scaling) of this off-set value with repeatedly to off-set value (overlay offset) to obtain the contraposition standard (registration data) that changes between first and second mask pattern.At last, judge whether the repeatedly contraposition standard between two masks closes in set specification, with the quality of assessment mask.

And in preferred embodiment, said method is pre-formed a bottom anti-reflection layer (BARC) before more can being included in and covering photoresist layer, after photoresist layer forms second exposing patterns, removes the bottom anti-reflection layer of exposing again.In one embodiment, can cross etching (over-etch), so that more remarkable and be easy to observation between first and second exposing patterns to what bottom anti-reflection layer further be carried out appropriateness.

Following conjunction with figs. is described in detail as follows:

The present invention can be applicable in a series of manufacture of semiconductor masks, check when between layer mask and anterior layer mask repeatedly to relation, also be applicable to check stride between layer mask repeatedly to concerning.In preferred embodiment, mask can comprise active region (AA) patterned mask, grid structure (GC) patterned mask, zanjon electric capacity (DT) patterned mask, bonding land contact window (CS) patterned mask, bit line contacting window opening (CB) patterned mask or define each layer mask of each layer metal interconnecting layer pattern.Yet, according to different semiconductor subassembly needs, different mask pattern designs being arranged, the present invention is not as limit.

According to the present invention, can detect continuous repeatedly right when between layer and anterior layer mask, for example the contraposition standard that changes between zanjon electric capacity (DT) patterned mask and active region (AA) patterned mask.Also can detect and stride repeatedly right between layer mask, for example the repeatedly contraposition standard between zanjon electric capacity (DT) patterned mask and grid structure (GC) patterned mask.And repeatedly right according between the different masks, the offset direction between its pattern is also inequality.General skew is divided into directions X or Y direction mostly, and perhaps X and Y direction produce skew simultaneously, looks closely the pattern definition between two masks and decides.

Below with between zanjon electric capacity (DT) patterned mask and active region (AA) patterned mask repeatedly to be example, referring to the method flow of Fig. 3, describe in detail according to the present invention with the flow process of the contraposition standard (mask registration) that changes between the assessment mask pattern.And in the wafer test piece, form two kinds of mask patterns right flow process that changes, then with Fig. 4 A to Fig. 4 E aid illustration.

At first carry out step S302: carry out micro-photographing process with first mask, form first exposing patterns with the definition etched wafer with first mask pattern.Shown in Fig. 4 A, on wafer 400, form photoresist layer 404 earlier.And in one embodiment, can before photoresist layer 404, form a bottom anti-reflection layer (BARC) 402 earlier, to promote follow-up little shadow quality.Then, photoresist layer 404 is carried out micro-photographing process, have the photoresist layer 404 of zanjon electric capacity (DT) pattern with formation to have the first mask (not shown) of zanjon electric capacity (DT) pattern.Serve as the curtain cover then with patterned light blockage layer 404, etched wafer 400 about 1000 , the groove 406 of formation zanjon electric capacity on wafer 400.Then, remove photoresist layer 404 and bottom anti-reflection layer 402, shown in Fig. 4 B with conventional approaches.

Then carry out step S304: cover a photoresist layer at crystal column surface.Referring to Fig. 4 C, in preferable situation, can cover bottom anti-reflection layer (BARC) 408 on the wafer 400 earlier to fill up groove 406, then in anti-reflecting layer 408 surface coverage photoresist layers 410.

Then carry out step S306: define this photoresist layer and form second exposing patterns with second mask with second mask pattern.Referring to Fig. 4 D, on photoresist layer 410, form active region (AA) pattern 412 with active region (AA) patterned mask (not shown).Then continuous with conventional approaches, serve as the curtain cover with photoresist layer 410, etching bottom anti-reflection layer 408 forms the active region opening.In preferred embodiment,, continue 408 about 5 seconds of etching bottom anti-reflection layer, to form more obvious active region pattern 412 referring to Fig. 4 E.

According to the present invention, said method only needs to define first mask pattern on wafer, and the formation of second mask pattern can directly be defined on the photoresist layer, therefore effectively simplifies the manufacturing process of wafer test piece.

By aforesaid way, by changing of active region (AA) pattern 412 that forms on zanjon electric capacity (DT) pattern 406 that forms on the observation wafer and the photoresist layer 410, can learn whether the design of zanjon electric capacity (DT) patterned mask and active region (AA) patterned mask is accurately repeatedly right to situation.And in said method, can choose two kinds of mask patterns wantonly carries out repeatedly comparison, is not subject to appoint a two-layer continuous mask pattern.In addition, in the above-mentioned wafer test piece manufacturing process, remove the mode of bottom anti-reflection layer in advance, can avoid follow-up when observing crystal column surface, the interference that the electric conductivity of antireflection material may cause with critical size-electron microscope (CD-SEM).

Then carry out step S308: first exposing patterns on the measurement wafer and second exposing patterns are in the off-set value of directions X, Y direction or X and Y direction.And as for the definition of X and Y direction, can be in advance prior to demarcating the direction of one deck on the wafer specimen sheet earlier, and all the other each layers are all corresponding to this stratum boundary its relativeness calmly.

Referring to Fig. 5 A and Fig. 5 B, be depicted as according in the embodiments of the invention changing between the two-layer mask of three kinds of patterns that may present to synoptic diagram.Fig. 5 A is depicted as in one embodiment of the invention, and GC (grid structure) is repeatedly right to the exposing patterns of DT (zanjon electric capacity).For try to achieve between GC and the DT repeatedly to skew, so that critical size-mode of looking is observed wafer test piece surface more than the scanning type electron microscope (CD-SEM), and, measure the length difference of the DT pattern distribution GC both sides in the area I on the wafer 400 along the Y direction of test piece.Referring to Fig. 5 A, the DT pattern shift value of area I is:

$Y_I=\frac{(b_1-b_2)/2+(b_3-b_4)/2}{2}$

Because it is that a unit occurs repeatedly that the DT pattern in the foregoing description is two, so its off-set value on average calculates together with two, yet according to the difference of pattern, can also calculate separately, that is:

$Y_{I-1}=\frac{(b_1-b_2)}{2}$ With $Y_{I-2}=\frac{(b_3-b_4)}{2}$

Then referring to Fig. 5 B, be depicted as according to one embodiment of the invention, AA (active region) is repeatedly right to the exposing patterns of DT (zanjon electric capacity), and two kinds of patterns all produce repeatedly to relation at directions X and Y direction.So that critical size-mode of looking measures set locational DT pattern to the directions X of AA pattern and the length difference of Y direction more than the scanning type electron microscope (CD-SEM).Referring to Fig. 5 B, the DT pattern of area I II with respect to the directions X off-set value of AA pattern is:

$X_{\mathrm{III}}=\frac{(a_1-a_2)}{2}$

And the Y direction off-set value of area I II is:

$Y_{\mathrm{III}}=\frac{(b_1-b_2)}{2}$

And according to the corresponding relation of different pattern between semiconductor layer, below with first tabular lift several mask patterns repeatedly to the time, the directivity that it repeatedly measures off-set value, with and the production order of test piece.

First table

The comparison project	Direction	Test piece
			AA-DT	X and Y	Wafer with DT structure
GC-DT	Y	Wafer with DT structure
			CB-AA	X	Wafer with AA structure
CB-GC	Y	Wafer with GC structure
			CS-GC	Y	Wafer with GC structure
M0-CB	X	Wafer with TEOS layer

Above-mentioned test piece be meant desire observe two kinds of mask patterns repeatedly to the time, need the structure prior to forming in the wafer test piece, for example changing to relation of desire comparison AA-DT then forms the structure of DT pattern earlier in the wafer test piece, cover photoresist layer thereon, and on photoresist layer, forming the AA pattern.As shown in first table, compare between different mask patterns repeatedly when concerning, the order that is formed between mask pattern on the test piece wafer may be opposite with general manufacture of semiconductor, and this is the clear patterns degree in order to improve CD-SEM and to observe, but this case is not as limit.

And according to different manufacture of semiconductor grades, the assembly pattern that the exposure back forms on a slice test wafer may be up to millions of, in order effectively to measure by taking a sample in a large amount of assembly patterns of critical size-scanning type electron microscope (CD-SEM) from the wafer top view, below, describe sampling mode in detail further by Fig. 6 A to Fig. 6 C.

Referring to Fig. 6 A, formed exposing patterns exposes with step-by-step movement subregion (Step and Repeat) to be depicted as a wafer.Along with the wafer volume increases, single mask pattern is mostly via behind regional exposure A time, to form exposing patterns on whole wafer.As shown in Figure 6A, in one embodiment, wafer 400 is an exposing unit with DT pattern on the mask and AA pattern respectively via DT and AA mask, carries out repeatedly exposing after 24 times with the subregion step-by-step system, form complete exposing patterns 600, wherein comprise exposing unit 601-624.In preferred embodiment, through behind the step S302 to S306, select four jiao 601 in the rectangle, 606,619 and 624 of exposing patterns 600, and six exposing units such as 609 and 616 of zone line are observed with CD-SEM.Generally speaking, the exposing unit number (B) of sampling should be less than or equal to total exposure unit number (A), and than tool table person be around the wafer with each peek resample area of center.

Below with Fig. 6 B, be example further with exposing unit 619, illustrate that the pattern shift in the exposure area of sampling measures mode.At first choose complex points along the measurement direction of two mask patterns generation off-set value.With what compare AA-DT is example to pattern repeatedly, because X and Y direction all may produce skew, therefore distinctly chooses M by the directions X of exposure area 619 and is listed as, and whenever lists and is divided into N point, and choose the P hurdle along the Y direction, and every hurdle is divided into Q point.If comparison GC-DT then only needs to choose the P hurdle by the Y direction, Q point divided on every hurdle.Wherein, M or P are all 〉=1.

Shown in Fig. 6 B, be changing of AA-DT to pattern block 619.Directions X is the side two row X1 and the X2 of selected block 619 respectively, and every row 16 points of all taking a sample are equidistantly between points and are evenly distributed.The Y direction is the side two hurdle Y1 and the Y2 of selected block 619 also, and every hurdle 12 points of all taking a sample are equidistantly between points and are evenly distributed.And ordered series of numbers or number hurdle can also can be chosen in equidistant mode between the side of exposure area 619 in the position on row and hurdle on exposure area 619.And, when repeatedly just not dropping on the sampling spot, at this moment, then adopt equidistant translation mode to pattern as if the AA-DT assembly according to the actual exposure situation, measure near the changing of the most close sampling spot to the off-set value of pattern.

Fig. 6 C is depicted as with reference to the method for measurement shown in above-mentioned Fig. 5 B, to the AA-DT of Fig. 6 B repeatedly to pattern at X1 and X2 two row, and the CD-SEM measurement off-set value of each sampling spot in Y1 and Y2 two hurdles.

Then, carry out step S310 still referring to Fig. 3: proofread and correct the exposure deformation values (scaling) of this off-set value with repeatedly to off-set value (overlay offset) to obtain the contraposition standard that changes between this first and second mask pattern.

Repeatedly contraposition standard for itself of assessing AA-DT two masks accurately in when design, therefore (scaling) is out of shape in the exposure that needs the eliminating mask pattern to be caused in exposure process and repeatedly to skew (overlay offset) error, these errors are started usually because of operate miss in little shadow process or board error.Exposure distortion (scaling) generally comes from the horizontal-shift of mask in exposure process, and the exposing patterns that is caused amplifies.Shown in Fig. 7 A, when mask 700 when exposure the time is not kept level, then mask pattern will form the exposing patterns 710 that elongates amplification during projection exposure.Repeatedly to skew (overlay offset) then mostly because between mask and wafer, or between mask and mask along the skew of X or Y direction.Shown in Fig. 7 B, between DT mask pattern and AA mask pattern, along the directions X offset d ₁Distance is along Y direction offset d then ₂Distance.

Below be example with Fig. 6 C, further specify according in one embodiment of the invention with Fig. 8 A to Fig. 8 D, the exposure of correction exposure pattern 619 distortion (scaling) with repeatedly to the method for skew (overlay offset).At first shown in Fig. 8 A and Fig. 8 B, each hurdle in the zone 619 and the distribution of each line skew value are carried out linear regression.Fig. 8 A is depicted as distribution of offset values and the linear regression thereof on each 16 sampling spot of X1 and X2, and Fig. 8 B is depicted as distribution of offset values and linear regression thereof on respectively 12 sampling spots of Y1 and Y2.

According to the linear regression curve of each hurdle or each row, the off-set value of recoverable each point is to get rid of the interference of exposure distortion (scaling).The correction of the exposure distortion of X1 can be calculated by following formula:

M’ _(X1)n＝m _(X1)n-(n-1)×S _X1

M wherein _{(X1) n}For X1 lists the measurement off-set value that n is ordered, S _X1Be the linear regression slope of a curve (slope) of X1, and M ' _{(X1) n}Then be the off-set value of the last n point of X1 after overexposure distortion is proofreaied and correct (n=1～N).

Same, the exposure distortion of X2 is proofreaied and correct and can be calculated according to following formula:

M’ _(X2)n＝m _(X2)n-(n-1)×S _X2

Same, the exposure distortion of Y1 is proofreaied and correct and can be calculated according to following formula:

P’ _(Y1)q＝p _(Y1)q-(q-1)×S _Y1

P wherein _{(Y1) q}For Y1 lists the measurement off-set value that q is ordered, S _Y1Be the linear regression slope of a curve (slope) of Y1, and P ' _{(Y1) q}Then be the off-set value of the last q point of Y1 after overexposure distortion is proofreaied and correct (q=1～Q).

Same, the exposure distortion of Y2 is proofreaied and correct and can be calculated according to following formula:

P’ _(Y2)q＝p _(Y2)q-(q-1)×S _Y2

And by above-mentioned formula as can be seen, on behalf of the exposure of exposing patterns, the linear regression slope (S) on each row or each hurdle promptly be out of shape (scaling) rate.

And then carry out on the exposure area 619 repeatedly skew (overlay offset) being proofreaied and correct of each row or each hurdle.In one embodiment, X1, X2, Y1 and Y2's changes to off-set value (overlay offset) O _X1, O _X2, O _Y1With O _Y2Respectively with following various calculating:

$O_{X1}=\frac{\underset{n=1}{\overset{N}{\mathrm{\Σ}}}{M}_{\left(X1\right)n}^{\′}}{N}$

${\mathrm{<figure-callout\; id="2"\; label="O\; X"\; filenames="C0315746900301.png"\; state="\{\{state\}\}">O</figure-callout>}}_X=\frac{\underset{n=1}{\overset{N}{\mathrm{\&Sigma;}}}{M}_{\left(X2\right)n}^{\&prime;}}{N}$

$O_{Y1}=\frac{\underset{q=1}{\overset{Q}{\mathrm{\&Sigma;}}}{P}_{\left(Y1\right)q}^{\&prime;}}{Q}$

${\mathrm{<figure-callout\; id="2"\; label="O\; Y"\; filenames="C0315746900301.png"\; state="\{\{state\}\}">O</figure-callout>}}_Y=\frac{\underset{q=1}{\overset{Q}{\mathrm{\&Sigma;}}}{P}_{\left(Y2\right)q}^{\&prime;}}{Q}$

That is in every row or the every row, the off-set value of gained is average after the overexposure distortion is proofreaied and correct, and promptly represents changing to skew (overlay offset) of its exposing patterns.Then change to off-set value O according to above-mentioned _X1, O _X2, O _Y1With O _Y2, the off-set value of each point is to obtain the repeatedly contraposition standard (registrationdata) of each point, as following various among corrected X 1, X2, Y1 and the Y2:

M _(X1)n＝M’ _(X1)n-O _X1

M _(X2)n＝M’ _(X2)n-O _X2

P _(Y1)q＝P’ _(Y1)q-O _Y1

P _(Y2)q＝P’ _(Y2)q-O _Y2

And the each point of proofreading and correct the back gained contraposition directrix curve that changes, then shown in Fig. 8 C and Fig. 8 D.Be respectively X1 and X2 two row shown in Fig. 8 C and Fig. 8 D, and each point resulting contraposition standard (registration) that changes after overexposure is out of shape (scaling) and repeatedly skew (overlay offset) is proofreaied and correct in Y1 and Y2 two hurdles.Generally speaking, when the layout between two masks is all accurate, then pass through above-mentioned correction after, resulting curve of deviation should be 0, that is not skew, curve and X-axis or Y-axis coincide.Yet by among Fig. 8 C and Fig. 8 D figure as can be seen, the repeatedly contraposition standard between DT and AA two masks does not conform to fully, and this kind skew may be started because of in DT mask or AA mask, even two produced simultaneously mask design of mask or making error.

Referring to Fig. 3, carry out step S312 at last: judge repeatedly whether the contraposition standard closes in certain specification.Because repeatedly contraposition standard (registration data) is represented changing to accuracy of mask pattern, in addition, the accurate skew in design position between pattern also is difficult for proofreading and correct or compensating by little shadow board usually.Therefore, if error is excessive between pattern, then changing between each layer will cause the modular construction mistake to skew.Therefore, according to above-mentioned steps S308 to S310, obtain respectively six exposure areas such as 601,606,619,624,609 and 616 among Fig. 6 A through overexposure distortion (scaling) with repeatedly skew (overlay offset) is proofreaied and correct the resulting contraposition standard (registrationdata) that changes in back after, and then each regional AA-DT mask repeatedly carried out statistical study to off-set value, to assess between two masks at the repeatedly accurate error amount of contraposition of each resample area whether in permissible range.If when surpassing permissible range, then mask must be made again, to guarantee the manufacture of semiconductor quality.

Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any those who are familiar with this art, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.

Claims (24)

1. A method for evaluating the alignment level between mask patterns, characterized in that it comprises the following steps: performing a lithography process with a first semiconductor process mask having a first mask pattern to define etch a wafer to form a first exposure pattern; Covering a photoresist layer on the surface of the wafer; A second exposure pattern is formed by defining the photoresist layer with a second semiconductor process mask having a second mask pattern, wherein the first semiconductor process mask and the second semiconductor process mask include a layer and The overlay relationship of the previous layer or the overlay relationship between layers; Measuring the offset value of the first exposure pattern and the second exposure pattern on the wafer in the X direction, the Y direction, or the X and Y directions; correcting the exposure distortion value and the overlay offset value of the offset value to obtain an overlay level between the first and second mask patterns; and It is determined whether the alignment level meets a predetermined specification. 2. The method for evaluating the alignment level between mask patterns according to claim 1, characterized in that: the first mask pattern and the second mask pattern are respectively the active region pattern, the gate structure pattern, and the deep trench capacitor pattern. pattern, a pattern of contact openings in the land, a pattern of openings in the bitline contacts, or a predetermined pattern of the metal interconnection layer. 3. The method for evaluating the overlay level between mask patterns according to claim 1, wherein the offset value is measured by CD-SEM top view. 4. The method for evaluating the overlay level between mask patterns according to claim 1, characterized in that: the first and second exposure patterns use the first and second mask patterns as exposure units respectively. The circle is formed by A sub-regional exposure. 5. The method for evaluating the alignment level between mask patterns according to claim 4, wherein the offset value between the first exposure pattern and the second exposure pattern on the wafer is measured by A regions Select B exposure areas for measurement, where B≤A. 6. The method for evaluating the alignment level between mask patterns according to claim 5, wherein the exposure pattern is a rectangle, and the B exposure areas include at least the exposure areas of the four corners of the rectangle and at least An intermediate exposure area. 7. The method for evaluating the alignment level between mask patterns according to claim 5, characterized in that: the X-direction offset value is obtained by selecting multiple points in the X-direction of each of the B areas, and measuring each The offset value between the first and second exposure patterns of the point, and the offset value in the Y direction is selected from the Y direction of each B area, and a plurality of points are selected to measure the first and second points of each point. The offset value between the two exposure patterns. 8. The method for evaluating the alignment level between mask patterns according to claim 7, characterized in that: the plural points in the X direction are selected from M columns in the X direction of each area, and N points are taken in each column , to measure the offset value of each point. The complex points in the Y direction are selected from the P column in the Y direction of each area, and Q points are taken from each column to measure the offset value of each point. 9. The method for evaluating the alignment level between mask patterns according to claim 8, characterized in that: the exposure deformation rate of each region is the linear regression of the N point offset values of each column in the X direction Slope, or the slope after linear regression of the offset values of Q points in each column in the Y direction. 10. The method for evaluating the overlay level between mask patterns according to claim 9, characterized in that: the overlay offset value of each column or column is the offset of each sampling point in each column or column Values are averages corrected for exposure distortion. 11. The method for evaluating the overlay level of mask patterns according to claim 9, wherein determining whether the overlay level meets a predetermined specification is performed by a statistical method. 12. The method for evaluating the overlay level of mask patterns according to claim 1, wherein the step of covering the surface of the wafer with a photoresist layer comprises: Covering an anti-reflection layer on the surface of the wafer; forming a photoresist layer on the surface of the anti-reflection layer; Before the step of measuring the offset value between the first exposure pattern and the second exposure pattern on the wafer in the X direction, the Y direction or the X and Y directions, the step of removing the anti-reflection layer exposed in the second pattern is also included. . 13. The method for evaluating the overlay alignment of mask patterns according to claim 12, characterized in that: the first mask pattern and the second mask pattern are respectively an active region pattern, a gate structure pattern, and a deep trench capacitor pattern. One of the opening pattern of the land contact window, the opening pattern of the contact window of the bonding area, the opening pattern of the contact window of the bit line, or a predetermined pattern of the metal interconnection layer. 14. The method for evaluating the overlay alignment of mask patterns according to claim 13, wherein the offset value of the wafer is measured by CD-SEM top view. 15. The method for evaluating the overlay alignment of mask patterns according to claim 12, characterized in that: the first and second exposure patterns use the first and second mask patterns as exposure units respectively, in the crystal The circle is formed by A sub-regional exposure. 16. The method for evaluating the overlay alignment of mask patterns according to claim 15, wherein the measurement of the offset value between the first exposure pattern and the second exposure pattern on the wafer consists of A regions Select B exposure areas for measurement, where B≤A. 17. The method for evaluating the overlay alignment of mask patterns according to claim 16, wherein the exposure pattern is a rectangle, and the B exposure areas include at least the exposure areas of the four corners of the rectangle and at least An intermediate exposure area. 18. The method for evaluating the overlay alignment of mask patterns according to claim 16, characterized in that: the X-direction offset value is obtained by selecting a plurality of points in the X-direction of each of the B areas, and measuring each The offset value between the first and second exposure patterns of the points, and the offset value in the Y direction is selected from the Y direction of each B area, and a plurality of points are selected to measure the first and second exposures of each point. Offset value between patterns. 19. The method for evaluating the overlay alignment of mask patterns according to claim 18, characterized in that: the plurality of points in the X direction is selected from M columns in the X direction of each area, and N points are selected for each column Points, to measure the offset value of each point, the plural points in the Y direction are selected from the P column in the Y direction of each area, and Q points are taken on each column to measure the offset value of each point. 20. The method for evaluating the overlay level of mask patterns according to claim 19, characterized in that: the exposure deformation rate of each region is the slope after linear regression of the offset values of N points in each column in the X direction , or the slope after linear regression of the offset values of Q points in each column in the Y direction. 21. The method for evaluating the overlay alignment between mask patterns according to claim 20, characterized in that: the overlay offset value of each column or each column is the offset of each sampling point in each column or each column Values are averages corrected for exposure distortion. 22. The method for evaluating the overlay level of mask patterns according to claim 12, wherein determining whether the overlay level meets a predetermined specification is performed by a statistical method. 23. A method for making a wafer test piece, suitable for making a wafer test piece suitable for critical dimension-scanning electron microscope observation, characterized in that it comprises the following steps: using a first semiconductor process mask to define and form a first pattern on a wafer; Forming a photoresist layer on the surface of the wafer; defining the photoresist layer with a second semiconductor process mask to form a second pattern to form a wafer coupon for CD-scanning electronic observation, wherein the first semiconductor process mask and the first semiconductor process mask The second semiconductor process mask includes a stacking relationship between a current layer and a previous layer or a stacking relationship between layers. 24. The method for manufacturing a wafer test piece according to claim 23, wherein the step of forming a photoresist layer on the surface of the wafer comprises: Covering an anti-reflection layer on the surface of the wafer; forming a photoresist layer on the surface of the anti-reflection layer; After the step of defining the photoresist layer with a second semiconductor process mask to form a second pattern, the step of removing the anti-reflection layer exposed in the second pattern is also included.

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