CN1317813C - Magnetically Isolated Gate Drivers - Google Patents

Abstract

A magnetically isolated gate driver includes a pulse width modulation driver that generates a pulse width modulated signal; a pulse isolation transformer; the input end capacitor is connected with the input end of the transformer in series; the output end capacitor is connected with the output end of the transformer in series; the output end diode is connected with the output end of the magnetic isolation grid driver in parallel; the output end low-power metal oxide semiconductor field effect transistor is connected with the output end capacitor in series, the source electrode of the output end low-power metal oxide semiconductor field effect transistor is connected to one terminal of the output end of the transformer, and the grid electrode of the output end low-power metal oxide semiconductor field effect transistor is connected to the other terminal of the output end of the transformer; the output end of the transformer, the output end capacitor, the output end diode and the low-power metal oxide semiconductor field effect transistor form a series loop. By the circuit, when the power supply is started and closed, the magnetic isolation grid driver can not cause the misconduction of the switch tube, thereby effectively preventing the failure of the whole power supply.

Description

Magnetically Isolated Gate Drivers

(1) Technical field

The invention relates to a magnetically isolated driver, in particular to a magnetically isolated gate driver provided with a power metal oxide semiconductor field effect transistor so as to have better transient characteristics.

(2) Background technology

Magnetically isolated drivers can be used to drive high-end power MOSFETs. A commonly used drive circuit is shown in Figure 1. Capacitor C1 is the DC isolation capacitor at the input terminal, the reference direction of the capacitor voltage is shown in Figure 1, T1 is the isolation transformer, QM is the driven MOSFET, and C3 is the equivalent input capacitance of QM. S1 is the output signal waveform of the pulse width modulation driver (PWM Driver), S2 is the waveform at the input end of the transformer, and S3 is the output waveform of the magnetic isolation driver. Please refer to Figure 2 for the working waveform of the circuit shown in Figure 1. Assume that the period of the driver output signal S1 is T, the duty cycle is D, and the amplitude is V1 in a steady state. At the same time, it is assumed that the input-output turn ratio of the transformer T1 is 1. , then the voltage on the DC isolation capacitor C1 at the input end is DV1 in a steady state. When S1 is at high level, S3 is also at high level, and its amplitude is (V1-VC1), that is, (1-D)V1. When S1 is at low level, S3 is at negative level, and its amplitude is (-VC1), that is, DV1. It can be seen that the circuit of this isolated driver is simple, and the driven metal-oxide-semiconductor field-effect transistor has a reverse driving voltage, and has strong anti-interference ability. However, it needs to be improved in that when the duty cycle D is large, the high-level amplitude (1-D) V1 of S3 is small, which may lead to insufficient QM driving voltage. Thus, this driver circuit is not suitable for applications where the duty cycle varies greatly.

Please refer to Fig. 3 again. Fig. 3 is another magnetic isolation driver of the prior art. The polarity of the transformer is shown in Fig. 3, wherein capacitor C1 is the DC isolation capacitor at the input end, capacitor C2 is the DC isolation capacitor at the output end, and C3 is the DC isolation capacitor at the output end. is the equivalent driven MOSFET input capacitance. Please refer to Figure 4 for the working waveform of the circuit shown in Figure 3, where S1 is the output signal waveform of the pulse width modulation driver, S2 is the waveform at the input end of the transformer, and S3 is the output waveform of the magnetic isolation driver. Assuming that the period of the driver output signal S1 is T, the duty cycle is D, and the amplitude is V1 in the steady state, and the input-output turn ratio of the transformer T1 is 1, the voltage on the DC isolation capacitor C1 at the input end in the steady state is VC1=DV1, and the voltage on the DC isolation C2 at the output terminal is VC2=DV1. The reference directions of the two capacitor voltages are shown in FIG. 3 . When S1 is high level, S2 and S3 are also high level. The high-level amplitude V2 of S2 is (V1-VC1), that is, (1-D)V1. Therefore, the high-level amplitude of S3 is V3=V2+VC2, which is V1. It can be seen that this amplitude has nothing to do with the duty cycle D , that is, it does not change with the change of the PWM duty cycle. At the moment when S1 becomes zero, the input and output voltage of the transformer becomes -DV1, so the diode DR is turned on, S3 is short-circuited, and the voltage on C3 becomes zero immediately.

Due to the DC isolation of capacitors C1 and C2, transformer T1 can achieve resetting at large PWM duty cycles. In this way, the characteristics of the circuit are: the output voltage amplitude can remain unchanged when the duty ratio changes; the duty ratio can be greater than 0.5 and the driving loss is small.

The main disadvantage of this magnetically isolated driver is that, for some reason, when the output signal of the PWM driver disappears, that is, the driving signal S1 will remain at zero, as mentioned above, and at this time S3 will immediately become zero. But then the transformer T1 will gradually enter saturation under the (-DV1) voltage at the input. When the transformer T1 is gradually saturated, the amplitude of the input and output voltage of the transformer T1 gradually decreases from DV1, and since the voltage VC2 on C2 is still DV1, in this way, the voltage applied to C3 of the driven metal oxide semiconductor field effect transistor will be incremented from zero. Until when the transformer T1 is saturated, the input and output voltage of the transformer T1 becomes 0, and the charge on the capacitor C1 is quickly released to zero. In this way, the voltage added to C3 at this time is the voltage DV1 of C2. It can be seen that, when the driving signal disappears, the driving circuit may cause the driven MOSFET to be misconducted for a long time. In this state, the actual measured S3 is shown in Figure 5. Therefore, this kind of driving circuit does not have better transient characteristics, and when the power supply is turned on and off, it will cause false conduction of the switch tube, thereby causing the failure of the entire power supply.

(3) Contents of the invention

The object of the present invention is to provide a magnetically isolated gate driver provided with a power metal oxide semiconductor field effect transistor. The magnetically isolated gate driver has better transient characteristics and will not cause switching when the power supply is turned on and off. The false conduction of the tube can effectively prevent the failure of the entire power supply.

The magnetic isolation gate driver of the present invention includes: a pulse width modulation driver (PWM Driver), which can generate a pulse width modulation signal; a pulse isolation transformer, which is connected to the pulse width modulation driver; an input capacitor, which is connected in series with the input terminal of the transformer; the capacitor at the output terminal is connected in series with the output terminal of the transformer; the diode at the output terminal is connected in parallel with the output terminal of the magnetically isolated gate driver; the low-power metal-oxide-semiconductor field-effect transistor at the output terminal is It is connected in series with the output terminal capacitor, its source is connected to one terminal of the transformer output terminal and the gate is connected to the other terminal of the transformer output terminal; the transformer output terminal, the output terminal capacitor, the output terminal diode and the low-power metal oxide The semiconductor field effect transistors form a series loop.

The present invention can also provide a transformer isolation drive circuit, which is connected to the pulse width modulation driver and the driven metal oxide semiconductor field effect transistor, and is used to realize isolated pulse width modulation for the driven metal oxide semiconductor field effect transistor. The variable drive includes: a pulse isolation transformer; the input terminal capacitor is connected in series with the input terminal of the transformer; the output terminal capacitor is connected in series with the output terminal of the transformer; the output terminal diode is used to isolate the output of the drive circuit from the transformer The terminals are connected in parallel; the output terminal low-power metal oxide semiconductor field effect transistor is connected in series with the output terminal capacitor, its source is connected to one terminal of the transformer output terminal and the gate is connected to the other terminal of the transformer output terminal; and the The output terminal of the transformer, the capacitor at the output terminal, the diode at the output terminal and the low-power metal-oxide-semiconductor field-effect transistor form a series loop.

According to the features of the above invention, the magnetically isolated gate driver of the present invention forms a series loop with the output terminal of the transformer, the capacitor at the output terminal, the diode at the output terminal, and the low-power metal-oxide-semiconductor field effect transistor, so that the magnetically isolated gate driver can be used as a driving signal After disappearing, the driving signal on the driven MOSFET also disappears at the same time. In this way, in the state of fault protection, shutdown, etc., when the pulse width modulation signal disappears, the driving signal on the driven metal oxide semiconductor field effect transistor disappears, thereby eliminating the problem of false conduction.

(4) Description of drawings

FIG. 1 is a circuit diagram of a conventional magnetic isolation driver.

Fig. 2 is a main working waveform diagram of the magnetic isolation driver shown in Fig. 1 .

FIG. 3 is a circuit diagram of another conventional magnetic isolation driver.

FIG. 4 is a main working waveform diagram of the magnetic isolation driver shown in FIG. 3 .

FIG. 5 is an operation waveform diagram of the output driving signal of the circuit shown in FIG. 3 when the pulse width modulation signal disappears.

FIG. 6 is a circuit diagram of the first embodiment of the magnetically isolated gate driver of the present invention.

FIG. 7 is an operation waveform diagram of the circuit shown in FIG. 6 outputting a driving signal when the pulse width modulation signal disappears.

FIG. 8 is a circuit diagram of the second embodiment of the magnetically isolated gate driver of the present invention.

FIG. 9 is a circuit diagram of the third embodiment of the magnetically isolated gate driver of the present invention.

(5) specific implementation

Please refer to FIG. 6 , which shows the first embodiment of the magnetically isolated gate driver of the present invention. The magnetically isolated gate driver includes: a pulse width modulation driver (PWM Driver) for generating a pulse width modulation signal, a pulse isolation transformer T1 with polarity as shown in the figure, connected in series with the input and output ends of the transformer respectively DC blocking capacitors C1, C2 and a low-power metal-oxide-semiconductor field effect transistor Q1 at the output end. Wherein the low-power metal-oxide-semiconductor field effect transistor Q1 is connected in series with the output terminal capacitor C2, its source is connected to one terminal of the output terminal, and the gate is connected to the other terminal of the output terminal, and the output terminal capacitor C2 1. The diode D1 and the low-power MOSFET Q1 form a series loop, the gate of the driven MOSFET is connected to the cathode of the output diode D1, and the source is connected to the anode of the diode D1.

When the drive circuit works in a steady state, its waveform is the same as that in Figure 2. When the amplitude of the drive signal S1 sent by the pulse width modulation driver is V1 and its duty ratio is D, the voltage VC1 on C1 is DV1. Assuming that the turn ratio of the input and output ends of T1 is 1, then the voltage VC2 on C2 is also DV1. When S1 is at a high level, the voltage at the output terminal of the transformer is (1-D)V1, under the action of this voltage, Q1 is always turned on, then the voltage of the signal S3 applied to the driven metal oxide semiconductor field effect transistor is ( VC2+(1-D)V1), which is V1. Once the level of S1 becomes 0, VC1 is reversely applied to the input terminal of the transformer, so that the voltage of S2 is (-DV1), so that the gate-source voltage of Q1 is (-DV1), and Q1 is cut off. But at the same time, its parasitic body diode is forward-conducting, and the diode D1 is also conducting, so that the charge on the driving device can be quickly released through the short circuit, so that the S3 level immediately becomes 0.

For some reason, such as the power supply shutting down due to a fault, S1 starts to stay at zero. At the moment of shutting down, the voltage at the input terminal of transformer T1 becomes -VC1, Q1 is cut off, and VC2 is still DV1 at this moment. Then, the sum of the voltages of the transformer output terminal and the capacitor C2 becomes zero, the charge on C3 passes through C2, the transformer output terminal and the body diode of Q1 are short-circuited, and its voltage quickly becomes zero. Subsequently, as shown in the principle of the circuit in Figure 3, since the voltage on the capacitor C1 is continuously applied to the input terminal of the transformer, the transformer will gradually enter saturation, and its input and output voltage amplitude will gradually decrease to zero. At this stage, the gate-source of Q1 is subjected to negative voltage, so Q1 remains in the off state, and its body diode is also turned off due to the reverse voltage, and the voltage of C2 will not be applied to the output terminal. It can be seen that when the driving signal disappears, VC2 will not be added to C3, and S3 will not be affected by the voltage of C2, so that the false triggering problem in the circuit shown in Figure 3 will not be caused.

Therefore, the addition of Q1 will not affect the steady-state operating characteristics of the driver, and the driven MOSFET still has a good driving waveform when the duty cycle changes greatly. After the pulse width modulation input signal disappears for some reason, the driving signal on the driven MOSFET also disappears, thereby avoiding the long-time false conduction phenomenon in the prior art. Please refer to FIG. 7 , which shows the operation waveform diagram of the output driving signal of the magnetic isolation gate driver of the present invention when the pulse width modulation signal disappears.

It should be understood that although an embodiment of the present invention is disclosed above, the present invention can also adopt other implementation modes. For example, it can also be designed as a magnetically isolated gate driver as shown in FIG. 8 or FIG. 9 . Please refer to FIG. 8 , which differs from the first embodiment shown in FIG. 6 in that the polarity of the transformer of the magnetically isolated gate driver is opposite to that of the transformer shown in FIG. 6 , so the output drive generated by it is The signal is inverted from that of the magnetically isolated gate driver. Please refer to Fig. 9 again, which reveals another implementation situation. The polarity of the transformer in the figure can be any of the ways shown in Fig. 6 and Fig. 8, and the difference is that the capacitor C2 at the output terminal is connected in series Between the anode of the diode D1 and the drain of the low power MOSFET Q1. In the embodiment described above in FIG. 8 and FIG. 9 , the output terminal of the transformer, the capacitor at the output terminal, the diode and the low-power metal-oxide-semiconductor field-effect transistor of the magnetically isolated gate driver all form a series circuit. In addition, the capacitor C1 at the input terminal, the capacitor C2 at the output terminal, and the output terminal can be further connected in parallel with other resistors. In the above embodiments described in Fig. 6, Fig. 8 and Fig. 9, in order to suppress the oscillating voltage that may appear on the winding of the transformer T1, thereby avoiding false triggering of Q1, a diode can be connected in parallel to the capacitor C1, and the anode of the diode It is connected to the contact end of the capacitor C1 and the transformer T1, and its cathode is connected to the other end of the capacitor C1.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes or equivalent replacements made by those familiar with the technology of the present invention according to the spirit of the present invention shall fall within the scope defined in the claims.

Claims (14)

1. A magnetically isolated gate driver, which is connected to a driven metal-oxide-semiconductor field-effect transistor in order to realize isolated pulse width modulation driving, is characterized in that it includes: a pulse width modulation driver, used to generate a pulse width modulation signal; A pulse isolation transformer is connected to the pulse width modulation driver; The input terminal capacitance is connected in series with the input terminal of the transformer; The output terminal capacitance is connected in series with the output terminal of the transformer; an output diode connected in parallel with the output of the magnetically isolated gate driver; an output low-power metal-oxide-semiconductor field-effect transistor connected in series with said output capacitor, with its source connected to one terminal of the transformer output and its gate connected to the other terminal of the transformer output; and The output terminal of the transformer, the capacitor at the output terminal, the diode at the output terminal and the low-power metal-oxide-semiconductor field-effect transistor form a series circuit. When the pulse width modulation signal disappears, the output terminal, the capacitor at the output terminal, and the small The body diode of the power MOSFET releases the charge on the input capacitance of the driven MOSFET, and the driving signal on the driven MOSFET disappears accordingly. 2. The magnetically isolated gate driver according to claim 1, wherein the polarities of the pulse isolation transformers are the same. 3. The magnetically isolated gate driver of claim 1, wherein the polarity of the pulse isolation transformer is reversed. 4. The magnetically isolated gate driver according to any one of claims 1 to 3, wherein the output capacitor is connected in series between the cathode of the diode and the gate of the low-power metal-oxide-semiconductor field-effect transistor between. 5. The magnetically isolated gate driver according to any one of claims 1 to 3, wherein the output capacitor is connected in series between the anode of the diode and the drain of the low-power metal-oxide-semiconductor field-effect transistor between. 6. The magnetically isolated gate driver according to any one of claims 1 to 3, wherein the input capacitor, the output capacitor, and the output terminals are all optionally further connected in parallel with resistors. 7. The magnetically isolated gate driver according to any one of claims 1 to 3, wherein a diode is further connected in parallel to the input capacitor, and the anode of the diode is connected to the junction between the input capacitor and the transformer end, and its cathode is connected to the other end of the input capacitor. 8. A transformer isolation driving circuit, which is connected to a pulse width modulation driver and a driven metal oxide semiconductor field effect transistor to realize isolated pulse width modulation driving for the driven metal oxide semiconductor field effect transistor, It is characterized in that it includes: Pulse isolation transformer; The input terminal capacitance is connected in series with the input terminal of the transformer; The output terminal capacitance is connected in series with the output terminal of the transformer; The output terminal diode is connected in parallel with the output terminal of the transformer isolation driving circuit; an output low-power metal-oxide-semiconductor field-effect transistor connected in series with said output capacitor, with its source connected to one terminal of the transformer output and its gate connected to the other terminal of the transformer output; and The output terminal of the transformer, the capacitor at the output terminal, the diode at the output terminal and the low-power metal-oxide-semiconductor field-effect transistor form a series loop. 9. The transformer isolation drive circuit according to claim 8, wherein the polarities of the pulse isolation transformers are the same. 10. The transformer isolation drive circuit according to claim 8, wherein the polarity of the pulse isolation transformer is reversed. 11. The transformer isolation drive circuit according to any one of claims 8 to 10, wherein the output capacitor is connected in series between the cathode of the diode and the gate of the low-power metal-oxide-semiconductor field-effect transistor . 12. The transformer isolation drive circuit according to any one of claims 8 to 10, wherein the output capacitor is connected in series between the anode of the diode and the drain of the low-power MOSFET . 13. The transformer isolation drive circuit according to any one of claims 8 to 10, characterized in that, the input capacitor, the output capacitor and the output terminals thereof are further selectively connected in parallel with resistors. 14. The transformer isolation drive circuit according to any one of claims 8 to 10, wherein a diode is further connected in parallel to the input capacitor, and the anode of the diode is connected to the contact terminal between the input capacitor and the transformer , and its cathode is connected to the other end of the input capacitor.

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