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CN1304094A - Automatic detection method and detection circuit of palette color difference in computer image - Google Patents

Automatic detection method and detection circuit of palette color difference in computer image Download PDF

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CN1304094A
CN1304094A CN 00101049 CN00101049A CN1304094A CN 1304094 A CN1304094 A CN 1304094A CN 00101049 CN00101049 CN 00101049 CN 00101049 A CN00101049 A CN 00101049A CN 1304094 A CN1304094 A CN 1304094A
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image
signal
test data
rgb
data value
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CN1173267C (en
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蔡俊男
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Mitac International Corp
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Mitac International Corp
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Abstract

A color difference automatic detection circuit of color palette of computer image comprises an analog-digital converter, a buffer and a PCI interface logic circuit. The RGB image analog voltage signal is converted into RGB image digital signal and stored in the buffer. During detection, a, setting the display mode of the display, b, setting the initial RGB image test data value and a preset test maximum value, c, filling the initial test data value into each pixel of the image frame buffer through the image control interface. Comparing whether the RGB image digital signal is consistent with the RGB test data value, if not, sending an error message, if so, comparing R, G, B image digital signals one by one until the test data value reaches the maximum value.

Description

The automatic detection method of palette colour difference of computer image and testing circuit thereof
The present invention is meant a kind of in order to detect the method and the circuit thereof of palette colour difference in the computer image relevant for a kind of detection technique of computer image signal especially.
In a computer system, display is an indispensable output unit, and the user sees through this indicator screen and mode that can vision obtains the output message of this computer system.And because the generally use of windowing software, the display of colored Graphics Mode has become the standard output device of most of personal computer systems.And, mostly be to be plugged on the pci bus of computer system via an image control interface at the color monitor that generally uses now.
The ultimate principle of color monitor is that each basic primary colors (being R, G, B three primary colors) all uses an electron gun, and separately point is presented on separately the color dot.In the display of this type, each pixel all is made up of three points of adjacent RGB, and each color dot has the variation of color range, therefore can produce shades of colour.As for the color that produces why, then by R, G, decide with the suffered impact size of three points of B.The size of impact is then by the decision of the numerical value that stores in the display-memory, therefore as long as suitable this numerical value of setting, and the color on promptly can the control flow curtain.And aspect image quality, can be divided into several display modes, for example high color pattern (High-Color Mode), real color pattern (True-Color Mode) according to its resolution ... Deng.
This color monitor can be divided into direct mapping of a set onto another mode and indirect mapping of a set onto another mode if comply with the corresponding relation of its display-memory and screen pixels.The display-memory of the typical directly color display systems of mapping of a set onto another mode and the corresponding relation of screen pixels are directly to use three display-memories to store the rgb value of each pixel.The rgb signal of display-memory output is sent to the digital to analog converter DAC element of a n position earlier, is converted to RGB image simulation signal, is sent to the CRT circuit of display system again, produces the pixel of screen.
In direct mapping of a set onto another mode, can demonstrate 2 simultaneously if wish 24Planting color, is 1024 at resolution then *In 1024 the system, need altogether to use 3 *1024 *The display-memory of 1024=3M hyte.This system that can demonstrate 224 kinds of colors simultaneously is commonly referred to as real coloured silk (true color) system.Owing to use more storer so cost also expensive.If in system, do not need to demonstrate 2 simultaneously 24Plant color, each only the needs used wherein a part of color, then can adopt the mode of indirect mapping of a set onto another.
In the system of indirect mapping of a set onto another mode, the output of display-memory is not directly to be used as rgb signal, but be used as mapping of a set onto another table (Mapping Table, the mapping of a set onto another table also is called palette) index, in the mapping of a set onto another table, to choose one group of rgb signal that has configured in advance, (every m position is one group to mapping of a set onto another predicative sentence through choosing, and representative has 2 respectively mThe rgb signal of individual color range), is sent to the DAC circuit conversion again and becomes simulating signal, be access to CRT monitor then.In this mode, when the output of each display-memory all is n position, though only can use 2 at every turn 3n(wherein 3n＜m) plants color, but the content of mapping of a set onto another table can be when program be carried out, and the making alterations of dynamic changing color of pixel in the screen, so in the total system, has 2 mIt is available to plant color.
Since on the display screen shown RGB change color greatly and the value of chromatism between every kind of color very little, be not that human vision can accurately be grasped.That is, owing to the restriction of human vision sensitivity, make and can't singly see the mode that look with vision, capture the aberration problem of this image palette fully.So, then ought more can grasp the situation of the image palette RGB aberration of color monitor if can design a kind of device that can be used to detect the computer image palette colour difference.
In view of this, fundamental purpose of the present invention promptly provides a kind of method that is used for detecting the palette RGB aberration of computer image signal, whether it utilizes under the control of the RGB output image signal of coherent signal, image control interface of bus in this computer system and a control program, can detect this RGB output image signal and can conform to test data values.The auto color that technology of the present invention can be used as high color pattern (High-Color Mode), real color pattern (True-Color Mode) and other different mode detects and comparison.
Another object of the present invention provides a kind of automatic testing circuit of palette colour difference of computer image, in order to detect the aberration of the RGB signal of video signal that the image control interface is exported in the computer system, this testing circuit mainly includes analog-to-digital converter, its input end is connected to the rgb signal output terminal of this image control interface respectively, so that this RGB image simulation voltage of signals level conversion is become the RGB video digital signal; Impact damper, its input end is connected in the output terminal of this analog-to-digital converter, sends the RGB video digital signal that process was changed here in order to store this analog-to-digital converter; One pci interface logic circuit is connected in the pci interface of this computer system, in order to provide address decoding signal, wafer enable signal, read to this impact damper.
Another object of the present invention provides a kind of automatic detection method of palette colour difference of computer image, this detection method mainly is that a beginning test data values of setting that opens is seen through the image control interface and inserts in each pixel of image frame (frame) impact damper of image control interface, the RGB image simulation conversion of signals that the image control interface that receives is exported becomes the RGB video digital signal then, relatively whether this receives and conforms to this RGB test data values through the RGB video digital signal of changing again, if both do not conform to, promptly send error messages, if both conform to, then carry out R one by one, G, the comparison of three video digital signals of B is up to R, G, three image test data values of B reach till this predetermined test maximal value.
Other purpose of the present invention and detail circuits framework and method will be further described by following preferred embodiment explanation and accompanying drawing, wherein:
Fig. 1 shows that one includes the simple synoptic diagram of computer system of pci bus;
Fig. 2 is the preferred embodiment circuit diagram that shows palette colour difference testing circuit of the present invention;
Fig. 3 is the further circuit diagram of pci bus interface logical circuit in the displayed map 2, also shows the annexation of this pci bus interface logical circuit and pci bus and each coherent signal of impact damper simultaneously;
Fig. 4 is a control flow chart of the present invention.
The preferred embodiment explanation:
Fig. 1 is the simple synoptic diagram that shows a typical personal computer system, in this system architecture, central processing unit 10 is to see through system's local bus 20 (Local Bus) to be connected with primary memory 11, and this local bus 20 includes an address bus 21, a data bus 22, a control bus 23.This local bus 20 can see through a PCI bridge 12 (PCI Bridge) and connect a pci bus 24.
One image control interface 3 is to be connected on the pci bus 24 of this computer system, sends the signal of video signal of desiring to be presented on the color monitor 31 in order to receive this computer system.These image control interface 3 inside include assemblies such as display-memory, image processor, digital to analog converter, processing through this image control interface, and can send image simulation signal RGB at its image output terminal, be sent to display 31 through connector, cable again, and on this display 31, produce screen pixels.
In framework of the present invention, provide a palette colour difference testing circuit 4, its input end is to receive the image simulation signal RGB that this image control interface 3 is produced.The output terminal of this palette colour difference testing circuit 4 then is to be connected to pci bus 24 via a pci interface logic circuit 5.
Fig. 2 is the embodiment circuit diagram that shows palette colour difference testing circuit of the present invention, this circuit includes one and simulates to digital conversion circuit 41, it is made up of three analog-to-digital converter 41a, 41b, 41c, its input end is image simulation signal R, G, the B that is used for respectively receiving as shown in Figure 1, so that this image simulation voltage of signals level conversion is become the RGB video digital signal.
The output terminal of this analog-to-digital converter 41a, 41b, 41c is to be connected to the impact damper of being made up of three buffer cells 42a, 42b, 42c 42 respectively, sends RGB video digital signal through changing here in order to store this analog-to-digital converter 41a, 41b, 41c respectively.This buffer cell 42a, 42b, 42c see through a pci interface logic circuit 5 again and are connected to pci bus 24.The function of this pci interface logic circuit 5 mainly is in order to provide address decoding signal, wafer enable signal, read to this buffer cell 42a, 42b, 42c.
Fig. 3 is the further circuit diagram of pci bus interface logical circuit 5 in the displayed map 2, also shows this pci bus interface logical circuit 5 and the annexation of pci bus 24 with impact damper 42 each coherent signal simultaneously.In the pci bus specification of standard, its pin can be divided into system support pin, address and data pin, interface control signal, the secondary year signal of bus, reach the error informing signal according to function.Pin function related to the present invention and definition outline as follows: 1.PCICLK (Clock, pci system clock, output): the pci bus clock signal is provided, and its frequency range is 0～33MHz.2.AD0～AD31 (address bus, output): the address/data signal of 32 pci bus.3.C/BE3#～C/BE0# (command/byte enable, the activation of order/position, I/O): the order of multiplexed output and hyte enable signal.When address phase, the corresponding hyte of indication will be referred to the data transfer if start then; When data phase, be function as order, the type of indication bus.(4.FRAME# electronegative potential starts for frame, I/O) started by bus controller, the beginning that designation data shifts, and continue during the whole action.5.IRDY# (electronegative potential starts for Initiator Ready, I/O) started by bus controller, indication is placed in the data of setting up on the bus, or has been ready for reading of data in bus.6.DEVSEL# (Device Select, the target device is chosen, electronegative potential starts): start by the device that is selected, inform bus controller, its cognitive setting position to oneself.7.TRDY# (electronegative potential starts for Target Ready, I/O) started by the device that is selected, indication is placed on data on the bus, or has been ready for reading of data in bus.
This pci bus after bus controller is obtained bus control right, if its desires transferring data, then starts the FRAME# signal when carrying out the transfer of data, and will open that the beginning address places address bus and order places on the C/BE# signal wire.After a clock period, bus controller starts BE ' S# and IRDY# signal, and the reception data have been ready in expression.If it places the data of setting up on the data bus, then start TRDY#; Otherwise, do not start TRDY#.Bus controller detects the TRDY# signal of startup, is about to the data on the readout data bus.If bus controller is not ready for when receiving data as yet, can not start the TRDY# signal, inform that target device (impact damper) postponement places data on the data bus.Therefore, via the mutual control of TRDY# and IRDY# two signal line, bus controller and target device, i.e. transferring data smoothly.
By as can be known shown in Figure 3, include an address latch circuit (address latch circuit) 51 in the pci interface logic circuit 5 of the present invention, it is the address date line AD[31 that is connected in the pci bus 24 of this computer system ... 0], in order to latch the address signal of this address date line.
The address wire that is latched through address latch circuit 51 can be again via an address decoding circuitry 52, and the address signal that this latchs is decoded, to produce a wafer enable signal CE# to this impact damper 42.This address decoding circuitry 52 also can produce a DEVSEL# signal to this pci bus.
One data-latching circuit 53 is the address date line AD[31 that are connected in this pci bus 24 ... 0], in order to latching the data-signal of this address date line, and the latched data signal is delivered to the FPDP DATA of this impact damper 42.
One order latch cicuit 54 is the C/BE# control lines that are connected in this pci bus 24, in order to latch the control command signal of this control line.The command signal that one command decode circuit 56 can be latched this order latch cicuit 54 is decoded, to produce a read-write control signal R/W to impact damper 42.This storer control signal generation circuit 57 also can produce a TRDY# signal to this pci bus.
The C/BE# control line of this pci bus 24 also is connected to an enable signal latch cicuit 55 simultaneously, in order to latch the position enable signal of this control line, and its latched signal can be delivered in the storer control signal generation circuit 57.
In addition, coherent signal FRAME#, the IRDY# of this pci bus 24, PCICLK are connected to one to latch in the control logic circuit 58, produce required latch control signal to address latch circuit 51, data-latching circuit 53, order latch cicuit 54 so that this latchs control logic circuit 58.
Fig. 4 shows control flow chart of the present invention, cooperates earlier figures 1 to circuit framework shown in Figure 3 now, does an explanation as back:
In opening beginning step 101, be the display mode of at first setting display.In an embodiment of the present invention, be to do a preferred embodiment explanation with the color pattern of reality (True Color) of 24 of each pixels.
Then in step 102, setting a RGB test data values (RGB Data Pattern) that opens the beginning is (0,0,0), and in step 103, this is opened beginning test data values (0,0,0) inserts in each pixel of the image frame impact damper (Video Frame Buffer) in the image control interface.Opening the beginning test data values and can be handled in this image frame impact damper through the change-over circuit in the image control interface, and send RGB image simulation signal at its output terminal.This signal becomes the RGB video digital signal with RGB image simulation conversion of signals, and is stored in the impact damper through after the testing circuit of the present invention.In step 104, read the RGB video digital signal through changing in the impact damper in the testing circuit then.
After reading this RGB video digital signal, whether control flow of the present invention can relatively this receive and conform to this RGB test data values through the RGB video digital signal of changing, if both do not conform to, promptly send error messages, if both conform to, then carry out the comparison of R, G, three video digital signals of B one by one, till R, G, three image test data values of B reach this predetermined test maximal value.
In preferred embodiment step of the present invention, after reading this RGB video digital signal, in step 105, relatively whether this RGB video digital signal conforms to the RGB test data values of originally inserting to the image frame impact damper.If both do not conform to, promptly send error messages (step 106), if both conform to, then continue to carry out the following step.
Earlier in step 107, whether the test data values of judging the R image is a presumptive test maximal value (numerical value of this embodiment is 255), if not, then in step 108, increase progressively the test data values of this R image, and get back in the step 103, the step of repeated execution of steps 103 to 108 arrives till 255 up to the test data values of this R image.
When the test data values of this R image had arrived 255, promptly execution in step 109, and the test data values of R image is reset to 0.Then in step 110, whether the test data values of judging the G image is a presumptive test maximal value 255, words if not, then in step 111, increase progressively the test data values of this G image, and get back in the step 103, repeat the step of above-mentioned steps 103 to 110, arrive till 255 up to the test data values of this G image.
When the test data values of this G image had arrived 255, promptly execution in step 112, and the test data values of G image is reset to 0.Then in step 113, whether the test data values of judging the B image is a presumptive test maximal value 255, words if not, then in step 114, increase progressively the test data values of this B image, and get back in the step 103, repeat the step of above-mentioned steps 103 to 113, arrive till 255 up to the test data values of this B image.When the test data values of this B image has arrived 255, promptly finish the aberration testing process (step 115) of whole palette.
In sum; automatic testing circuit of the palette colour difference of computer image provided by the present invention and method; can reach the effect of expection; can be used to detect the aberration situation of the RGB image palette under the various display modes, have the height industrial utilization, and before patented claim, also do not have identical or similar techniques openly formerly; be to be understood that; the above only is the preferred embodiments of the present invention, and protection scope of the present invention should limit with claim of the present invention.

Claims (7)

1．一种电脑影像的调色盘色差自动检测方法，用以检测一电脑系统中影像控制接口所输出至显示器的RGB影像模拟信号的色差，其中该影像控制接口是连接于该电脑系统的PCI总线上，其特征是该检测方法包括下列步骤：1. A method for automatically detecting the color difference of a color palette of a computer image, used for detecting the color difference of an RGB image analog signal output to a display by an image control interface in a computer system, wherein the image control interface is connected to a PCI bus of the computer system , it is characterized in that the detection method comprises the following steps: a．设定该显示器的显示模式；a. set the display mode of the monitor; b．设定一启始的RGB影像测试数据值以及一预定的测试最大值；b. Setting an initial RGB image test data value and a predetermined maximum test value; c．将该启始测试数据值透过影像控制接口填入该影像控制接口的影像帧缓冲器的每一个像素中；c. filling the initial test data value into each pixel of the image frame buffer of the image control interface through the image control interface; d．接收该影像控制接口所输出的RGB影像模拟信号；d. receiving the RGB image analog signal output by the image control interface; e．将该RGB影像模拟信号转换成RGB影像数字信号；e. converting the RGB image analog signal into an RGB image digital signal; f. 比较该接收到并经过转换过的RGB影像数字信号与该RGB测试数据值是否相符，若两者不相符，即发出错误讯息，若两者相符，则逐一进行R、G、B三个影像数字信号的比较，直到R、G、B三个影像测试数据值达到该预定的测试最大值为止。f. Compare whether the received and converted RGB image digital signal is consistent with the RGB test data value. If the two do not match, an error message will be issued. If the two match, the three steps of R, G, and B will be performed one by one. The image digital signal is compared until the three image test data values of R, G, and B reach the predetermined maximum test value. 2．如权利要求1所述的电脑影像的调色盘色差自动检测方法，其特征是步骤b中的启始RGB影像测试数据值系为(0,0,0)，而该预定的测试最大值为(255,255,255)。2. The palette color difference automatic detection method of computer image as claimed in claim 1 is characterized in that the initial RGB image test data value system in the step b is (0,0,0), and the predetermined test maximum value is (255,255,255). 3．如权利要求1所述的电脑影像的调色盘色差自动检测方法，其特征是步骤f包括有下列步骤：3. The palette color difference automatic detection method of computer image as claimed in claim 1, is characterized in that step f comprises the following steps: f1．判断R影像的测试数据值是否已达该预定的测试最大值；f1. Judging whether the test data value of the R image has reached the predetermined maximum test value; f2．若步骤f1中的R影像测试数据值未达该预定测试最大值，则递增该R影像的测试数据值，并重复该RGB影像数字信号与该RGB测试数据值的比较；f2. If the R image test data value in step f1 does not reach the predetermined test maximum value, then increment the R image test data value, and repeat the comparison between the RGB image digital signal and the RGB test data value; f3．若步骤f1中的R影像测试数据值已到达预定测试最大值，则重置该R影像的测试数据值为零；f3. If the R image test data value in step f1 has reached the predetermined test maximum value, then reset the test data value of the R image to zero; f4．判断G影像的测试数据值是否已达一预定测试最大值；f4. judging whether the test data value of the G image has reached a predetermined test maximum value; f5．若步骤f4中的G影像测试数据值未达该预定测试最大值，则递增该G影像的测试数据值，并重复该RGB影像数字信号与该RGB测试数据值的比较；f5. If the G image test data value in step f4 does not reach the predetermined test maximum value, then increment the test data value of the G image, and repeat the comparison between the RGB image digital signal and the RGB test data value; f6．若步骤f4中的G影像测试数据值已到达预定测试最大值，则重置该G影像的测试数据值为零；f6. If the G image test data value in the step f4 has reached the predetermined test maximum value, then reset the test data value of the G image to zero; f7．判断B影像的测试数据值是否已达一预定测试最大值；f7. judging whether the test data value of image B has reached a predetermined test maximum value; f8．若步骤f7中的B影像测试数据值未达该预定测试最大值，则递增该B影像的测试数据值，并重复该RGB影像数字信号与该RGB测试数据值的比较。f8. If the test data value of the B image in step f7 does not reach the preset test maximum value, increment the test data value of the B image, and repeat the comparison between the RGB image digital signal and the RGB test data value. 4．一种电脑影像的调色盘色差自动检测电路，用以检测一电脑系统中影像控制接口所输出的RGB影像信号的色差，其中该影像控制接口是连接于该电脑系统的PCI总线上，其特征是该检测电路包括有：4. A color palette automatic detection circuit for computer images, used to detect the color difference of RGB image signals output by an image control interface in a computer system, wherein the image control interface is connected to the PCI bus of the computer system, its features Yes, the detection circuit includes: 模拟至数字转换器，其输入端分别连接至该影像控制接口的RGB信号输出端，以将该RGB影像模拟信号的电压电平转换成RGB影像数字信号；An analog-to-digital converter whose input ends are respectively connected to the RGB signal output ends of the image control interface, so as to convert the voltage level of the RGB image analog signal into an RGB image digital signal; 缓冲器，其输入端连接于该模拟至数字转换器的输出端，用以储存该模拟至数字转换器所送来经过转换过的RGB影像数字信号；a buffer whose input end is connected to the output end of the analog-to-digital converter for storing the converted RGB image digital signal sent by the analog-to-digital converter; 一PCI接口逻辑电路，连接于该电脑系统的PCI接口，用以提供地址解码信号、晶片致能信号、读/写控制信号至该缓冲器；A PCI interface logic circuit, connected to the PCI interface of the computer system, for providing address decoding signals, chip enabling signals, and read/write control signals to the buffer; 在一控制程序的控制之下，该储存在缓冲器中经过转换过的RGB影像数字信号与该RGB测试数据值相比较，若比较结果为两者不相符，即发出错误讯息，若两者相符，则逐一进行R、G、B三个影像数字信号的比较，直到R、G、B三个影像测试数据值达到预定的测试最大值为止。Under the control of a control program, the converted RGB image digital signal stored in the buffer is compared with the RGB test data value, if the comparison result is that the two do not match, an error message is issued, and if the two match , then compare the three image digital signals of R, G, and B one by one until the test data values of the three images of R, G, and B reach the predetermined maximum test value. 5．如权利要求4所述的电脑影像的调色盘色差自动检测电路，其中该PCI接口逻辑电路包括有：5. The palette color difference automatic detection circuit of computer image as claimed in claim 4, wherein this PCI interface logic circuit comprises: 一地址锁存电路，连接于该电脑系统的PCI总线的地址线，用以锁存该地址线的地址信号；An address latch circuit, connected to the address line of the PCI bus of the computer system, for latching the address signal of the address line; 一地址解码电路，将该地址锁存电路所锁存的地址信号予以解码，以产生一晶片致能信号至该缓冲器；An address decoding circuit, which decodes the address signal latched by the address latch circuit to generate a chip enable signal to the buffer; 一数据锁存电路，连接于该PCI总线的数据线，用以锁存该数据线的数据信号，并将锁存的数据信号送至该缓冲器的数据端口；A data latch circuit, connected to the data line of the PCI bus, for latching the data signal of the data line, and sending the latched data signal to the data port of the buffer; 一命令锁存电路，连接于该PCI总线的C/BE#控制线，用以锁存该控制线的控制命令信号；A command latch circuit, connected to the C/BE# control line of the PCI bus, for latching the control command signal of the control line; 一命令解码电路，将该命令锁存电路所锁存的命令信号予以解码，以产生一存储器控制信号；A command decoding circuit, which decodes the command signal latched by the command latch circuit to generate a memory control signal; 一位致能信号锁存电路，连接于该PCI总线的C/BE#控制线，用以锁存该控制线的位致能信号；A one-bit enable signal latch circuit, connected to the C/BE# control line of the PCI bus, for latching the bit enable signal of the control line; 一存储器控制信号产生电路，接收该命令解码电路所产生的存储器控制信号及位致能信号锁存电路所产生的位致能信号，并据以产生一读/写控制信号至该缓冲器。A memory control signal generation circuit receives the memory control signal generated by the command decoding circuit and the bit enable signal generated by the bit enable signal latch circuit, and generates a read/write control signal to the buffer accordingly. 6．如权利要求5所述的电脑影像的调色盘色差自动检测电路，其特征是该地址解码电路还产生一DEVSEL#信号至该PCI总线。6. The computer image palette color difference automatic detection circuit as claimed in claim 5, wherein the address decoding circuit also generates a DEVSEL# signal to the PCI bus. 7．如权利要求5所述的电脑影像的调色盘色差自动检测电路，其特征是该存储器控制信号产生电路还产生一TRDY#信号至该PCI总线。7. 5. The computer image palette color difference automatic detection circuit as claimed in claim 5, wherein the memory control signal generation circuit also generates a TRDY# signal to the PCI bus.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103453994A (en) * 2012-05-29 2013-12-18 技嘉科技股份有限公司 Color difference test fixture, color difference test interface device and color difference test method
CN106484573A (en) * 2015-09-02 2017-03-08 仁宝电脑工业股份有限公司 High-definition multimedia interface test system and test method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103453994A (en) * 2012-05-29 2013-12-18 技嘉科技股份有限公司 Color difference test fixture, color difference test interface device and color difference test method
CN103453994B (en) * 2012-05-29 2016-03-09 技嘉科技股份有限公司 Color difference test fixture, color difference test interface device and color difference test method
CN106484573A (en) * 2015-09-02 2017-03-08 仁宝电脑工业股份有限公司 High-definition multimedia interface test system and test method thereof

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