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CN1300844C - Ball grid array package and its printed circuit board - Google Patents

Ball grid array package and its printed circuit board Download PDF

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Publication number
CN1300844C
CN1300844C CNB2003101002909A CN200310100290A CN1300844C CN 1300844 C CN1300844 C CN 1300844C CN B2003101002909 A CNB2003101002909 A CN B2003101002909A CN 200310100290 A CN200310100290 A CN 200310100290A CN 1300844 C CN1300844 C CN 1300844C
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signal
power
ground
solder balls
printed circuit
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Expired - Lifetime
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CNB2003101002909A
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CN1529358A (en
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陈俊宏
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Via Technologies Inc
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Via Technologies Inc
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Abstract

一种球栅阵列封装体及其使用的印刷电路板,包括一芯片放置于基板之上表面;多个电源/接地焊球设置于基板之下表面,并紧邻芯片的底部;多个信号焊球设置于基板的下表面,紧邻于电源/接地焊球,其中多个电源/接地焊球位于芯片与多个信号焊球之间。

Figure 200310100290

A ball grid array package and a printed circuit board used therein, comprising a chip placed on the upper surface of a substrate; a plurality of power/ground solder balls arranged on the lower surface of the substrate and adjacent to the bottom of the chip; a plurality of signal solder balls arranged on the lower surface of the substrate and adjacent to the power/ground solder balls, wherein the plurality of power/ground solder balls are located between the chip and the plurality of signal solder balls.

Figure 200310100290

Description

The printed circuit board (PCB) of BGA Package and use thereof
Technical field
The present invention discloses the soldered ball (solder balls) of a kind of BGA Package (ball-grid-array package) substrate and arranges framework, particularly relevant for a kind of power supply/ground connection soldered ball of base plate for packaging ball grid array and the arrangement framework of signal solder balls.
Prior art
Be the microminiaturization that reaches chip size and the continuous lifting of functional requirement, on a microchip, need to do best unit area configuration, and be the true(-)running that reaches work, Chip Packaging also by the design engineer one of the emphasis noted of palpus, how to make chip operation normal, and design the general more microminiaturized encapsulating structure of chip, under constantly design was researched and developed, BGA Package just proposed a kind of method of solution for this reason.
BGA Package is by suitable being arranged on the connection pads with the circuit substrate of one deck scaling powder of spherical metal soldered ball, after circuit substrate is heated to uniform temperature, because scaling powder is, the metal soldered ball dissolves the circuit plate that makes circuit substrate and another have lead-in wire and is connected, and does not handle and need not make other outside lead; So method for packing is not only more convenient in encapsulation, more can do the substrate design of multilayer in design, to increase the space of component design.
At present, the arrangement mode of signal and power supply still has its shortcoming in the existing BGA Package, because existing BGA Package has its fixing mode in the configuration of unit, because power supply/ground connection soldered ball and signal solder balls are close to the outer rim that is arranged at base plate for packaging mutually, therefore, when work is carried out, because two zone next-door neighbours are provided with event, to cause the mutual interference of signal phase and make chip computing generation problem, and the holding wire of signal solder balls must be walked around power supply/ground connection soldered ball, make holding wire must have bigger turnover, perhaps because signal solder balls and power supply/ground connection soldered ball are close to setting, make signal solder balls to be beneficial to the connection of holding wire via be connected to base plate for packaging at the base plate for packaging upper drill hole the 4th layer.
For avoiding disturbing the undesired of the chip operation that causes because of signal, and improve the power supply area power line external area is set, it is the printed circuit board (PCB) that proposes spherical grid array package body of the present invention and use thereof, by to power supply area and signaling zone position configuration again is set, solve the problem that prior art took place.
Summary of the invention
The signal that the invention provides a kind of BGA Package is arranged framework; by power supply area on the chip and signaling zone are done best configuration; avoid the interference of power supply or high frequency cause to reach to chip signal; cause the generation of the undesired or misoperation of work; in addition; because resetting in power supply and signal area, makes the pin of power supply obtain more effective area, more easy in design.
The present invention with the power supply area of spherical grid array package body be arranged at chip around, the signaling zone of packaging body is placed on the periphery, cause dwindling of power plane to avoid power supply area because of the next-door neighbour of signaling zone.The zone of power supply and signal can make the resulting effective area of power pin more enlarge after finishing the processing that reconfigures.
The accompanying drawing simple declaration
Figure 1A is the schematic top plan view that the soldered ball of base plate for packaging ball grid array of the present invention is arranged;
Figure 1B shows the generalized section that the soldered ball of base plate for packaging ball grid array of the present invention is arranged;
Fig. 2 is the generalized section of printed circuit board (PCB) of the present invention; And
Fig. 3 is the schematic top plan view of the signal solder balls backguy of printed circuit board (PCB) of the present invention.
Symbol description
31 base plate for packaging, 32 chips
33 power supplys/34 signal solder balls districts, ground connection soldered ball district
41,42,43 insulating barriers, 50 first signals layers
51 power supply signal layers, 52 ground signalling layer
53 secondary signal layers, 56 printed circuit board (PCB)
330 power supplys/ground connection soldered ball 331 power supplys/ground contact
340 signal solder balls, 341 signal contacts
342 holding wires, 351 conductive plugs
Embodiment
Relevant detailed content of the present invention and technology, conjunction with figs. is described as follows:
The present invention discloses a kind of spherical grid array package body, take advantage of a year integrated circuit (IC) chip at the upper surface of a base plate for packaging, and use encapsulation technology to connect integrated circuit (IC) chip and base plate for packaging, and a plurality of power supplys/ground connection soldered ball and a plurality of signal solder balls are set at the lower surface of base plate for packaging, wherein a plurality of power supplys/ground connection soldered ball is between a plurality of signal solder balls and integrated circuit (IC) chip bottom, make the power delivery of integrated circuit (IC) chip can be directly connected to power supply/ground connection soldered ball, need not the pile warp signal solder balls, moreover, signal solder balls can directly connect takes advantage of the printed circuit board (PCB) that carries this spherical grid array package body, make the wideer power plane of area is arranged between integrated circuit (IC) chip and the base plate for packaging, and the power plane of broad is also arranged between printed circuit board (PCB) and the base plate for packaging, to maintain the stability that signal transmits between the three.
The present invention discloses a kind of printed circuit board (PCB), on printed circuit board (PCB), have and take advantage of the zone of carrying spherical grid array package body, on this zone, arrange power supply/ground contact and signal contact, and power supply/ground contact and signal contact correspond respectively to the power supply/ground connection soldered ball and the signal solder balls of spherical grid array package body, wherein power supply/ground contact is between the integrated circuit (IC) chip of signal contact and spherical grid array package body, make the power supply/ground connection soldered ball of spherical grid array package body directly connect the power supply/ground contact of printed circuit board (PCB), increase the power plane area of packaging body and printed circuit board (PCB).
See also Figure 1A, this figure shows the lower surface vertical view of base plate for packaging 31, chip 32 is placed on the upper surface of base plate for packaging 31, in figure, represent the position of chip 32 on the upper surface of base plate for packaging 31, and power supply/ground connection soldered ball district 33 and signal solder balls district 34 is set on base plate for packaging 31 with dotted line; Wherein, substrate 31 is a base plate for packaging ball grid array, power supply/ground connection soldered ball district 33 at base plate for packaging 31 is provided with a plurality of power supplys/ground connection soldered ball 330, in order to transmit the power supply signal or the ground signalling of chip 32, in the signal solder balls district 34 of base plate for packaging 31 a plurality of signal solder balls 340 are set, in order to transmit the signal of chip 32.Being connected between chip 32 and power supply/ground connection soldered ball 330 and the signal solder balls 340, tie up to the upper surface of base plate for packaging 31, the mode of use metal bonding wire connects the weld pad between chip 32 and the base plate for packaging 31, because this is not an emphasis of the present invention partly, does not add detailed description at this.
Please continue to consult Figure 1A, power supply/ground connection soldered ball district 33 is near the position of chip 32, and signal solder balls district 34 is in close proximity to power supply/ground connection soldered ball district 33, and with profile, this power supply/ground connection soldered ball district 33 is between chip 32 and signal solder balls district 34.See also Figure 1B, chip 32 is positioned at the upper surface of base plate for packaging 31, power supply/ground connection soldered ball district 33 and signal solder balls district 34 are positioned at the lower surface of base plate for packaging 31, and power supply/ground connection soldered ball 330 is in close proximity to the position of the shared base plate for packaging 31 of chip 32, and signal solder balls 340 is in close proximity to the position of power supply/ground connection soldered ball 330.Such soldered ball arrangement mode, make the power supply signal or the ground signalling of chip 32 can be directly connected to power supply/ground connection soldered ball 330, and chip 32 to base plate for packaging 31 can have the wideer power plane of area or ground plane can, make chip 32 to more stable signal transmission is arranged between the base plate for packaging 31.
See also Fig. 2, this figure shows the printed circuit board (PCB) 56 of taking advantage of the base plate for packaging 31 that carries Figure 1A, is the soldered ball arrangement design that cooperates base plate for packaging 31, takes advantage of the printed circuit board (PCB) 56 that carries base plate for packaging 31 also must do the design of correspondence in power supply/ground area and signal area.
See also Fig. 2, printed circuit board (PCB) 56 is made up of four layer line roads, the ground floor circuit is first signals layer 50, second layer circuit is a power supply signal layer 51, the 3rd layer line road is a ground signalling floor 52, the 4th layer line road is a secondary signal floor 53, and power supply/ground contact 331 and signal contact 341 wherein are set respectively on secondary signal layer 53.One insulating barrier 41 is arranged between first signals layer 50 and the power supply signal layer 51, one insulating barrier 42 is arranged between power supply signal layer 51 and the ground signalling layer 52, one insulating barrier 43 is arranged between ground signalling layer 52 and the secondary signal layer 53, and insulating barrier 41,42,43 is in order to isolate the signal on four layer line roads, to avoid the short circuit of four layers of line layer.When the base plate for packaging 31 as Figure 1A is installed on the printed circuit board (PCB) 56, base plate for packaging 31 is positioned over the right side as power supply/ground contact 331 of Fig. 2, and the power supply of power ground contact 331 corresponding base plate for packaging/ground connection soldered ball 330, and the signal solder balls 340 of signal contact 341 corresponding base plate for packaging, that is power supply/ground contact 331 is positioned at the zone of next-door neighbour's base plate for packaging 31, signal contact 341 then is close to power supply/ground contact 331, in other words, power supply/ground contact 331 is between signal contact 341 and base plate for packaging 31.Arrange when printed circuit board (PCB) 56 uses such contact,, connect power supply/ground contact 331 and other line layer, in order to transmission power supply signal or the ground signalling chip to the base plate for packaging 31 via the conductive plug 351 on the four layer line roads of passing through printed circuit board (PCB).Via such design, power delivery between base plate for packaging and the printed circuit board (PCB), need not walk around the signal solder balls of base plate for packaging or the signal contact of printed circuit board (PCB), make that power plane or the ground plane between base plate for packaging and the printed circuit board (PCB) can have broader area.
Please consult Figure 1A and Fig. 2 simultaneously, the power supply of base plate for packaging 31/ground connection soldered ball 330 and signal solder balls 340 are connected to the power supply/ground contact 331 and signal contact 341 of printed circuit board (PCB) 56 respectively, with power supply signal, ground signalling and the generally transmission of signal of carrying out the chip 32 on base plate for packaging 31.
Please continue to consult Fig. 2, be arranged in inner ring and signal contact 341 is arranged in the layout designs of outer ring via power supply/ground contact 331, printed circuit board (PCB) 56 connects the wiring of signal contact 341, need not be via power supply/ground contact 331, can be wired directly to signal contact 341 via the outer ring, and need not utilize metal plug that signal contact 341 is connected to other line layer of printed circuit board (PCB) 56 again, to increase the signal stabilization degree between printed circuit board (PCB) and the base plate for packaging.
See also Fig. 3, the vertical view that shows printed circuit board (PCB) 56, the arrangement position of display power supply/ground contact 331 and signal contact 341 thereon, power supply/ground contact 331 is arranged in the inboard, signal contact 341 is to be arranged in the outside, printed circuit board (PCB) utilizes holding wire 342 to connect signal contacts 341, and all holding wires 342 need not pile warp power supply/ground contact 331, that is all signal contacts 341 can use holding wire 342 to be connected.Therefore, arrange via the soldered ball on the base plate for packaging of the present invention, power supply/ground connection soldered ball is arranged between chip and the signal solder balls, make and take advantage of the printed circuit board (PCB) that carries this base plate for packaging, its signal contact and power supply/ground contact are arranged in a similar manner, make that the signal contact of printed circuit can directly be connected with holding wire, need not use metal plug or perforation means that signal contact is connected to the ground floor signals layer, just can have sufficient holding wire winding space, therefore, with design of the present invention, base plate for packaging with power supply/ground connection soldered ball be arranged in fully chip around, and signal solder balls is arranged in outside power supply/ground connection soldered ball, makes that the integrated circuit on base plate for packaging has signal stabilization degree preferably.
It more than is the detailed description of the printed circuit board embodiment of spherical grid array package body of the present invention and use thereof, by in the detailed description of embodiment as can be known the present invention can solve effectively that prior art is produced because power supply signal disturbs the influence cause, can increase more that prior art chips substrate upper strata may be taken by signaling zone and the area that can't increase power supply area, improve the space of design, make the more elasticity and the utilization effectively of design of chip.
The above only is the preferred embodiments of the present invention, can not limit the scope that the present invention is implemented with it.Be all equivalent variations and modifications of doing according to the scope of claim of the present invention, all should still belong in the scope that claim of the present invention contains.

Claims (12)

1.一种球栅阵列封装体,其至少包含:1. A ball grid array package comprising at least: 一芯片,放置于一基板的第一表面;a chip placed on a first surface of a substrate; 多个电源/接地焊球,设置于该基板的第二表面,并紧邻该芯片的底部;以及a plurality of power/ground solder balls disposed on the second surface of the substrate and adjacent to the bottom of the chip; and 多个信号焊球,设置于该基板的该第二表面,紧邻于该电源/接地焊球,其中该多个电源/接地焊球位于该芯片与该多个信号焊球之间。A plurality of signal solder balls are disposed on the second surface of the substrate, adjacent to the power/ground solder balls, wherein the plurality of power/ground solder balls are located between the chip and the plurality of signal solder balls. 2.如权利要求1所述的球栅阵列封装体,其中该多个电源/接地焊球位于一第一区域,该多个信号焊球位于一第二区域,该第一区域位于该第二区域与该芯片的底部之间。2. The ball grid array package as claimed in claim 1, wherein the plurality of power/ground solder balls are located in a first area, the plurality of signal solder balls are located in a second area, and the first area is located in the second area area and the bottom of the chip. 3.如权利要求1所述的球栅阵列封装体,其中该球栅阵列封装体的该基板被乘载于一印刷电路板之上,该印刷电路板的多个电源/接地接点连接该多个电源/接地焊球,该印刷电路板的多个信号接点连接于该多个信号焊球。3. The BGA package as claimed in claim 1, wherein the substrate of the BGA package is mounted on a printed circuit board, a plurality of power/ground contacts of the printed circuit board are connected to the multiple a power/ground solder ball, and a plurality of signal contacts of the printed circuit board are connected to the plurality of signal solder balls. 4.如权利要求3所述的球栅阵列封装体,其中该多个电源/接地接点排列于该多个信号接点与该芯片之间。4. The BGA package as claimed in claim 3, wherein the plurality of power/ground contacts are arranged between the plurality of signal contacts and the chip. 5.如权利要求3所述的球栅阵列封装体,其中该印刷电路板由四层线路组合而成,由下而上分别为第一信号层、电源信号层、接地信号层与第二信号层,其中该多个电源/接地接点与该信号接点排列于该第二信号层之上。5. The ball grid array package as claimed in claim 3, wherein the printed circuit board is composed of four layers of circuits, which are the first signal layer, the power signal layer, the ground signal layer and the second signal layer from bottom to top. layer, wherein the plurality of power/ground contacts and the signal contacts are arranged on the second signal layer. 6.如权利要求5所述的球栅阵列封装体,其中该多个信号接点直接连接于第二信号层的信号线,无须经由该印刷电路板的该第一信号层来加以绕线。6 . The ball grid array package as claimed in claim 5 , wherein the plurality of signal contacts are directly connected to the signal lines of the second signal layer without routing through the first signal layer of the printed circuit board. 7.一种印刷电路板,至少包含:7. A printed circuit board comprising at least: 一第一信号层;a first signal layer; 一第一绝缘层,位于该第一信号层之上;a first insulating layer located on the first signal layer; 一电源信号层,位于该第一绝缘层之上;a power signal layer located on the first insulating layer; 一第二绝缘层,位于该电源信号层之上;a second insulating layer located on the power signal layer; 一接地信号层,位于该第二绝缘层之上;a ground signal layer located on the second insulating layer; 一第三绝缘层,位于该接地信号层之上;以及a third insulating layer located on the ground signal layer; and 一第二信号层,位于该第三绝缘层之上,其中在该第一信号层上乘载一球栅阵列封装体,在该第一信号层具有多个电源/接地接点与多个信号接点,而该多个电源/接地接点位于该多个信号接点与该球栅阵列封装体的一集成电路芯片之间。a second signal layer, located on the third insulating layer, wherein a ball grid array package is carried on the first signal layer, and the first signal layer has a plurality of power/ground contacts and a plurality of signal contacts, The plurality of power/ground contacts are located between the plurality of signal contacts and an integrated circuit chip of the ball grid array package. 8.如权利要求7所述的印刷电路板,其中该多个电源/接地接点连接于该球栅阵列封装体的多个电源/接地焊球,该多个信号接点连接于该球栅阵列封装体的多个信号焊球。8. The printed circuit board as claimed in claim 7, wherein the plurality of power/ground contacts are connected to the plurality of power/ground solder balls of the BGA package, and the plurality of signal contacts are connected to the BGA package body of multiple signal solder balls. 9.如权利要求8所述的印刷电路板,其中该球栅阵列封装体的一芯片设置于一封装基板的第一表面,该多个电源/接地焊球与该多个信号焊球设置该封装基板的第二表面,而该多个电源/接地焊球位于该多个信号焊球与该芯片的底部之间。9. The printed circuit board as claimed in claim 8, wherein a chip of the ball grid array package is disposed on a first surface of a packaging substrate, the plurality of power/ground solder balls and the plurality of signal solder balls are disposed on the first surface of a package substrate. The second surface of the packaging substrate is packaged, and the plurality of power/ground solder balls are located between the plurality of signal solder balls and the bottom of the chip. 10.如权利要求7所述的印刷电路板,其中该多个信号接点直接连接于该印刷电路板的信号线,以进行信号传输。10. The printed circuit board as claimed in claim 7, wherein the plurality of signal contacts are directly connected to signal lines of the printed circuit board for signal transmission. 11.如权利要求7所述的印刷电路板,其中该多个电源/接地接点以金属栓塞或导电孔方式连接至该电源信号层、该接地信号层与该第一信号层。11. The printed circuit board as claimed in claim 7, wherein the plurality of power/ground contacts are connected to the power signal layer, the ground signal layer and the first signal layer by means of metal plugs or conductive vias. 12.如权利要求7所述的印刷电路板,其中该多个电源/接地接点连接至该球栅阵列封装体的电源/接地焊球,该多个信号接点连接至该球栅阵列封装体的信号焊球。12. The printed circuit board of claim 7, wherein the plurality of power/ground contacts are connected to the power/ground solder balls of the BGA package, and the plurality of signal contacts are connected to the ball grid array package. signal solder balls.
CNB2003101002909A 2003-10-10 2003-10-10 Ball grid array package and its printed circuit board Expired - Lifetime CN1300844C (en)

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CN1300844C true CN1300844C (en) 2007-02-14

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100361298C (en) * 2005-08-10 2008-01-09 威盛电子股份有限公司 Ball grid array packaging structure and substrate thereof
US9204543B2 (en) * 2013-12-03 2015-12-01 Infineon Technologies Ag Integrated IC package
CN106331535A (en) * 2015-07-06 2017-01-11 上海瑞艾立光电技术有限公司 Image collection system
US10177107B2 (en) * 2016-08-01 2019-01-08 Xilinx, Inc. Heterogeneous ball pattern package

Citations (4)

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Publication number Priority date Publication date Assignee Title
US6084777A (en) * 1997-04-23 2000-07-04 Texas Instruments Incorporated Ball grid array package
US6218731B1 (en) * 1999-05-21 2001-04-17 Siliconware Precision Industries Co., Ltd. Tiny ball grid array package
US6246015B1 (en) * 1998-05-27 2001-06-12 Anam Semiconductor, Inc. Printed circuit board for ball grid array semiconductor packages
CN1430267A (en) * 2003-01-15 2003-07-16 威盛电子股份有限公司 Ballgrid array parkaging body

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6084777A (en) * 1997-04-23 2000-07-04 Texas Instruments Incorporated Ball grid array package
US6246015B1 (en) * 1998-05-27 2001-06-12 Anam Semiconductor, Inc. Printed circuit board for ball grid array semiconductor packages
US6218731B1 (en) * 1999-05-21 2001-04-17 Siliconware Precision Industries Co., Ltd. Tiny ball grid array package
CN1430267A (en) * 2003-01-15 2003-07-16 威盛电子股份有限公司 Ballgrid array parkaging body

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Granted publication date: 20070214