CN1392607A - Under Bump Metal Structure - Google Patents

Abstract

The under bump buffer metal structure is suitable for being configured between the welding pad of a chip or a substrate and a welding flux lug, wherein the main component of the welding flux lug is tin-lead alloy, the under bump buffer metal structure at least comprises a metal layer and a buffer metal structure, and the buffer metal structure can alleviate or slow down the negative effect of the electrical and mechanical properties of a intermetallic compound generated when the metal layer is combined with the welding flux lug. The metal layer is disposed on the bonding pad of the chip, and the metal layer is composed of copper, aluminum, nickel, silver or gold, which can react with tin, and the buffer metal structure is disposed between the metal layer and the solder bump to reduce the possibility of generating intermetallic compound between the metal layer and the solder bump.

Description

Under Bump Metal Structure

technical field

The present invention relates to an under bump metal structure (Under Bump Metallurgy, UBM) that can be configured between a pad of a chip or a substrate and a solder bump, and in particular to a solder structure that can be configured on a chip or a substrate. Between the pad and the solder bump, it is used to reduce or slow down the bump bottom buffer metal structure generated by the Inter-Metallic Compound (IMC).

Background technique

Flip Chip Interconnect Technology (Flip Chip Interconnect Technology) mainly uses the arrangement of the area array to arrange multiple pads (pads) of the chip (die) on the active surface (active surface) of the chip, and on the active surface of the chip. Form bumps on each pad, such as solder bumps, and then after flipping the chip, use the bumps on the pads of the chip to connect to the substrate or printed circuit board. (PCB) contacts on the surface. Because the flip-chip bonding technology is applicable to high-pin-count (HighPinCount) chip packaging structures, and has the advantages of reducing the packaging area and shortening the signal transmission path, the flip-chip bonding technology has been widely used in the field of chip packaging. There are various types of solder bumps, and the more common bumps include solder bumps, gold bumps, conductive polymer bumps, and polymer bumps. Bumps are the most widely used.

Please refer to FIG. 1 , which is a schematic cross-sectional view of a conventional UBM layer disposed between a pad of a chip and a bump. The chip 10 has an active surface 12, a protection layer 14 (passivation) and a plurality of welding pads 16 (only one of them is shown), and the protection layer 14 and the welding pads 16 are all configured on the active surface 12 of the chip 10, and protect The layer 14 exposes the bonding pad 16 and is located above the active surface 12 of the chip 10 , wherein the active surface 12 of the chip 10 generally refers to the side of the chip 10 having an active device. In addition, an under bump metallurgy layer 100 is disposed on the pad 16 of the chip 10 to serve as an interface for bonding between the pad 16 and the solder bump 18 .

Please also refer to FIG. 1 , the UBM layer 100 is mainly composed of multiple metal layers such as an adhesion layer 102 (adhesion layer), a barrier layer 104 (barrier layer) and an adhesion layer 106 (wettable layer). Firstly, the adhesive layer 102 can increase the bonding between the metal and the pad 16 and the barrier layer 14 , and its common materials include metals such as chromium, titanium, titanium-tungsten alloy, chrome-copper alloy, aluminum, and nickel. In addition, the barrier layer 104 can prevent metals on the upper and lower sides of the barrier layer 104 from diffusing, and its commonly used materials include metals such as chrome-copper alloy, nickel, and nickel-vanadium alloy. In addition, the adhesion layer 106 can increase the adhesion of the solder bump 18 , and its commonly used materials include copper, nickel, and gold. It should be noted that when the material of the adhesion layer 106 is copper, the under bump metallurgy layer 100 may further include an anti-oxidation layer (not shown), which is disposed on the surface of the adhesion layer 106 to prevent adhesion. The surface of the layer 106 is oxidized, and the common material of the anti-oxidation layer is gold or organic surface protective material.

Please also refer to FIG. 1 , as far as the known technology is concerned, tin-lead alloy is a common material of the solder bump 18 because tin-lead alloy has good soldering properties. It should be noted that, in the manufacturing process of the solder bump 18, after the solder bump 18 is disposed on the UBM layer 100 by electroplating, printing or other methods, it must go through a reflow process. ), so that the bottom end of the solder bump 18 can be effectively bonded to the surface of the adhesion layer 106, and the appearance of the solder bump 18 is roughly spherical. Next, after the solder bumps 18 on the active surface 12 of the chip 10 are correspondingly contacted to the contacts on the surface of the substrate (or printed circuit board), another reflow process must be performed at this time, so that the solder bumps 18 The tip is effective to engage the surface of a contact to another substrate (or printed circuit board) (not shown).

Please also refer to FIG. 1 , when the composition of the surface layer of the under bump metallurgy layer 100 includes metals such as copper, nickel, aluminum, silver or gold, the solder bump 18 is subjected to multiple high heat treatments (heat treatment), such as reflow processing. , the main component of the solder bump 18, tin, will easily react with metals such as copper, nickel, or gold, which is the component of the under-bump metallurgy layer 100, thereby forming a Intermetallic compounds (IMC), among which intermetallic compounds are most likely to be formed between tin and copper, followed by tin and nickel, and the same is true for tin and gold. It should be noted that the intermetallic compound will increase the electrical resistance (electrical resistance) between the solder bump 18 and the UBM layer 100, which will reduce the electrical performance of the chip 10 after flip-chip packaging, and at the same time weaken the The bonding strength between the solder bump 18 and the UBM layer 100 .

Contents of the invention

The first object of the present invention is to provide an under-bump buffer metal structure, which is suitable for disposing between a pad and a solder bump of a chip, and can effectively slow down or alleviate the gap between the under-ball metal structure and the solder bump. The intermetallic compound is generated, so the mechanical and electrical performance of the chip after flip-chip packaging can be improved, and the mechanical structural strength of the flip-chip packaging of the chip can be improved at the same time.

The second object of the present invention is to provide an under-bump buffer metal layer, which is suitable for being arranged between a solder pad and a solder bump on a substrate, and can effectively reduce or slow down the soldering of the under-bump metal layer (or the substrate). Pads (copper pads)) and solder bumps generate intermetallic compounds, so the electrical performance of the chip after flip-chip packaging can be improved, and the structural strength of the flip-chip packaging of the chip can be improved at the same time.

Based on the above-mentioned first object of the present invention, the present invention provides an under-bump buffer metal structure, which is suitable for being arranged between a solder pad and a solder bump of a chip, wherein the main component of the solder bump is a tin-lead alloy , the buffer metal structure under bump has a metal layer, which is disposed on the pad, and a buffer metal structure, which is disposed between the metal layer and the solder bump, for reducing or slowing down the gap between the metal layer and the solder bump. Form intermetallic compounds.

Based on the above-mentioned second object of the present invention, the present invention provides an under-bump buffer metal layer, which is suitable for being arranged between a solder pad and a solder bump on a substrate, wherein the main component of the solder bump is a tin-lead alloy , and the main component of the pad is copper or aluminum, the buffer metal structure under the bump has a metal layer, which is disposed on the pad, and a buffer metal layer, which is disposed between the metal layer and the solder bump, for Alleviate or slow down the formation of intermetallic compounds between the metal layer and the solder bump.

Also based on the above-mentioned second object of the present invention, the present invention provides an under-bump buffer metal structure, which is suitable for being arranged between a solder pad and a solder bump on a substrate, wherein the main component of the solder bump is tin-lead alloy, and the main component of the pad is copper, the buffer metal structure under the bump has a buffer metal layer, which is arranged between the pad and the solder bump to reduce or slow down the formation between the pad and the solder bump. intermetallic compounds.

In order to make the above objects, features and advantages of the present invention more comprehensible, a preferred embodiment is exemplified below and described in detail with accompanying diagrams.

Description of drawings

FIG. 1 is a schematic cross-sectional view of an existing under-bump metal layer disposed between a pad of a chip and a bump;

2A-2F are schematic cross-sectional views of various under-bump buffer metal structures of a preferred embodiment of the present invention, which are respectively arranged between a pad and a solder bump of a chip;

3A to 3G are sequentially the fabrication flow chart of the first buffer metal structure under bump in FIG. 2A ;

4A to 4H are schematic cross-sectional views of various under-bump buffer metal structures of a preferred embodiment of the present invention, which are respectively arranged between a pad and a solder bump of a chip;

5A to 5H are sequentially the fabrication flow chart of the first under-bump metal buffer structure in FIG. 4A; and

6A and 6B are schematic cross-sectional views of the first buffer metal structure under bump and the second buffer metal structure under bump according to the present invention, which are respectively arranged between a pad and a solder bump of a substrate. .

【Description of figure number】

10: chip 12: active surface

14: Protective layer 16: Welding pad

18: Solder bumps 20: Substrate

22: Substrate surface 24: Solder mask layer

26: Solder pads 28: Solder bumps

100: UBM layer 102: Adhesive layer

104: Barrier layer 106: Adhesion layer

201～206: bump bottom buffer metal structure 210: metal layer

212: Adhesive layer 214: Barrier layer

216: Adhesion layer 220: Buffer metal layer

222: The first buffer metal layer 224: The second buffer metal layer

226: The third buffer metal layer 302: Metal thin layer

304: photoresist layer 306: metal layer

308: buffer metal layer 401～408: bump bottom buffer metal structure

410: Metal layer 412: Adhesive layer

414: Barrier layer 416: Adhesion layer

420: Buffer Metal Structure 422: Micro Bumps

424: Buffer metal layer 502: Metal thin layer

504: photoresist layer 506: metal layer

508: Buffer metal layer 508a: Buffer metal micro-bumps

601, 602: bump bottom metal layer 610: metal layer

612: nickel layer 614: gold layer

620: buffer metal layer

Detailed ways

Please refer to FIG. 2A , which is a schematic cross-sectional view of a first UBM structure disposed between a pad and a solder bump of a chip according to a preferred embodiment of the present invention. The chip 10 has an active surface 12, a protection layer 14 and a plurality of pads 16 (only one of them is shown), and the protection layer 14 and the pads 16 are all configured on the active surface 12 of the chip 10, and the protection layer 14 is exposed The bonding pad 16 is above the active surface 12 of the chip 10 . It should be noted that the active surface 12 of the chip 10 generally refers to the side of the chip 10 with active components. In order to provide an interface for bonding between the solder pad 16 and the solder bump 18, the present invention proposes a first under-bump buffer metal structure 201 for disposing between the solder pad 16 and the solder bump 18, which mainly includes a metal layer 210 and a buffer metal layer (IMC Growth Buffer Layer) 220, wherein the metal layer 210 is disposed on the pad 16, and the buffer metal layer 220 is disposed between the metal layer 210 and the solder bump 18. In addition, the metal layer 210 includes an adhesion layer 212, a barrier layer 214, and an adhesion layer 216, etc., wherein the adhesion layer 212 is disposed on the pad 16, and the barrier layer 214 is disposed on the adhesion layer 212, and the adhesion layer 216 It is disposed between the barrier layer 214 and the buffer metal layer 220 . It should be noted that since the composition and composition of the metal layer 210 are the same as those of the existing UBM layer 100 in FIG. related instructions.

Please also refer to FIG. 2A. Since the common materials of the adhesion layer 216 include copper and gold, etc., when the material of the adhesion layer 216 is copper, an anti-oxidation layer (not shown) can be disposed on the surface of the adhesion layer 216 in the prior art. ) to prevent oxidation on the surface of the adhesion layer 216 made of copper, where the common material of the anti-oxidation layer is gold. However, when the composition of the adhesion layer 216 includes metals such as copper, nickel, or gold, the composition of the solder bump 18, tin, will easily mix with the composition of the under bump metal layer 210 after the solder bump 18 is subjected to high heat treatment. Metals such as copper, nickel or gold react chemically to form an intermetallic compound between the solder bump 18 and the UBM layer 210 . Therefore, the buffer metal layer 220 of the first UBM structure 201 of the present invention is disposed between the adhesion layer 216 and the solder bump 18, so as to reduce or slow down the formation of the adhesion layer 216 and the solder bump 18. intermetallic compounds. In addition, in order to prevent the buffer metal layer 220 from melting during high heat treatment (such as reflow process) while maintaining the structure and function of the buffer metal layer 220 , the melting point of the buffer metal layer 220 must be higher than the melting point of the solder bump 18 . In addition, in order to achieve good bonding strength between the buffer metal layer 220 and the solder bump 18 , the buffer metal layer 220 has adhesion corresponding to the solder bump 18 . Based on the above, the optimal material of the buffer metal layer 220 is, for example, lead or a tin-lead alloy with a high melting point, or other materials.

Please refer to FIGS. 2A to 2C in sequence, wherein FIG. 2B and FIG. 2C are sequentially the second under-bump metal structure and the third under-bump metal structure of the present invention, which are respectively configured on one of a chip 10. A schematic cross-sectional view between the pad 16 and a solder bump 18 . As shown in FIG. 2B , the second UBM structure 202 is substantially the same as the first UBM structure 201 except that the second UBM structure 202 also has the first UBM structure. In addition to the metal layer 210 of the metal structure 201, its buffer metal layer 220 also includes a first buffer metal layer 222 and a second buffer metal layer 224, wherein the first buffer metal layer 222 is, for example, a lead layer, which is configured for adhesion layer 216 , and the second buffer metal layer 224 is, for example, a tin layer, which is disposed between the first buffer metal layer 222 and the solder bump 18 . As shown in FIG. 2C , the third UBM structure 203 is substantially the same as the first UBM structure 201 , except that the third UBM structure 203 also has the first UBM structure. In addition to the metal layer 210 of the buffer metal structure 201 at the bottom of the block, the buffer metal layer 220 may further include a first buffer metal layer 222, a second buffer metal layer 224, and a third buffer metal layer 226, wherein the first buffer metal layer 222 is, for example, a lead layer, which is disposed on the adhesion layer 216, and the second buffer metal layer 224 is, for example, a tin layer, which is disposed on the first buffer metal layer 222, and the third buffer metal layer 226 is, for example, another A lead layer is disposed between the second buffer metal layer 224 and the solder bump 18 .

Please refer to FIGS. 2A to 2F , wherein FIG. 2D , FIG. 2E , and FIG. 2F are sequentially the fourth under-bump buffer metal structure, the fifth under-bump buffer metal structure, and the sixth under-bump buffer metal structure of the present invention. , which are respectively arranged in a cross-sectional view between a pad 16 and a solder bump 18 of a chip 10 . First, as shown in FIG. 2A, since the buffer metal layer 220 of the first under-bump buffer metal structure 201 has adhesion to the solder bump 18, the structure of the adhesion layer 216 can be omitted to form the structure of the present invention. The fourth UBM structure 204 is shown in FIG. 2D . Similarly, as shown in FIG. 2B , since the buffer metal layer 220 of the second under-bump buffer metal structure 202 has adhesion to the solder bump 18, the structure of the adhesion layer 216 can be omitted to form the present invention. The fifth under bump metal structure 205 is shown in FIG. 2E . Similarly, as shown in FIG. 2C , since the buffer metal layer 220 of the third under-bump buffer metal structure 203 has adhesion to the solder bump 18, the structure of the adhesion layer 216 can be omitted to form the present invention. The sixth under bump metal structure 206 is shown in FIG. 2F .

Please refer to FIGS. 3A-3G , which are sequentially the fabrication flow chart of the first UBM structure in FIG. 2A . First, as shown in FIG. 3A, a chip 10 is first provided, which has an active surface 12, a protection layer 14 and a plurality of welding pads 16 (only one of them is shown), and the protection layer 14 and the welding pads 16 are all configured on On the active surface 12 of the chip 10 , and the passivation layer 14 exposes the bonding pad 16 above the active surface 12 of the chip 10 . Then as shown in FIG. 3B , methods such as evaporation (evaporation), sputtering (sputtering) or electroplating (plating) can be used to comprehensively form a metal thin layer 302 on the active surface 12 of the chip 10 for electroplating. The seed layer (seed layer). Next, as shown in FIG. 3C , a patterned photo-resist layer 304 (photo-resist Layer) is formed on the thin metal layer 302 to expose part of the surface of the thin metal layer above the pad 16 . Next, as shown in FIG. 3D , a metal layer 306 can be formed on the thin metal layer by means of electroplating, vapor deposition or sputtering, wherein the composition of the metal layer 306 includes an adhesion layer, a barrier layer and an adhesion layer. Next, as shown in FIG. 3E , a buffer metal layer 308 can also be formed on the metal layer 306 by electroplating. Next, as shown in FIG. 3F , the patterned photoresist layer 304 is removed to expose the thin metal layer 302 except under the metal layer 306 . Finally, as shown in FIG. 3G , the thin metal layer 302 other than the metal layer 306 can be removed by short etching to complete the first under-bump buffer metal structure 201 shown in FIG. 2A of the present invention.

It is worth noting that the content in the above paragraph only briefly introduces one of the various processes of the first type of UBM structure 201 shown in FIG. 2A , while the other various UBM structures shown in FIGS. The processes of 202-206 can also be obtained by referring to the above-mentioned processes and making changes, so no more details are given here. In addition, the preferred embodiment of the present invention can also use a miniature bump (mini bump) to replace the buffer metal layer 220 of the bump metal structure 201 shown in FIG. An intermetallic compound is formed between the bumps.

Please refer to FIG. 4A , which is a schematic cross-sectional view of a seventh UBM structure of the present invention disposed between a pad and a solder bump of a chip. Compared with the buffer metal layer 220 of the first under-bump metal structure 201 in FIG. 2A , the seventh under-bump metal structure 401 of the present invention includes a metal layer 410 and micro-bumps 422 , wherein the metal layer 410 is disposed on the solder pad 16, and the micro-bump 422 is disposed between the metal layer 410 and the solder bump 18, wherein the composition and material of the metal layer 410 are the same as the first bump bottom buffer metal in FIG. 2A The metal layer of the structure 201 is not repeated here. It is worth noting that the material and characteristics of the micro-bump 422 are the same as those of the buffer metal layer 220 in FIG. 2A. For example, the micro-bump 422 corresponds to solder Bump 18 has adhesion to increase the bonding strength between micro-bump 422 and solder bump 18, and the melting point of micro-bump 422 must be higher than the melting point of solder bump 18 to prevent micro-bump 422 melts during high heat treatment (such as reflow treatment), and cannot provide the function of reducing or slowing down the formation of intermetallic compounds. Based on the above, the optimal material of the micro-bump 422 is lead, or a tin-lead alloy with a composition ratio of about 95% lead and 5% tin, or other materials.

Please refer to FIG. 4B , which is a schematic cross-sectional view of an eighth UBM structure of the present invention disposed between a pad and a solder bump of a chip. Compared with the seventh UBM structure shown in FIG. 4A , the eighth UBM structure 402 shown in FIG. 4B has a smaller distribution area, which will correspond to its solder bump The diameter of 18 is relatively small, so the pitch between any two solder bumps 18 can be reduced.

Please refer to FIG. 4C , which is a schematic cross-sectional view of a ninth UBM structure of the present invention disposed between a pad and a solder bump of a chip. Compared with the seventh under-bump metal structure 401 shown in FIG. 4A , the buffer metal structure 420 of the ninth under-bump metal structure 403 shown in FIG. 4C includes a micro-bump 422 and a The buffer metal layer 424, wherein the micro-bump 422 is disposed on the metal layer 410, and the buffer metal layer 424 is disposed between the micro-bump 422 and the solder bump 18, and the buffer metal layer 424 is, for example, a tin layer.

Please refer to FIG. 4D , which is a schematic cross-sectional view of the tenth UBM structure of the present invention, which is disposed between a pad and a solder bump of a chip. Compared with the ninth kind of UBM structure 403 shown in FIG. 4C , the distribution area of the tenth UBM structure 404 shown in FIG. 4D is smaller, so that the corresponding solder bumps The diameter of 18 is relatively small, so the pitch between any two solder bumps 18 can be reduced.

Please refer to FIGS. 4E-4H , which are sequentially schematic cross-sectional views of the eleventh-fourteenth UBM structures of the present invention, which are respectively disposed between a pad and a solder bump of a chip. Compared with the seventh to tenth UBM structures 401 to 404 shown in FIGS. 4A to 4D , since the eleventh to fourteenth UBM structures 405 to 408 shown in FIGS. 4E to 4H The micro-bump 422 has adhesion to the solder bump 18, so the adhesion layer 416 of the seventh to tenth under-bump metal structures shown in FIGS. The eleventh to fourteenth under-bump buffer metal structures shown above have related descriptions about the micro-bump 422 and the buffer metal layer 424 , so details are not repeated here.

Please refer to FIGS. 5A-5H , which are sequentially the fabrication flow chart of the first UBM structure in FIG. 4A . First, as shown in FIG. 5A, a chip 10 is first provided, which has an active surface 12, a protection layer 14 and a plurality of welding pads 16 (only one of them is shown), and the protection layer 14 and the welding pads 16 are all configured on On the active surface 12 of the chip 10 , and the passivation layer 14 exposes the bonding pad 16 above the active surface 12 of the chip 10 . Next, as shown in FIG. 5B , a thin metal layer 502 can be formed on the active surface 12 of the chip 10 by evaporation, sputtering, or electroplating to serve as a seed layer for electroplating. Next, as shown in FIG. 5C , a patterned photoresist layer 504 is formed on the thin metal layer 502 and exposes a part of the surface of the thin metal layer 502 above the pad 16 . Next, as shown in FIG. 5D , a metal layer 506 can be formed on the thin metal layer 502 by means of electroplating, evaporation or sputtering, wherein the composition of the metal layer 506 includes an adhesion layer, a barrier layer and an adhesion layer. Next, as shown in FIG. 5E , a buffer metal layer 508 can be formed on the metal layer 506 by means of electroplating or printing. Next, as shown in FIG. 5F , the patterned photoresist layer 504 is removed to expose the thin metal layer 502 except under the metal layer 506 . Next, as shown in FIG. 5G , the thin metal layer 502 except under the metal layer 506 may be removed by short etching. Finally, as shown in FIG. 5H , a reflow process can be optionally performed, so that the buffer metal layer 508 forms a micro-bump 508 a and covers the surface of the metal layer 506 . However, the above is only a brief introduction to one of the various processes of the seventh UBM structure 401 shown in FIG. , can also be obtained by referring to the above process and making changes, so no more details are given here.

The UBM structure of the present invention can be applied and disposed between the pads and the solder bumps of the flip-chip package substrate as well as between the pads and the solder bumps of the chip. Please refer to FIG. 6A , which is a schematic cross-sectional view of the first UBM layer of the present invention disposed between a pad and a solder bump on a substrate. The welding pad 26 of the substrate 20 is formed by a patterned wire layer, and is exposed by a solder mask layer (solder mask) 24 disposed on the substrate surface 22. Since the common material of the wire layer of the substrate 20 is copper, Therefore, the copper component of the solder pad 26 on the substrate 20 is easily chemically changed with the tin component of the solder bump 28 , thus forming an intermetallic compound. Therefore, as shown in FIG. 6A , the prior art utilizes a nickel layer 612 or a gold layer 614 as a buffer metal layer between the solder pad 26 and the solder bump 28, but the nickel layer 612 and the gold layer 614 will still be in contact with the solder at last. The tin component of the bump 28 reacts chemically to form an intermetallic compound.

Based on the above, please also refer to FIG. 6A , the first UBM layer 601 of the present invention may include a metal layer 610 and a buffer metal layer 620 , wherein the metal layer 610 is disposed on the solder pad 26 of the substrate 20 , It may include a nickel layer 612 and a gold layer 614, wherein the nickel layer 612 is disposed on the pad 26, and the gold layer 614 is disposed between the nickel layer 612 and the buffer metal layer 620 to lighten or slow down the solder pad. An intermetallic compound is formed between 26 and solder bump 28 . In addition, the buffer metal layer 620 is disposed between the metal layer 610 and the solder bump 28 , and is also used to reduce or slow down the generation of intermetallic compounds between the solder pad 26 and the solder bump 28 . In addition, in order to prevent the buffer metal layer 620 from melting during high heat treatment (such as reflow process), the structure and function of the buffer metal layer 620 can still be maintained, so the melting point of the buffer metal layer 620 must be higher than the melting point of the solder bump 28 . Moreover, in order to provide good bonding strength between the buffer metal layer 620 and the solder bump 28 , the buffer metal layer 620 has adhesion to the solder bump 28 . Wherein, the best material of the buffer metal layer 620 is, for example, lead or other materials.

Please refer to FIG. 6A and FIG. 6B at the same time, which are schematic cross-sectional views of the second UBM layer of the present invention disposed between a pad 26 and a solder bump 28 of a substrate 20 . As shown in FIG. 6A, since the buffer metal layer 620 already has the function of alleviating or slowing down the generation of intermetallic compounds between the solder pads 26 and the solder bumps 28, the metal layer 610 in FIG. 6A can be omitted, including the nickel layer 612 and the gold layer. 614 to become the under-bump buffer metal layer 602 in FIG. 6B. Likewise, the best material of the UBM layer 602 is lead or other materials.

It is worth noting that, compared with copper, the coefficient of thermal expansion (Coefficient of Thermal Expansion, CTE) of lead is closer to the thermal expansion coefficient of tin-lead alloy. The thermal stress is less, which will make the solder bump bear less shear force and not easy to break.

The buffer metal structure under bump of the present invention is suitable for being arranged between a pad of a chip and a solder bump, wherein the main component of the solder bump is tin-lead alloy, and the buffer metal structure under bump includes a metal layer and a buffer metal structure, wherein the metal layer is disposed on the solder pad, and its composition includes copper, nickel or gold, and the buffer metal structure is disposed between the metal layer and the solder bump to relieve or slow down the metal layer and the solder bump Intermetallic compounds are formed between them. The buffer metal structure includes a buffer metal layer, a micro-bump or a hybrid structure of the two, and the buffer metal structure has adhesion to the solder bump, and the melting point of the buffer metal structure is higher than the melting point of the solder bump, wherein the buffer metal structure The best material is lead.

The under-bump buffer metal structure of the present invention is suitable for being arranged between a pad and a solder bump of a flip-chip package substrate, wherein the main component of the solder pad is copper, and the main component of the solder bump is tin-lead alloy , the buffer metal structure under the bump includes a buffer metal layer, which is arranged between the solder pad and the solder bump to reduce or slow down the generation of intermetallic compounds between the solder pad and the solder bump, wherein the buffer metal layer corresponds to the solder The solder bump has adhesion, and the melting point of the buffer metal layer is higher than that of the solder bump. In addition, the under-bump buffer metal structure also includes a nickel layer and a gold layer, wherein the nickel layer is disposed on the pad, and the gold layer is disposed between the nickel layer and the buffer metal layer, wherein the optimal material of the buffer metal layer is lead.

To sum up, the under-bump buffer metal structure of the present invention is arranged between the pads of the chip and the solder bumps, or between the pads of the package substrate and the solder bumps, so as to reduce or slow down the solder bumps. The component tin reacts chemically with other metal materials of the bottom metal layer of the bump, or with the material of the pad, thereby forming an intermetallic compound. Therefore, the UBM buffer metal structure of the present invention can effectively reduce or slow down the formation of intermetallic compounds, so it can relatively reduce the resistance between the UBM structure and the solder bump, and relatively increase the resistance between the UBM structure and the solder bump. Bond strength between bumps.

Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any skilled person in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined in the claims.

Claims (13)

1. a bottom buffering metal lug structure is applicable between the weld pad and a solder projection that is configured in a chip, and it is characterized in that: the main component of this solder projection is a leypewter, and this bottom buffering metal lug structure comprises:

One metal level is configured on this weld pad; And

One buffering metal structure is configured between this metal level and this solder projection, generates Jie's metallic compound between this metal level and this solder projection in order to reduce.

2. bottom buffering metal lug structure as claimed in claim 1 is characterized in that: the fusing point of this buffering metal structure is higher than the fusing point of this solder projection, and this buffering metal structure has the property of attaching.

3. bottom buffering metal lug structure as claimed in claim 1 is characterized in that: this buffering metal structure comprises a buffering metal level, and it is configured between this metal level and this solder projection.

4. bottom buffering metal lug structure as claimed in claim 3 is characterized in that: this buffering metal level comprises a lead layer, and it is configured between this metal level and this solder projection.

5. bottom buffering metal lug structure as claimed in claim 3 is characterized in that: this buffering metal level comprises a lead layer and a tin layer, and this lead layer is configured on this metal level, and this tin layer is configured between this lead layer and this solder projection.

6. bottom buffering metal lug structure as claimed in claim 3, it is characterized in that: this buffering metal level comprises one first lead layer, a tin layer and one second lead layer, this first lead layer is configured on this metal level, and this tin layer is configured on this first lead layer, and this second lead layer is configured between this tin layer and this solder projection.

7. bottom buffering metal lug structure as claimed in claim 1 is characterized in that: this buffering metal structure comprises a miniature projection, and it is configured between this metal level and this solder projection.

8. bottom buffering metal lug structure as claimed in claim 7 is characterized in that: this buffering metal structure also comprises a tin layer, and it is configured between this miniature projection and this solder projection.

9. bottom buffering metal lug structure as claimed in claim 7 is characterized in that: the main component of this miniature projection is selected from one of them of plumbous and leypewter.

10. bottom buffering metal lug structure, be applicable between the weld pad and a solder projection that is configured in a substrate, it is characterized in that: the main component of this solder projection is a leypewter, and the main component of this weld pad is a copper, and this bottom buffering metal lug structure comprises:

One metal level is configured on this weld pad; And

One buffering metal level is configured between this metal level and this solder projection, generates Jie's metallic compound between this metal level and this solder projection in order to reduce.

11. bottom buffering metal lug structure as claimed in claim 10 is characterized in that: the fusing point of this buffering metal level is higher than the fusing point of this solder projection, and this buffering metal level has the property of attaching, and its main component is plumbous.

12. bottom buffering metal lug structure, be applicable between the weld pad and a solder projection that is configured in a substrate, it is characterized in that: the main component of this solder projection is a leypewter, and the main component of this weld pad is a copper, and this bottom buffering metal lug structure comprises:

One buffering metal level is configured between this weld pad and this solder projection, generates Jie's metallic compound between this weld pad and this solder projection in order to cushion.

13. bottom buffering metal lug structure as claimed in claim 12 is characterized in that: fusing point and this buffering metal level that the fusing point of this buffering metal level is higher than this solder projection have the property of attaching, and its main component is plumbous.

Images