CN1228910C - Soft switch full-bridge phase-shift circuit with clamping circuit and its clamping method - Google Patents

Abstract

The present invention discloses a soft switch full-bridge phase-shift circuit with a clamping circuit, and a clamping method thereof. After the stage of backward recovery is over, the excess energy stored on a resonant inductor is converted to a clamping winding by electromagnetic induction to avoid large shock caused by the resonant inductor and parasitic parameters; the clamping winding and a bridge arm on a full-bridge converter form an energy release circuit to release the excess energy. The characteristics of the original soft switch are reserved, and simultaneously the problems caused by the recovery of a backward diode are solved. The method ensures that excess energy in the resonant inductor is consumed in time in each switch period of the circuit, eliminates the influence caused by the recovery of the backward diode, ensures that a clamping diode works in a soft switch state simultaneously, and enhances the reliability of the circuit.

Description

Soft-switching full-bridge phase-shifting circuit with clamping circuit and its clamping method

Technical field:

The invention relates to a soft-switching full-bridge phase-shifting circuit with a clamping circuit and a clamping method thereof.

Background technique:

The traditional phase-shifted full-bridge circuit (Figure 1) is a very good DC/DC converter, which uses the energy of the auxiliary inductance to realize the zero-voltage switching of the switching tube, which reduces the switching loss of the switching tube. The circuit has the advantages of simple control, easy soft switching of the switching tube, high circuit efficiency, and low EMI, and is known as one of the best DC/DC converters. However, due to the addition of auxiliary inductance, the diode will generate large voltage spikes and oscillations during the reverse recovery process of the secondary diode, which increases the switching loss of the diode and deteriorates the EMI of the circuit. If the diode withstand voltage is increased, the reverse recovery time of the diode will be longer, which will make the performance of the circuit worse.

Some solutions have been proposed for this purpose, such as the use of soft recovery output diodes, RC absorption and so on. The diode clamp proposed by Richard Redl et al. in "A Novel Soft-Switching Full-Bridge DCDCConverter: Analysis, Design Considerations, and Experimental Results at 1.5kW, 100kHz; IEEE TRANSACTIONS ON POWER ELECTRONICS.VOL.6.No.3.July 1991" Bit circuits are a better solution. He used to add two clamping diodes between the transformer and the inductance, so that the excess energy of the inductance of the output diode during reverse recovery is released into the input power supply, reducing the voltage spikes and oscillations generated by the diodes, and making the output diodes spikes voltage clamp. However, in this scheme, the release process of excess energy is uncontrollable. It can only be determined by the characteristics of the circuit itself and the parameters of components. For example, the working state of the clamp diode is not necessarily optimal, which reduces the reliability of the circuit. .

Invention content:

The purpose of the present invention is to solve the above problems and provide a soft-switching full-bridge phase-shifting circuit with a clamping circuit and its clamping method, so as to ensure that the excess energy of the resonant inductor is consumed in time in each switching cycle of the circuit. , Eliminate the influence caused by the recovery of the reverse diode, improve the reliability of the circuit, and when necessary, a device that controls the release of excess energy can be added to the circuit.

In order to achieve the above object, the present invention proposes a soft-switching full-bridge phase-shifting circuit with a clamping circuit, including a full-bridge converter switch bridge arm, a transformer, an output diode and an auxiliary inductor, and the full-bridge converter switch bridge arm Connected to the positive and negative input bus bars, the primary side of the transformer is connected in series with the auxiliary inductor and then connected to the midpoint of the two switch bridge arms of the full-bridge converter, and the two ends of the secondary side of the transformer are respectively connected to output diodes. A second winding——clamping winding, one end of which is connected to the terminal connected to the auxiliary inductance on the midpoint of the switching arm of the full-bridge converter, and the other end is respectively clamped by the first clamping diode and the second clamping diode bit on the positive and negative input bus.

The present invention also proposes a clamping method for a soft-switching full-bridge phase-shifting circuit, which is used to clamp the peak voltage of its output diode. Transfer to the clamp winding through electromagnetic induction to avoid oscillation caused by resonant inductance and parasitic parameters; the clamp winding and a bridge arm on the full-bridge converter form an energy release circuit to release the above-mentioned excess energy.

According to an embodiment of the present invention, a resistor is connected in series in the loop of the clamping inductance.

The phase-shifted full-bridge circuit proposed by the present invention uses the clamp winding of the resonant inductor to realize the voltage clamping of the resonant inductor, which can release the excess energy generated during the reverse recovery in time, avoiding the oscillation caused by the resonant inductor and parasitic parameters, and retaining At the same time, the original soft switching characteristics can solve the problems caused by the reverse diode recovery. This method ensures that the excess energy of the resonant inductor is consumed in time in each switching cycle of the circuit, eliminates the influence caused by the recovery of the reverse diode, and improves the reliability of the circuit.

After connecting a resistor in series with the clamping inductor loop, the process of releasing excess energy can be accelerated.

By adjusting the transformation ratio of the clamping winding or the resistance value of the series resistance, the present invention can ensure that the excess energy of the resonant inductance is completely released in each cycle, so that the clamping diode can be turned off with zero current, eliminating the reverse recovery band of the clamping diode The impact of the coming, greatly improving the reliability of the circuit, but also to ensure that the output diode is clamped in the appropriate voltage range. Therefore, the circuit of the present invention has higher reliability and versatility.

Description of drawings:

Figure 1 is a schematic diagram of a traditional phase-shifted full-bridge circuit.

FIG. 2 is a schematic diagram of a phase-shifted full-bridge circuit proposed by the present invention for inductive voltage clamping.

Fig. 3 is a schematic diagram of the inductive voltage clamping phase-shifting full bridge circuit of the series resistance proposed by the present invention.

FIG. 4 is a circuit diagram of the equivalent inductive voltage clamp phase-shifted full bridge of FIG. 5 .

Fig. 5 is a schematic diagram of an equivalent circuit and a current loop in mode 1: time t0.

Fig. 6 is a schematic diagram of the equivalent circuit and the current loop of the mode 2 stage.

Fig. 7 is a schematic diagram of the equivalent circuit and the current loop of the mode 3 stage.

Fig. 8 is a schematic diagram of the equivalent circuit and the current loop of the mode 4 stage.

FIG. 9 is a schematic diagram of the equivalent circuit and the current loop of the mode 5 stage.

Fig. 10 is a schematic diagram of the equivalent circuit and the current loop of the mode 6 stage.

Fig. 11 is a schematic diagram of the equivalent circuit and the current loop of the mode 7 stage.

FIG. 12 is a schematic diagram of an equivalent circuit and a current loop of mode 8 stages.

Fig. 13 is a schematic diagram of the equivalent circuit and the current loop of the mode 9 stage.

Fig. 14 is a schematic diagram of the equivalent circuit and the current loop of the mode 10 stage.

Fig. 15 is a schematic diagram of the equivalent circuit and the current loop of the mode 11 stage.

FIG. 16 is a schematic diagram of an equivalent circuit and a current loop of mode 12 stages.

Fig. 17 is a schematic diagram of analyzing relevant waveforms during the reverse recovery period of the output diode.

Figure 18 is an inductance clamp phase shift full bridge circuit with a DC blocking capacitor and a full bridge filter.

Detailed ways:

The present invention will be described in further detail below through specific embodiments and in conjunction with the accompanying drawings.

A novel phase-shifted full-bridge circuit proposed by the present invention is shown in Figure 2. It uses the clamp winding of the auxiliary inductor to clamp the voltage of the auxiliary inductor. While retaining the original soft switching characteristics, it can solve the problem of reverse diode recovery band Therefore, it is called "soft-switching phase-shifting full-bridge circuit with auxiliary inductance clamp". This circuit also has its practical improved circuit, that is, a resistor Rc is connected in series with the auxiliary inductance branch (Figure 3). This method ensures that the excess energy of the auxiliary inductance is consumed in time in each switching cycle of the circuit, eliminates the influence caused by the recovery of the reverse diode, and improves the reliability of the circuit.

Figure 2 shows the new auxiliary inductance clamp soft switching circuit proposed by us, which is characterized in that a second winding——clamp winding is added to the auxiliary inductance of the traditional phase-shifted full-bridge circuit, and one end of the clamp winding is connected to the bridge arm The midpoint connection, the other end is respectively clamped to the positive and negative input busbars by two diodes. The turn ratio between the auxiliary inductor and the clamp winding is k, generally k≥1. Figure 3 is a typical practical circuit, in which a resistor is connected in series in the clamping winding circuit. We will take Figure 3 as an example to introduce the working principle of this circuit.

For the phase-shifted full-bridge circuit, the parasitic parameters of the device itself have a significant impact on the characteristics of the circuit during the switching process, so we first consider the influence of the parasitic parameters of the device, and give an equivalent circuit diagram for analysis. For MOS tubes, there are parasitic body diodes and drain-source junction capacitances, which have been given in Figure 3, such as D1 and C1 are the parasitic parameters of Q1. There is a leakage inductance for the transformer, but the leakage inductance of the general transformer can be made smaller, and it is smaller than the auxiliary inductance, which is not the main cause of the output diode spike, so the influence of the leakage inductance is not considered here. There are parasitic capacitance parameters in the transformer, such as inter-turn capacitance, parasitic capacitance of the primary and secondary sides, and RC absorption of the transformer. Since the switching frequency of the phase-shifted full-bridge circuit is relatively high, the impact on the parasitic capacitance cannot be ignored. Similarly, the output diode should also take into account the influence of reverse junction capacitance and RC absorption parameters. In the circuit of Figure 3, theoretically, the reverse withstand voltage of any output diode is proportional to the primary side voltage of the transformer. At the same time, once the two diodes are turned on, the transformer is also short-circuited, and the parasitic capacitance of the transformer does not work. Therefore, the parasitic capacitance of the diode can be converted to the equivalent capacitance of the primary side of the transformer: Cs=Csp+Css×n+Csd×n/2+Csother where Csp is the parasitic capacitance of the transformer on the primary side, and Css is the total parasitic capacitance of the secondary side of the transformer , Csd is the equivalent parasitic capacitance of a single output diode, Csother is other parasitic capacitances of the transformer, such as the equivalent capacitance produced by RC absorption, lead wires, etc., n is the primary and secondary transformation ratio of the transformer. Therefore, the circuit in FIG. 3 can be simplified and equivalent to the circuit shown in FIG. 4 .

Below we combine the equivalent circuit in Figure 4 to divide the entire circuit into multiple circuit modes for specific analysis:

Mode 1: Energy feedback ends at time t0

Q1 in the leading bridge arm is turned on, and Q4 in the lagging bridge arm is turned on. Its body diode relies on the energy of the auxiliary inductance to continue to flow, and the inductance energy is fed back to the input power supply. The primary current decreases linearly, and the slope of the decline is Vin/Lr; the output diode DR1 and DR2 continue to flow, the transformer is short-circuited, and the output current decreases linearly. Generally, the output ripple is small. For the sake of simplicity of analysis, it can be considered that the output inductor current is a constant Io.

At time t0, the primary current drops to zero, so it is called the end time of energy feedback.

Mode 2: t0-t1 current linear rising phase

At time t0, the current on the primary side reverses after crossing zero, and the current returns from the power supply to the negative terminal of the input power supply through Q1, the auxiliary inductor, and the transformer to Q4. The inductor voltage is the input voltage, the primary current rises linearly, the secondary diodes DR1 and DR2 continue to conduct, and the transformer is short-circuited. I _Lr reaches Io/n at time t1. n is the turns ratio of the transformer.

At this stage, the current of the output diode DR1 increases linearly, and the current of DR2 decreases linearly, the relationship is: I _DR1 (t)=Io/2+nI _Lr (t)/2;

I _DR2 (t) = Io/2-nI _Lr (t)/2;

I _DR1 (t0) = I _DR2 (t0) = Io/2

At time t1, I _DR1 (t1)=Io I _DR2 (t1)=0

Since the turn ratio k≥1 between the auxiliary inductor winding and the clamp winding, D6 will not be turned on.

Mode 3: t1-t2 output diode reverse recovery phase

Due to the reverse recovery characteristics of the output diode, DR2 cannot be turned off immediately, so the transformer continues to be short-circuited, the inductor voltage is the input voltage, the current of the primary side auxiliary inductor continues to rise linearly, and the current of DR1 also continues to rise linearly, and DR2 has a linear For the rising reverse current, the relationship of each current is the same as that of mode 2. Therefore, the rising slope of the reverse recovery current is limited by the auxiliary inductance Lr. The larger the Lr, the smaller the output reverse current, but it will lead to a higher peak voltage of the diode during reverse recovery. At the same time, the selection of Lr is also limited by the output of the circuit. Feature requirements. Therefore, Lr can only be selected within a certain range. After the clamping circuit is adopted, its parameter selection is mainly subject to the requirements of the output characteristics of the main circuit, such as the loss of the switching duty cycle and the working range of soft switching.

After the trr (reverse recovery time of the diode) time, that is, at time t2, the reverse recovery of the diode ends, at this time:

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}{\mathrm{<span\; class="notranslate">\; Lr</span>}}$

Note: Irp＝I _Lr (t2)

Then: I _DR1 (t2)=Io/2+n*Irp/2

I _DR2 (t2)=Io/2-n*Irp/2

During the reverse recovery period of the diode, the output diode that needs to be turned off is temporarily turned on, so that the two output diodes continue to conduct in this stage, so the equivalent circuit diagram 7 of the mode 3 stage is consistent with the equivalent circuit diagram 6 of the mode 2 stage. At this time, the clamping circuit does not work, and only makes the auxiliary inductor store more energy. After the reverse recovery of the diode, only one of the secondary side diodes is turned on, and the working state changes. At this time, the excess current of the auxiliary inductor (energy ) can only be released through the parasitic capacitance and the clamping circuit, and first resonate with the parasitic parameters, the clamping winding will really work when the conditions are met, and the subsequent process is well described in modes 4 and 5.

In the relevant waveform analysis during the reverse recovery period of the output diode in Figure 17, the waveform of V _DR2 has been clearly drawn, that is, in the t1-t2 stage, DR2 continues to conduct, and its voltage waveform is approximately zero.

Mode 4: t2-t3 resonance stage

Due to the existence of parasitic capacitance, the primary current needs to charge the parasitic capacitance of the transformer, and the secondary current charges the reverse junction capacitance of DR2 and the RC snubber circuit, so the auxiliary inductance resonates with the equivalent capacitance parasitic parameter Cs.

at this time:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; cs</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; +</span>\sqrt{{<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; w</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; the\; tan</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}<span\; class="notranslate">\; )</span>$

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>\sqrt{{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; cos</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; w</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; the\; tan</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}<span\; class="notranslate">\; )</span>$

in, $Z_{\mathrm{rr}}=\sqrt{\frac{\mathrm{Lr}}{\mathrm{Cs}}}$

Auxiliary inductor voltage drop:

V _Lr (t)＝V _in -V _cs (t)

The voltage at the middle point M of the clamping diode rises gradually:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}}}{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; =</span>\frac{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; cs</span>}}}{\mathrm{<span\; class="notranslate">\; k</span>}}$

The primary current of the transformer is clamped by the output inductor, Ip(t)=Io/n

The charging current of the parasitic capacitance is:

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; cs</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\sqrt{{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; cos</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; w</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; the\; tan</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}<span\; class="notranslate">\; )</span>$

When Vcs=Vin, the auxiliary inductor voltage drops to zero and starts to reverse direction. At this time, the clamping diode prepares D5 to conduct, and this phase ends, and the inductor current reaches the maximum value.

It can be calculated that:

${\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; t</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; the\; tan</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}$

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; pk</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}}}{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>\sqrt{{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; rp</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; in</span>}}}{{\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; rr</span>}}}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}}$

Mode 5: t3-t4 clamping stage

At t3, the clamping diode D5 is turned on. At this time, the voltage of the transformer and the parasitic capacitor is clamped at Vin, and the excess energy of the auxiliary inductor is released through the circuit of D5 and Q1. In order to speed up the release of excess energy, the resistance Rc is added here, so:

$\mathrm{<span\; class="notranslate">\; Lr</span>}\frac{{\mathrm{<span\; class="notranslate">\; di</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="V\; ds"\; filenames="C0311429600122.png,C0311429600131.png"\; state="\{\{state\}\}">V</figure-callout></span><figure-callout\; id="1"\; label="V\; ds"\; filenames="C0311429600122.png,C0311429600131.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; df</span>}\mathrm{<span\; class="notranslate">\; 5</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; i</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; C</span>}}$

Among them, V _ds1 is the turn-on drain-source voltage drop of Q1, and V _df5 is the forward conduction voltage of D5. If the circuit in Figure 2 is used without Rc current limiting, the current drop method of Lr is:

$\mathrm{<span\; class="notranslate">\; Lr</span>}\frac{{\mathrm{<span\; class="notranslate">\; di</span>}}_{\mathrm{<span\; class="notranslate">\; Lr</span>}}}{\mathrm{<span\; class="notranslate">\; dt</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="V\; ds"\; filenames="C0311429600122.png,C0311429600131.png"\; state="\{\{state\}\}">V</figure-callout></span><figure-callout\; id="1"\; label="V\; ds"\; filenames="C0311429600122.png,C0311429600131.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; df</span>}\mathrm{<span\; class="notranslate">\; 5</span>}}<span\; class="notranslate">\; )</span>$

From the above formulas, increasing the transformation ratio k of the auxiliary inductance and the clamping winding is conducive to releasing the excess energy of the inductance as soon as possible.

At t4 moment, the excess energy of the auxiliary inductance is released completely, the current of D5 drops to zero, and D5 turns off with zero current (DCM).

In order to make the current of D5 drop to zero before Q1 is turned off, it can be guaranteed by adjusting the proportional coefficient k and the resistance value.

The purpose of the clamp is to release the excess energy through the clamp circuit to avoid the oscillation caused by the excess energy and parasitic parameters, and at the same time clamp the voltage of the auxiliary inductor, transformer, and corresponding output diode to a stable value to ensure the safety of the device Work. In mode 5, the voltage of the transformer is clamped at Vin+dV=Vin+k*(V _Rc +V _d5 +V _ds1 ), and the current change formula of Lr also includes the clamped voltage, Lr*d _iLr / dt itself is the voltage V _Lr of the inductor. The effect of clamping can be seen from these equations.

The clamping voltage is determined by the main circuit. For the circuit shown in Figure 4, it is 2(vin+dv)/n; if the circuit shown in Figure 18 is adopted, the clamping voltage is (vin+dv)/n.

Mode 6: t4-t5 steady-state power output stage

At this time, the transition process of the circuit is over and enters the power output stage. The voltage at both ends of the transformer is Vin, which supplies energy to the secondary side.

Mode 7: t5-t6 resonant stage 1

At time t5, the Q1 tube is turned off, at this time C1 is charged, and C2 is discharged until the body diode D2 of Q2 is turned on. At this time, the auxiliary inductor bears the back pressure, and the inductor current decreases. Since the transformer current is clamped by the output inductance, the parasitic capacitor Cs discharges to the transformer, and the voltage of the parasitic capacitor drops. At this time, C1, C2, Cs and Lr all participate in resonance, and their equivalent circuit is shown in Figure 11:

At t5, the voltage across the inductor is Vin, and then drops rapidly. V _Lr (t) = Vc2 (t) - Vcs (t), dropped rapidly by Vin.

At time t6, the body diode of Q2 is turned on, and the auxiliary inductor voltage V _Lr =-Vcs.

At this stage, the voltage at the midpoint M of the clamping diode is the same as that of the auxiliary inductor, and it also drops rapidly from Vin to:

V _M (t6) = -Vcs/k

Mode 8: t6-t7 resonant stage 2

At t6, the body diode of Q2 conducts, and C1C2 exits resonance. At this stage, Q2 can be turned on with zero voltage, Lr and Cs continue to resonate, the current of Lr continues to decrease, and the voltage of Cs drops, but it has not yet reached zero, so the transformer bears the forward voltage Vcs, DR1 continues to conduct, and its current is Io/n . In this stage, until the moment t7, the voltage of Vcs drops to zero.

Mode 9: t7-t8 clamping stage

At time t7, the transformer voltage is zero, the output diode DR2 starts to conduct, and the transformer is short-circuited. The current of the output diode DR2 increases linearly, and the current of DR1 decreases linearly. The current on the primary side of the transformer also decreases linearly, but at the time t7, the transformer current Ip=Io/n is greater than the auxiliary inductor current, so the clamp diode D6 is turned on, and the current direction is shown in the figure to make up for the insufficient auxiliary inductor current. At time t8, the primary current of the transformer drops to I _Lr , and the current of the auxiliary inductance supplemented by the current of the clamp winding also drops to zero.

Mode 10: t8-t9 circulation phase

At this stage, the high auxiliary inductance energy on the primary side continues to circulate, the two diodes on the secondary side continue to conduct, the current of DR1 continues to drop, and the current of DR2 rises. This phase waits until the end of Q4 shutdown.

Mode 11: t9-t10 resonance phase

Q4 is turned off at t9, at this time, Lr resonates with C1C2, C1 discharges, and C2 charges until the body diode of Q3 is turned on.

Mode 12: t10-t11 energy feedback stage

The energy of the auxiliary inductance continues to be fed back to the input power supply, and Q3 is turned on at time t11.

When Q2Q3 is turned on and enters the other half of the mode cycle, its circuit analysis is the same as the previous 12 modes, so it will not be analyzed here.

Combining the above analysis, we focus on describing the relevant waveforms during the reverse recovery of the diode:

There is a voltage difference of 2*dV/n between the clamping voltage of the output diode and the rated value,

dV=k(V _Rc +V _d5 +V _ds1 )

Due to the existence of leakage inductance and the time it takes for the clamp diode to conduct, when the clamp starts and ends, there will be small spikes and brief oscillations before reaching the rated back voltage. It can be seen from the figure that due to the existence of parasitic capacitance (including various absorbing capacitances), the diode reverse voltage slowly rises to high voltage, and at the same time the highest reverse voltage is clamped, so its recovery characteristics are well resolved. At the same time, the added clamping diode works in discontinuous current mode (DCM), and its shutdown is naturally soft, so the overall performance of the circuit is improved.

The present invention has verified the correctness and feasibility of theoretical analysis through experiments.

The present invention is also applicable to the topology of the primary side with a DC blocking capacitor or a full-bridge rectification filter circuit for the secondary side. An illustration is given below, as shown in Figure 18.

For the switching of the turn-on timing of the front and rear bridge arms of Q1Q4 and Q2Q3 in this circuit, the circuit also works effectively.

By clamping the auxiliary inductor voltage, this circuit not only maintains the soft switching characteristics of the original phase-shifted full-bridge circuit, but also effectively eliminates the voltage spike caused by the reverse recovery of the output diode, and the added clamp diode also has soft switching characteristics. Recovery characteristics, so that the circuit has excellent electrical performance.

Claims (5)

1. A soft-switching full-bridge phase-shifting circuit with a clamping circuit, including a full-bridge converter, a transformer (T1), an output diode (DR1, DR2 or DR1, DR2, DR3, DR4) and an auxiliary inductor (Lr) , the switching bridge arm of the full-bridge converter is connected to the positive and negative input bus bars, the primary side of the transformer (T1) is connected in series with the auxiliary inductor (Lr) and then connected to the midpoint of the two switching bridge arms of the full-bridge converter, and the secondary side of the transformer (T1) The two ends of each side are respectively connected with output diodes (DR1, DR2 or DR1, DR2, DR3, DR4), which are characterized in that: a second winding——clamping winding is added to the auxiliary inductance (Lr), and the clamping winding One end is connected to the end point connected to the auxiliary inductance (Lr) on the middle point of the switch bridge arm, and the other end is respectively clamped to the positive and negative input bus bars by the first clamping diode (D5) and the second clamping diode (D6). 2. The soft-switching full-bridge phase-shifting circuit with clamping circuit according to claim 1, characterized in that the turn ratio between the auxiliary inductor (Lr) and the clamping winding is greater than or equal to 1. 3. The soft-switching full-bridge phase-shifting circuit with clamping circuit according to claim 1 or 2, characterized in that a resistor (Rc) is connected in series in the clamping winding circuit. 4. The soft-switching full-bridge phase shifting circuit with clamping circuit according to claim 1 or 2, characterized in that there is a DC blocking capacitor (Cb) between the transformer (T1) and the auxiliary inductance (Lr). 5. A clamping method of a soft-switching full-bridge phase-shifting circuit, which is used to clamp the peak voltage of its output diodes (DR1, DR2), is characterized in that: After the reverse recovery phase is over, the excess energy stored on the auxiliary inductance (Lr) is transferred to the clamp winding through electromagnetic induction to avoid oscillation caused by the auxiliary inductance (Lr) and parasitic parameters; The clamping winding and a bridge arm (Q1) on the full-bridge converter form an energy release circuit to release the above-mentioned excess energy.

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