CN121209009A - Methods for manufacturing optical ribbed waveguides - Google Patents

Abstract

The present disclosure relates to methods of manufacturing optical rib waveguides. According to one aspect, a method for fabricating a ridge waveguide of a photonic integrated circuit is presented, the method comprising forming an initial ridge optical waveguide structure from a silicon layer formed on an insulator layer, then forming a mask having openings facing the ridges of the initial structure, then effecting oxidation to reduce the thickness of the ridges of the initial structure positioned facing the openings of the mask, to obtain an optical waveguide from the initial structure having ridges with a thickness less than the thickness of the ridges of the initial structure, and then removing the mask.

Description

Method of manufacturing optical rib waveguide

Cross Reference to Related Applications

The present application claims priority from french application No. fr2406802 filed at 25 at 6 at 2024, which is hereby incorporated by reference.

Technical Field

Embodiments and implementations relate to integrated circuits configured to propagate light waves.

Background

An optical integrated circuit ("photonic integrated circuit") is a circuit configured to propagate light.

Photonic integrated circuits using silicon as a base material for manufacturing optical components are particularly known. These photonic integrated circuits may be indicated by the expression "SiPho" derived from the english "Silicon Photonics (silicon photonics)".

In particular, integrated circuits of the "SiPho" type use the compatibility of silicon with the method of manufacturing semiconductors to create optical components. This allows for an efficient integration with the electronic circuit.

In particular, integrated circuits of the "SiPho" type include optical waveguides. These optical waveguides allow light to be guided and manipulated inside the photonic integrated circuit. These optical waveguides are essentially silicon structures that confine and transmit light from one point to another.

Ridge waveguides (ridge waveguide) or rib waveguides are particularly known, which are optical structures particularly common in semiconductor-based technologies, such as devices based on group III-V materials (materials composed of one or more elements of groups III and V of the mendeleev periodic table of elements), such as gallium arsenide (GaAs) or indium phosphide (InP). Ridge waveguides are used in a variety of applications including semiconductor lasers, optical modulators, photodiode detectors, and other integrated optical components. They are particularly suitable for devices where light needs to be confined in a specific direction.

The ridge waveguide includes a strip layer ("slab"), a sheath (cladding (cladding)) and a ridge or rib protruding above the slab, the ridge having a width less than the slab width. The ridge waveguide may be made of a silicon layer on an insulator.

The thickness of the ridge waveguide is defined by the initial thickness of the silicon layer on the insulator. For some photonic integrated circuits, however, the optimum thickness of the ridge waveguide is different from the initial thickness of the silicon layer on the insulator. In particular, the thickness of the ridge directly affects the propagation index of the ridge. For example, in a hybrid laser, a 500 nm ridge thickness is required for coupling between a stack of "III-V" materials (materials composed of one or more of the elements of groups III and V of the Mendeleev periodic table) and silicon on insulator. In the PN junction of the modulator, the capacitance is optimized by using ridges with a thickness between 150 nm and 310 nm. In fiber grating couplers, the use of ridges with a thickness of about 300 nanometers achieves optimal efficiency.

Disclosure of Invention

According to an aspect of the present disclosure, there is provided a method for fabricating a ridge waveguide of a photonic integrated circuit, the method including forming an initial structure of an optical ridge waveguide from a silicon layer formed on an insulator layer, forming a mask having an opening facing a ridge of the initial structure, performing an oxidation process using the mask to reduce a thickness of the ridge of the initial structure positioned facing the opening of the mask, the performing forming the optical ridge waveguide having a ridge with a thickness less than a thickness of the ridge of the initial structure from the initial structure, and removing the mask after performing the oxidation process.

According to another aspect of the present disclosure, a method for fabricating a photonic integrated circuit having a plurality of ridge waveguides having different thicknesses is provided, the method comprising having a silicon-on-insulator structure comprising a substrate, an insulator layer on the substrate, and a silicon layer on the insulator layer, performing photolithography on the silicon layer to form a plurality of initial ridge waveguide structures, each initial ridge waveguide structure comprising a plate and a ridge on the plate, depositing a dielectric cladding layer on the plurality of initial ridge waveguide structures, performing chemical mechanical polishing to reduce the thickness of the dielectric cladding layer, forming a hard mask on the dielectric cladding layer, the hard mask having an opening facing the ridge of the selected initial ridge waveguide structure, performing an oxidation process to reduce the thickness of the ridge facing the opening of the hard mask, and removing the hard mask.

According to yet another aspect of the present disclosure, an integrated circuit is provided that includes a ridge optical waveguide having a surface roughness of the ridge of less than 2.5 nanometers.

Drawings

Other advantages and features of the invention will become apparent upon reading the detailed description of embodiments, which are not limiting in any way, and from the accompanying drawings, in which:

FIG. 1 illustrates a cross-sectional view of an embodiment of an integrated circuit;

FIG. 2 illustrates a three-dimensional view of an embodiment of a portion of a waveguide;

FIG. 3 illustrates an embodiment of a method for fabricating an integrated circuit;

FIG. 4 illustrates an initial structure according to an embodiment;

FIGS. 5 (a) and 5 (b) illustrate an initial ridge waveguide structure and hard mask that may be obtained at the end of hard mask formation;

FIGS. 6 (a) and 6 (b) illustrate a ridge waveguide and a hard mask, both of which may be obtained at the end of a dielectric thickness deposition over the ridge of the ridge waveguide, and

Fig. 7 (a), 7 (b) and 7 (c) illustrate ridge waveguides that may be obtained at the end of hard mask removal.

Detailed Description

Embodiments provide solutions that allow the provision of ridge optical waveguides with different thicknesses in the same semiconductor wafer to integrate devices in the same integrated circuit to optimize its performance, which devices require different ridge thicknesses in the same semiconductor wafer.

In particular, one known method for fabricating a ridge waveguide includes a first initial etching step to define a new thickness of a silicon layer on an insulator, and a ridge of the waveguide having a thickness greater than the new thickness of the silicon layer. Next, the method includes photolithography and then etching steps to locally reduce the thickness of the plate and to define a new ridge waveguide ridge having the thickness of the silicon layer on the insulator obtained by the initial etching step. Next, the manufacturing method comprises the step of depositing a layer of insulator, in particular silicon dioxide, until the surface of the ridge has a maximum thickness.

This solution has the disadvantage of obtaining a significant roughness on the surface of the ridge, as the surface of the ridge is defined by etching. This roughness reduces the propagation of light waves in the waveguide. In addition, etching performed after photolithography has low resolution (resolution). Thus, the ridge defined by such etching has a significant line-of-line roughness (edge-of-line), which also reduces propagation of the optical wave.

Moreover, the thickness of the ridge defined by the etch following the lithography corresponds to the thickness of the silicon layer on the insulator obtained after the initial etching step. This manufacturing method does not enable the ridge thickness to be made different from the thickness of the silicon on the insulator layer obtained after the initial etching step.

According to an aspect, a method for fabricating a ridge waveguide of a photonic integrated circuit is presented, the method comprising forming an initial ridge of an optical waveguide structure from a silicon layer formed on an insulator layer, then forming a mask having an opening facing the ridge of the initial structure, then performing oxidation to reduce the thickness of the ridge of the initial structure positioned facing the opening of the mask, to obtain an optical waveguide from the initial structure having a ridge with a thickness smaller than the thickness of the ridge of the initial structure, then removing the mask.

In this method of manufacture, the ridge height of the ridge waveguide is defined after the initial ridge waveguide structure has been formed. In particular, the height of the ridge waveguide is adjusted by oxidation after the initial ridge waveguide structure has been formed.

An advantage of this manufacturing method is that a relatively low roughness is maintained on the surface of the ridge waveguide. For example, the surface roughness of the ridges may be less than 2.5 nanometers. This is because the lithography achieved has high definition, which makes it possible to obtain low roughness, and the thickness of the ridge is reduced by oxidation, which does not increase any surface roughness.

Furthermore, this fabrication method allows the thickness of the ridge waveguide to be locally reduced to preserve a greater thickness of silicon on insulator for other components of the photonic integrated circuit, which allows for better performance of these other components of the photonic integrated circuit. Thus, this method makes it possible to manufacture a ridge waveguide having a thickness different from the initial thickness of silicon on insulator.

In an advantageous embodiment, the mask is formed such that the mask covers at least one transition portion of the ridge of the initial structure, and is formed such that the opening of the mask faces a main portion of the ridge of the initial structure, said at least one transition portion extending longitudinally for the main portion.

In this way, the oxidation makes it possible to reduce the thickness of only the main part of the ridge.

In such an embodiment, the adjustment of the thickness of the main portion and the formation of the at least one transition portion of the ridge waveguide are achieved simultaneously.

In an advantageous embodiment, the width of the at least one transition portion decreases towards a major part of the ridge waveguide.

Advantageously, the at least one transition portion has a point shape pointing towards a major part of the ridge waveguide.

Preferably, the formation of the initial structure includes photolithography of a silicon layer on an insulator layer to form a plate of the initial structure and the ridge on the plate.

Advantageously, the lithography is realized to define the final thickness of the plate for the ridge waveguide.

An advantage of such an embodiment is that it allows to define the thickness of the plate and the thickness of the ridge independently.

In an advantageous embodiment the method comprises forming a dielectric coating on said initial structure prior to forming said mask, said dielectric coating having an opening facing the ridge of said initial structure.

Advantageously, the method comprises, prior to forming said mask, performing a chemical mechanical polishing adapted to reduce the thickness of the dielectric coating.

Preferably, the method further comprises removing the oxide obtained by said oxidation, and then depositing a dielectric coating on the ridge of the ridge waveguide before removing the mask.

Advantageously, the plate is formed with a thickness between 50 nm and 150 nm.

Preferably, the oxidation is implemented such that the ridge of the ridge waveguide has a thickness between 100 nm and 230 nm.

According to another aspect, an integrated circuit is proposed comprising a ridge optical waveguide obtained by implementing the manufacturing method as described above.

Accordingly, an integrated circuit is proposed that includes a ridge optical waveguide whose ridge has a surface roughness of less than 2.5 nanometers.

Advantageously, the integrated circuit further comprises at least one optical waveguide having a thickness that is different compared to the thickness of the ridge waveguide.

Fig. 1 illustrates a cross-sectional view of an embodiment of an integrated circuit IC. The integrated circuit IC includes a support substrate SUB, an insulator layer ISO on the support substrate layer SUB, a silicon layer SOI on the insulator layer ISO, and a dielectric cladding DIEL. Silicon layer SOI is used to form optical waveguides WG1, WG2, WG3, and other electronic components (not shown).

The insulator layer ISO is formed from a dielectric material (e.g., from silicon dioxide). The thickness of the insulator layer ISO is typically between 700 nanometers and 5 micrometers.

Silicon layer SOI on insulator ISO is a layer that may be referred to by the english expression "Silicon onInsulator (silicon on insulator)".

The optical waveguides WG1, WG2, WG3 are formed in a silicon layer SOI on an insulator ISO. These waveguides WG1, WG2, WG3 may be juxtaposed with other waveguides so that light may propagate between these waveguides.

Fig. 2 illustrates a three-dimensional view of an embodiment of a portion of the waveguide WG 1. The optical waveguide WG1 is a ridge or rib waveguide. Thus, the optical waveguide WG1 includes a board SLB. The plate SLB corresponds to a planar portion of the ridge waveguide. The thickness E_SLB of the plate SLB is between 50 nanometers and 150 nanometers. The thickness E_SLB of the plate SLB may vary between the various optical waveguides WG1 and WG 2. The width w_slb of the plate SLB is large enough that the optical waveguide does not extend beyond its ends and is adapted to avoid interaction with other waveguides. For example, the width w_slb of the plate SLB is between 2 μm and 5 μm.

The ridge waveguide WG1 also includes a ridge RDG located above the slab SLB. The ridge RDG is formed from the same silicon layer SOI as the plate SLB. The ridge RDG extends longitudinally above the plate SLB.

The ridge RDG may have a main portion rdg_p and at least one transition portion rdg_t extending up to the longitudinal ends of the ridge. The at least one transition portion rdg_t has a form adapted to improve the propagation of waves between the at least one transition portion rdg_t and the main portion rdg_p.

The at least one transition portion rdg_t has a pointed shape in the longitudinal direction of the ridge RDG, which pointed towards the main portion rdg_p. Thus, the width of the transition portion rdg_t gradually decreases over its length, up to the main portion.

The thickness e_rdg_p of the main portion rdg_p of the ridge RDG is smaller than the thickness e_rdg_t of the at least one transition portion rdg_t. In particular, the thickness e_rdg_p of the main portion rdg_p is between 100nm and 230 nm.

The width w_rdg_p of the main portion rdg_p is between 300 nm and 2 μm, in particular between 300 nm and 800 nm.

The transition portion rdg_t makes it possible to improve the propagation of waves between the main portion rdg_p and other waveguides extending the waveguide in the ridge WG1 and having a thickness corresponding to the thickness of the at least one transition portion rdg_t.

The length l_rdg_t of the transition portion rdg_t is between 500 nm and 5 μm, for example about 1 μm.

The ridge RDG and the slab SLB of the ridge waveguide have a low roughness, in particular a roughness of less than 2.5 nm.

Fig. 3 illustrates an embodiment of a method for manufacturing an integrated circuit, such as the integrated circuit shown in fig. 1.

The method includes a step 20 of forming an initial structure STR of a ridge waveguide from a semiconductor slice WFR (which may also be referred to as the term "wafer"). The wafer WFR includes a substrate SUB, an insulating layer ISO on the substrate layer SUB, and a silicon layer SOI on the insulating layer ISO. The silicon layer SOI may have a thickness of, for example, 300 nanometers.

The initial structure STR is then used to obtain the ridge waveguide WG1 as described previously.

The initial waveguide structure STR is formed from the silicon layer SOI by implementing high resolution lithography. This makes it possible to obtain low line edge roughness.

The initial structure STR comprises a plate SLB, a ridge RDG and a sheath layer (in particular comprising an insulator layer ISO and a dielectric coating DIEL). The thickness of the ridge RDG corresponds to the initial thickness of the silicon layer SOI on the insulator ISO. This thickness is then greater than the desired thickness of the ridge RDG.

The formation of the initial structure STR makes it possible to define the desired thickness of the slab SLB of the ridge waveguide.

The method further comprises a step 21 of depositing a dielectric cladding layer DIEL on the wafer, in particular on the initial optical waveguide structure STR. The dielectric cladding DIEL is formed with an opening facing the ridge RDG of the original optical waveguide structure STR, for which purpose the thickness of the ridge RDG needs to be reduced. The dielectric coating DIEL can in particular be produced from silicon dioxide.

Fig. 4 illustrates an embodiment of such an initial structure STR.

The method further comprises a chemical mechanical polishing step 22 for reducing the thickness of the dielectric cladding DIEL such that its top surface extends to a height slightly above the height of the ridge RDG of the original structure STR of the ridge waveguide. For example, the top surface of the dielectric coating DIEL has a height that is 1 to 20 nanometers higher than the height of the ridge RDG. The chemical mechanical polishing step 22 allows the thickness of the dielectric coating to be adjusted.

This chemical mechanical polishing step 22 also makes it possible to obtain an electrical coating with a smooth top surface, in order to simplify the application of the hard mask MSK, as described below.

Once the chemical mechanical polishing has been achieved, a thin layer of silicon oxide can be left on the ridge RDG to avoid damaging the waveguide.

The method includes a step 23 of forming a hard mask HMSK over the dielectric cap DIEL. The hard mask HMSK corresponds to a layer fabricated from a robust durable material that has a predefined form of the opening OPN. The hard mask HMSK may be specifically generated from SiN. The hard mask HMSK may be obtained by depositing a SiN layer and then performing photolithography and etching to obtain the opening OPN.

In particular, the hard mask HMSK is formed to have an opening OPN facing the main portion rdg_p of the ridge RDG of the initial ridge waveguide structure STR, for which purpose the thickness of the ridge RDG needs to be reduced. The hard mask HSMSK is also formed to cover at least the transition portion rdg_t of the ridge of the initial ridge waveguide structure STR.

More particularly, the opening of mask HMSK has a width that is greater than the width of the ridge RDG to compensate for incorrect lithographic alignment and to use a low-cost, low-resolution mask.

Fig. 5 (a) and 5 (b) illustrate an initial ridge waveguide structure STR and a hard mask HMSK that may be obtained at the end of hard mask HMSK formation. In particular, fig. 5 (b) is a plan view of the ridge waveguide, and fig. 5 (a) is a cross-sectional view along the plane A-A shown on fig. 5 (b).

The method further includes an oxidation step 24. Oxidation makes it possible to convert a portion of the surface silicon of the ridges RDG of the initial structure STR into silicon oxide. Thus, this makes it possible to reduce the thickness of the ridge RDG of the waveguide on the portion not covered by the mask HMSK.

The duration of the oxidation is such that the final thickness of the ridge RDG of the waveguide can be defined.

The oxidation step makes it possible to obtain a ridge waveguide WG1 with a ridge RDG having a main portion rdg_p and at least one transition portion rdg_t, the thickness of the main portion rdg_p being smaller than the thickness of the at least one transition portion rdg_t.

The silicon oxide resulting from the oxidation may then be removed or not removed. In addition, a thickness of dielectric DIEL (especially silicon dioxide) is deposited to fill the openings in the cladding over the ridges passing through the oxidized ridge waveguide. The method may then include a chemical mechanical polishing step.

Fig. 6 (a) and 6 (b) illustrate a ridge waveguide WG1 and a hard mask HMSK, both of which can be obtained at the end of depositing a dielectric thickness DIEL over the ridge of the ridge waveguide. In particular, fig. 6 (b) is a plan view of the ridge waveguide, and fig. 6 (a) is a cross-sectional view along the plane A-A shown on fig. 6 (b).

The method next includes a step 25 of removing the mask HMSK.

Fig. 7 (a), 7 (b), and 7 (c) illustrate a ridge waveguide that may be obtained at the end of the removal of the hard mask HMSK. In particular, fig. 7 (B) is a plan view of the ridge waveguide, fig. 7 (a) is a cross-sectional view along a plane A-A shown on fig. 7 (B), and fig. 7 (c) is a longitudinal sectional view along a plane B-B on fig. 7 (B).

Steps 23 to 25 may be repeated to define waveguides having ridges of different thicknesses.

Such a fabrication method may be used to fabricate an integrated circuit, such as the integrated circuit shown in fig. 1.

In this manufacturing method, the height of the ridge waveguide is defined after the initial ridge waveguide structure has been previously formed. In particular, the height of the ridge waveguide is adjusted by oxidation after the initial ridge waveguide structure has been formed.

Furthermore, in this manufacturing method, the adjustment of the thickness of the main portion of the ridge waveguide and the formation of the at least one transition portion are achieved simultaneously.

An advantage of this manufacturing method is that a relatively low roughness on the surface of the ridge waveguide is maintained. For example, the surface roughness of the ridges may be less than 2.5 nanometers. This is because the photolithography achieved has a high resolution, which makes it possible to obtain a low roughness, and the thickness of the ridge is reduced by oxidation, which does not increase any surface roughness.

This manufacturing method also has the advantage of making it possible to define the thickness of the plate and the thickness of the ridge independently.

Claims (20)

1. A method for fabricating a ridge waveguide of a photonic integrated circuit, the method comprising:

Forming an initial structure of an optical ridge waveguide from a silicon layer formed on an insulator layer;

forming a mask having an opening facing the ridge of the original structure;

Performing an oxidation process using the mask to reduce a thickness of a ridge of an initial structure positioned facing an opening of the mask, the performing forming the optical ridge waveguide having a ridge with a thickness less than that of the ridge of the initial structure from the initial structure, and

The mask is removed after performing the oxidation process.

2. The method of claim 1, wherein the mask is formed such that the mask covers at least one transition portion of the ridges of the initial structure and such that the opening of the mask faces a main portion of the ridges of the initial structure, the at least one transition portion extending longitudinally of the main portion.

3. The method of claim 2, wherein the at least one transition portion has a width that decreases toward a major portion of a ridge of the ridge waveguide.

4. A method according to claim 3, wherein the at least one transition portion has a pointed shape pointing towards a major part of the ridge waveguide.

5. The method of claim 1, wherein the forming of the initial structure comprises photolithography of a silicon layer on an insulator layer for forming:

A plate of initial structure, and

The ridges on the plate.

6. The method of claim 5, wherein the lithography is implemented to define a final thickness of the slab for the ridge waveguide.

7. The method of any of claims 1-6, further comprising, prior to forming the mask, forming a dielectric coating on the initial structure, the dielectric coating having an opening facing the ridge of the initial structure.

8. The method of claim 7, comprising chemical mechanical polishing adapted to reduce a thickness of the dielectric coating (DIEL) prior to forming the mask (HMSK).

9. The method of any of claims 1-6, further comprising removing oxide obtained by the oxidation process, and then depositing a dielectric coating on the ridge of the ridge waveguide prior to removing the mask.

10. The method of claim 5, wherein the plate is formed to have a thickness between 50 nanometers and 150 nanometers.

11. The method of claim 1, wherein the oxidation process is performed such that the ridge of the ridge waveguide has a thickness between 100 nanometers and 230 nanometers.

12. The method of claim 1, further comprising forming at least one optical waveguide having a different thickness than a thickness of a ridge of the ridge waveguide.

13. A method for fabricating a photonic integrated circuit having a plurality of ridge waveguides having different thicknesses, the method comprising:

Having a silicon-on-insulator structure comprising a substrate, an insulator layer on the substrate, and a silicon layer on the insulator layer;

Performing photolithography on the silicon layer to form a plurality of initial ridge waveguide structures, each initial ridge waveguide structure comprising a plate and a ridge on the plate;

Depositing a dielectric cladding layer over the plurality of initial ridge waveguide structures;

Performing chemical mechanical polishing to reduce the thickness of the dielectric coating;

Forming a hard mask on the dielectric cladding layer, the hard mask having an opening facing a ridge of the selected initial ridge waveguide structure;

Performing an oxidation process to reduce the thickness of the ridge facing the opening of the hard mask, and

And removing the hard mask.

14. The method of claim 13, wherein the hard mask comprises silicon nitride.

15. The method of claim 13, wherein the dielectric coating comprises silicon dioxide.

16. The method of claim 13, wherein the oxidation process is performed for a duration selected to achieve a predetermined final thickness of the ridge facing the opening of the hard mask.

17. An integrated circuit, comprising:

a ridge optical waveguide having a ridge surface roughness of less than 2.5 nanometers.

18. The integrated circuit of claim 17, further comprising at least one optical waveguide having a different thickness than a thickness of a ridge of the ridge optical waveguide.

19. The integrated circuit of claim 17, wherein the ridge optical waveguide comprises:

A plate having a thickness between 50nm and 150 nm, and

A ridge on the plate, the ridge having a thickness between 100 nanometers and 230 nanometers.

20. The integrated circuit of claim 17, wherein the ridge optical waveguide comprises:

Having a main portion of a first thickness, and

At least one transition portion having a second thickness different from the first thickness, the at least one transition portion having a width that decreases toward the main portion.