CN120603366A - Solar cell and manufacturing method thereof, laminated cell, and photovoltaic module - Google Patents
Solar cell and manufacturing method thereof, laminated cell, and photovoltaic moduleInfo
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- CN120603366A CN120603366A CN202511109707.0A CN202511109707A CN120603366A CN 120603366 A CN120603366 A CN 120603366A CN 202511109707 A CN202511109707 A CN 202511109707A CN 120603366 A CN120603366 A CN 120603366A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/121—The active layers comprising only Group IV materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
- H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K39/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group H10K30/00
- H10K39/10—Organic photovoltaic [PV] modules; Arrays of single organic PV cells
- H10K39/15—Organic photovoltaic [PV] modules; Arrays of single organic PV cells comprising both organic PV cells and inorganic PV cells
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Abstract
本公开实施例涉及光伏领域，提供一种太阳能电池片及其制作方法、叠层电池、光伏组件，其中，太阳能电池片包括：提供基底，基底包括相对的第一表面和第二表面，第一表面包括交替排布的第一区及第二区；形成保护层，保护层位于第一表面；刻蚀位于第二区的保护层及基底，以形成第一凹槽；形成第一掺杂导电层，第一掺杂导电层位于第一凹槽内；形成第一电极，第一电极与第一掺杂导电层电连接。可以提高形成的太阳能电池片的性能。
The disclosed embodiments relate to the photovoltaic field and provide a solar cell and a method for manufacturing the same, a laminated cell, and a photovoltaic module. The solar cell comprises: providing a substrate comprising a first surface and a second surface opposite each other, the first surface comprising alternating first and second regions; forming a protective layer located on the first surface; etching the protective layer and the substrate located in the second region to form a first groove; forming a first doped conductive layer located within the first groove; and forming a first electrode electrically connected to the first doped conductive layer. This can improve the performance of the resulting solar cell.
Description
Technical Field
The disclosure relates to the field of photovoltaics, in particular to a solar cell, a manufacturing method thereof, a laminated cell and a photovoltaic module.
Background
Photovoltaic power generation, which is to convert solar energy into electric energy through the photovoltaic effect of semiconductors, such as TOPCON (Tunnel Oxide Passivated Contact, tunneling oxide passivation contact) cells, are receiving increasing attention for their better photoelectric conversion performance.
However, the doped conductive layer and the substrate are damaged during the process of forming the doped conductive layer, which affects the short-circuit current and the conversion efficiency of the battery, and therefore, it is necessary to provide a method for manufacturing a solar cell to reduce the damage of the doped conductive layer and the substrate.
Disclosure of Invention
The embodiment of the disclosure provides a solar cell, a manufacturing method thereof, a laminated cell and a photovoltaic module, which can at least reduce damage to a doped conductive layer in the process of forming the solar cell so as to improve performance of the formed solar cell.
According to some embodiments of the present disclosure, an aspect of the disclosure provides a method for manufacturing a solar cell, which includes providing a substrate, wherein the substrate includes a first surface and a second surface that are opposite to each other, the first surface includes a first region and a second region that are alternately arranged, forming a protective layer, the protective layer is located on the first surface, etching the protective layer and the substrate located on the second region to form a first groove, forming a first doped conductive layer, the first doped conductive layer is located in the first groove, and forming a first electrode, and the first electrode is electrically connected with the first doped conductive layer.
In some embodiments, the method for forming the protective layer comprises performing an oxidation treatment, wherein the technological parameters of the oxidation treatment comprise a technological time of 3000-4500 s, a technological temperature of 850-1000 ℃, and a gas flow of 2000-20000 sccm of oxygen.
In some embodiments, the method of forming the first recess includes performing a first laser treatment that irradiates the protective layer in the second region, performing a first etching treatment that etches the protective layer in the second region and the substrate.
In some embodiments, the parameters of the first laser treatment comprise 30-40 w of power and green-skin laser or purple-skin laser of laser type, and the parameters of the first etching treatment comprise 8-13% of etching solution by volume percentage concentration.
In some embodiments, forming the first doped conductive layer further comprises forming a tunneling layer, wherein the tunneling layer at least covers part of the second surface, and forming a second doped conductive layer, wherein the second doped conductive layer covers the surface of the tunneling layer.
In some embodiments, the protective layer is formed further comprising, prior to forming the protective layer, performing a first texturing process that forms a first pyramid structure on the first surface, and after forming the second doped conductive layer, performing a second texturing process that forms a second pyramid structure on the second surface, the first pyramid structure having a tower base size that is smaller than a tower base size of the second pyramid structure.
In some embodiments, the first texturing process comprises a process temperature of 70-75 ℃, the concentration of the first additive is 0.4-0.7% by volume, the concentration of the first additive is 0.2-0.5% by volume, the second texturing process comprises a process temperature of 75-80 ℃, the concentration of the second additive is 0.4-0.7% by volume, the protective capability of the first additive is greater than the protective capability of the second additive.
In some embodiments, the first doped conductive layer is further preceded by performing a third texturing process that forms a third pyramid structure within the first recess, the third pyramid structure having a tower foot size that is less than or equal to a tower foot size of the first pyramid structure.
In some embodiments, the method of forming the second doped conductive layer includes forming a second initially doped conductive layer that covers a surface of the tunneling layer, removing the second initially doped conductive layer located in the first region, and leaving the second initially doped conductive layer as the second doped conductive layer.
In some embodiments, a method of removing a portion of the second initially doped conductive layer includes performing a second laser treatment that irradiates a surface of the second initially doped conductive layer at the first region, and performing a second etching treatment that etches the second initially doped conductive layer at the first region.
According to some embodiments of the present disclosure, another aspect of the embodiments of the present disclosure further provides a solar cell, which is formed by using the method for manufacturing a part or all of the solar cell, and the method includes a substrate, wherein the substrate includes a first surface and a second surface that are opposite, the first surface includes a first region and a second region that are alternately arranged, a first groove is further included in the substrate, a first doped conductive layer is located in the first groove, and a first electrode is in contact electrical connection with the first doped conductive layer.
In some embodiments, the substrate further comprises a first pyramid structure located on the first surface, a second pyramid structure located on the second surface, and a base size of the first pyramid structure is smaller than a base size of the second pyramid structure.
In some embodiments, the substrate further comprises a third pyramid structure positioned within the first recess, the third pyramid structure having a base size that is less than or equal to the base size of the first pyramid structure.
According to some embodiments of the present disclosure, still another aspect of the embodiments of the present disclosure provides a stacked battery, including a bottom battery, a composite layer, and a perovskite top battery stacked in sequence along a preset direction, where the bottom battery is a solar cell formed by a method for manufacturing a part or all of the solar cells, or a part or all of the solar cells.
According to some embodiments of the present disclosure, a photovoltaic module is further provided in a further aspect of the embodiments of the present disclosure, where the cell string includes a plurality of solar cells formed by the method for manufacturing a solar cell as described above, or a plurality of solar cells as described above, or a plurality of stacked cells as described above, a solder ribbon electrically connected to at least two solar cells or stacked cells to be adjacent to the solar cells or stacked cells in series, an encapsulating film for covering a surface of the cell string, and a cover plate for covering a surface of the encapsulating film away from the cell string.
The technical scheme provided by the embodiment of the disclosure has the advantages that firstly, the protective layer is formed on the first surface of the substrate, the protective layer protects the substrate without etching in the process of forming the first groove, then the first doped conductive layer positioned in the first groove is formed, the position of the first doped conductive layer is defined, the subsequent secondary processing of the first doped conductive layer in the process of forming the first doped conductive layer is avoided, meanwhile, the protective layer also serves as a blocking layer in the process of forming the first doped conductive layer, the substrate is prevented from being damaged in the process of forming the first doped conductive layer, the reliability of a first area is prevented from being influenced, and therefore the reliability of the solar cell is improved, secondly, the first groove is formed, the glue overflowing condition in the process of forming the first electrode is reduced, the glue consumption is reduced, the first doped conductive layer is positioned in the first groove, the first electrode can be contacted with the first doped conductive layer more, the first electrode can be prevented from being contacted with the substrate deeply, and the necessary leakage current can be prevented from being generated.
Drawings
One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, which are not to be construed as limiting the embodiments unless specifically claimed, and in order to more clearly illustrate the embodiments of the present disclosure or the concepts of the conventional art, the drawings that are required to be utilized in the embodiments will be briefly described below, it will be apparent that the drawings in the following description are merely some embodiments of the present disclosure and that other drawings may be derived from these drawings by one of ordinary skill in the art without undue effort.
FIG. 1 is a schematic view of a substrate according to an embodiment of the disclosure;
FIG. 2 is a schematic diagram illustrating a structure of forming a passivation layer according to an embodiment of the disclosure;
FIG. 3 is a schematic diagram illustrating a structure of forming a first groove according to an embodiment of the disclosure;
FIG. 4 is a schematic diagram illustrating a structure of forming a first doped conductive layer according to an embodiment of the disclosure;
fig. 5 is a schematic structural diagram of a back polishing process according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram illustrating a structure of forming an initial tunneling layer and a second semiconductor layer according to an embodiment of the disclosure;
FIG. 7 is a schematic diagram of a structure for forming a second initially doped conductive layer according to an embodiment of the disclosure;
FIG. 8 is a schematic illustration of removing a portion of a second initially doped conductive layer in accordance with an embodiment of the present disclosure;
FIG. 9 is a schematic diagram of a second texturing process according to an embodiment of the present disclosure;
FIG. 10 illustrates the formation of a first electrode and a second electrode in an embodiment of the present disclosure;
Fig. 11 is a schematic structural diagram of a stacked battery according to an embodiment of the present disclosure.
Reference numerals illustrate:
100. Substrate, 110, first surface, 120, second surface, 130, first region, 140, second region, 101, protective layer, 150, first recess, 102, first doped conductive layer, 103, first electrode, 160, first pyramid structure, 170, third pyramid structure, 104, tunneling layer, 105, second doped conductive layer, 115, second initially doped conductive layer, 114, initial tunneling layer, 125, second semiconductor layer, 106, glass layer, 180, second pyramid structure, 108, passivation layer, 107, second electrode.
400. Bottom cell, 401, composite layer, 402, perovskite top cell, 412, hole transport layer, 422, perovskite absorption layer, 432, electron transport layer, 442, electrode, 404, back electrode.
Detailed Description
As known from the background art, in the process of forming the local first doped conductive layer, the first doped conductive layer covering the entire surface of the substrate is usually formed first, and then part of the first doped conductive layer is removed by laser etching to form the local first doped conductive layer.
In the embodiment of the disclosure, firstly, a protective layer is formed on a first surface of a substrate, the protective layer protects the substrate without etching in the process of forming a first groove, and then a first doped conductive layer positioned in the first groove is formed, by defining the position of the first doped conductive layer, the subsequent secondary processing of the first doped conductive layer in the process of forming the first doped conductive layer is avoided, meanwhile, the protective layer also serves as a blocking layer in the process of forming the first doped conductive layer, the substrate is prevented from being damaged in the process of forming the first doped conductive layer, the reliability of a first area of the substrate is prevented from being influenced, and therefore the reliability of a solar cell is improved, secondly, by forming the first groove, the glue overflowing condition in the process of forming the first electrode is reduced, the glue consumption is reduced, and meanwhile, the first doped conductive layer is positioned in the first groove, so that the first electrode can be more contacted with the first doped conductive layer, the unnecessary contact between the first electrode and the substrate can be reduced, and the unnecessary contact between the first electrode and the substrate can be avoided.
In the description of the embodiments of the present disclosure, the technical terms "first," "second," and the like are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present disclosure, the meaning of "a plurality" is two or more unless explicitly defined otherwise.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present disclosure. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In the description of the embodiments of the present disclosure, the term "and/or" is merely an association relationship describing an association object, and indicates that three relationships may exist, for example, a and/or B, and may indicate that a exists, and a and B exist at the same time, and that B exists. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
In the description of the embodiments of the present disclosure, the term "plurality" refers to two or more (including two), and similarly, "plural sets" refers to two or more (including two), and "plural sheets" refers to two or more (including two).
In the description of the embodiments of the present disclosure, the orientation or positional relationship indicated by the technical terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationship shown in the drawings, only for convenience of description and simplification of the description, and are not indicative or implying that the apparatus or element referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the embodiments of the present disclosure.
In describing embodiments of the present disclosure, unless explicitly stated or limited otherwise, the terms "mounted," "connected," "secured" and the like should be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed, mechanically connected, electrically connected, directly connected, indirectly connected via an intervening medium, or interconnected between two elements. The specific meaning of the above terms in the embodiments of the present disclosure will be understood by those of ordinary skill in the art according to specific circumstances.
In the drawings corresponding to the embodiments of the present disclosure, thicknesses and areas of layers are exaggerated for better understanding and convenience of description. When an element (e.g., a layer, film, region, or substrate) is referred to as being "on" or "on" another element, it can be "directly on" the other element or be present between the two elements. Conversely, when it is described that one component is formed on or provided with another component surface, then it is meant that there is no third component between the two components. Further, when it is described that one component is "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor on a partial edge of the entire surface.
In the description of the embodiments of the present disclosure, when a certain component "includes" another component, the other component is not excluded unless otherwise stated, and the other component may be further included. In addition, when an element such as a layer, film, region, or panel is referred to as being "on/on" another element, it can be "directly on" the other element (i.e., no other element is present between the two surfaces of the other element), or another element can be present therebetween. In addition, when a layer, film, region, plate, etc., is "directly on" another element, or when a layer, film, region, plate, etc., is on the surface of another element, it means that no other element is located therebetween.
The terminology used in the description of the various described embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments described and in the scope of the claims, the "component" is also intended to include the plural form unless the context clearly indicates otherwise. Wherein the components include layers, films, regions, or plates.
Embodiments of the present disclosure will be described in detail below with reference to the attached drawings. However, those of ordinary skill in the art will understand that in the various embodiments of the present disclosure, numerous technical details have been set forth in order to provide a better understanding of the present disclosure. The technical solutions claimed in the present disclosure can be implemented without these technical details and with various changes and modifications based on the following embodiments.
Referring to fig. 1 to 10, fig. 1 to 10 are schematic structural diagrams corresponding to each step of a method for manufacturing a solar cell according to an embodiment of the disclosure.
In some embodiments, a method of fabricating a solar cell may include providing a substrate 100, the substrate 100 including a first surface 110 and a second surface 120 opposite to each other, the first surface 110 including first regions 130 and second regions 140 alternately arranged.
The method for manufacturing the solar cell may further include forming a protective layer 101, where the protective layer 101 is located on the first surface 110.
The method for manufacturing the solar cell may further include etching the protective layer 101 and the substrate 100 located in the second region 140 to form the first groove 150.
The method for manufacturing the solar cell may further include forming a first doped conductive layer 102, where the first doped conductive layer 102 is located in the first groove 150.
The method for manufacturing the solar cell may further include forming a first electrode 103, where the first electrode 103 is electrically connected to the first doped conductive layer 102.
In the embodiment of the disclosure, firstly, the protective layer 101 is formed on the first surface 110 of the substrate 100, the protective layer 101 protects the substrate 100 without etching in the process of forming the first groove 150, and then the first doped conductive layer 102 is formed in the first groove 150, by defining the position of the first doped conductive layer 102, the second processing of the first doped conductive layer 102 in the process of forming the first doped conductive layer 102 is avoided, meanwhile, the protective layer 101 also serves as a barrier layer in the process of forming the first doped conductive layer 102, the substrate 100 is prevented from being damaged in the process of forming the first doped conductive layer 102, the reliability of the first region 130 is prevented from being influenced, and thus the reliability of the solar cell is improved, and secondly, by forming the first groove 150, the condition of slurry overflow in the process of forming the first electrode 103 is reduced, so that the loss of slurry is reduced, meanwhile, the first doped conductive layer 102 is formed in the first groove 150, so that the first electrode 103 can be contacted with the first doped conductive layer 102 more, the first electrode 130 can be prevented from being contacted with the first doped conductive layer 102, and the necessary leakage current of the first electrode 100 can be prevented from being further reduced.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a substrate according to an embodiment of the disclosure.
In some embodiments, the material of the substrate 100 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, which may be silicon or germanium, for example. The elemental semiconductor material may be in a single crystal state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both a single crystal state and an amorphous state, referred to as a microcrystalline state), and for example, silicon may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon. The material of the substrate 100 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenium, and the like.
The substrate 100 may be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, wherein the N-type doping element can be at least one of V-group elements such As phosphorus (P) element, bismuth (Bi) element, antimony (Sb) element, arsenic (As) element and the like. The P-type semiconductor substrate is doped with a P-type element, and the P-type doped element may be at least one of group III elements such as boron (B) element, aluminum (Al) element, gallium (Ga) element, and indium (In) element.
In some embodiments, a first texturing process is also performed, the first texturing process forming a first pyramid structure 160 on the first surface 110. The absorption and utilization of light by the first surface 110 of the substrate 100 may be enhanced by performing a first texturing process on the first surface 110. The first pyramid structures 160, that is, the surface texture structures corresponding to the substrate 100, can reduce the reflectivity of the surface of the substrate 100 by forming the first pyramid structures 160, and can also form light traps, so as to enhance the absorption effect of the substrate 100 on incident light and improve the photoelectric conversion efficiency of the solar cell.
In some embodiments, the process parameters of the first texturing process include a process temperature of 70-75 ℃, such as 70 ℃,71 ℃, 72 ℃, 73 ℃, 74 ℃, or 75 ℃, a concentration of 0.4% -0.7%, such as 0.4%, 0.5%, 0.6%, or 0.7%, and a concentration of 0.2% -0.5%, such as 0.2%, 0.3%, 0.4%, or 0.5%, by volume of the texturing solution, and a concentration of the first additive.
The process temperature provides an etching environment for the first texturing process to facilitate formation of the first pyramid structures 160, the texturing solution is used to etch portions of the substrate 100 to form the first pyramid structures 160, the first additive is used to protect the substrate 100 from excessive damage to the substrate 100 by the first texturing process, and the surface of the substrate 100 is controlled to form the first pyramid structures 160.
In some embodiments, the first surface 110 may be a front surface, the second surface 120 may be a back surface, the front surface may be a light receiving surface of the solar cell for receiving incident light, and the back surface may be a back surface. In other embodiments, the solar cell is a double sided cell, and both the first surface 110 and the second surface 120 can be used as light receiving surfaces for receiving incident light. It should be understood that the backlight surface according to the embodiment of the present application can also receive the incident light, but the receiving degree of the incident light is weaker than the receiving degree of the incident light by the light receiving surface, so the backlight surface is defined as a backlight surface.
The first region 130 and the second region 140 of the substrate 100 may be divided according to whether the first electrode 103 is formed directly opposite to the first region 130, for example, a position offset from the first electrode 103 is defined as the first region 130, and a position directly opposite to the first electrode 103 is defined as the second region 140.
In some embodiments, the width of the second region 140 may be greater than the width of the first electrode 103 along the arrangement direction of the first electrode 103, so as to reduce the alignment difficulty when forming the first electrode 103, thereby reducing the difficulty of the manufacturing method of the solar cell.
Referring to fig. 2, fig. 2 is a schematic structural view illustrating formation of a protective layer on the basis of fig. 1 according to an embodiment of the present disclosure.
In some embodiments, the method of forming the protective layer 101 may include performing an oxidation treatment, wherein the process parameters of the oxidation treatment include a process time of 3000 s-4500 s, such as 3000s, 3200s, 3500s, 3800s, 4000s, 4500s, etc., a process temperature of 850 ℃ to 1000 ℃, such as 850 ℃, 900 ℃, 930 ℃, 950 ℃, 980 ℃ or 1000 ℃, etc., and a gas flow rate of oxygen of 2000 sccm-20000 sccm, such as 2000sccm, 5000sccm, 7000sccm, 10000sccm, 12000sccm, 15000sccm, 18000sccm, 20000sccm, etc.
By converting part of the substrate 100 into the protective layer 101 through oxidation treatment, the compactness and uniformity of the formed protective layer 101 can be improved, so that the protective capability of the protective layer 101 can be improved, the higher the compactness is, the stronger the capability of blocking etching and diffusing ions is, and the lower the possibility that the substrate 100 is affected in the subsequent process of forming the first doped conductive layer 102 is.
For the process time, the thickness of the protection layer 101 formed by longer process time is thicker, the thickness of the protection layer 101 formed by shorter process time is thinner, if the process time is less than 3000s, the thickness of the protection layer 101 formed is too thin, the protection capability of the protection layer 101 is reduced, and the improvement effect cannot be expected, and if the process time is more than 4500s, the thickness of the protection layer 101 converted from the substrate 100 may be too thick, the capability of generating photo-generated carriers of the substrate 100 is reduced, and the performance of the formed solar cell is reduced.
For the process temperature, the higher the process temperature is, the faster the rate of forming the protective layer 101 is, the lower the process temperature is, the slower the rate of forming the protective layer 101 is, if the process temperature is less than 850 ℃, the effect of forming the protective layer 101 is too slow, the time required for forming the protective layer 101 with the target thickness is too long, the efficiency of the manufacturing method of the solar cell is reduced, if the process temperature is more than 1000 ℃, a certain influence may be caused on the substrate 100 itself, and the reliability of the formed solar cell may be reduced, so that the process temperature is set at 850-1000 ℃ while the efficiency of forming the protective layer 101 is considered, and the reliability of forming the solar cell is improved.
For the gas flow rate of oxygen, the higher the gas flow rate of oxygen is, the faster the rate of forming the protective layer 101 is, the lower the gas flow rate of oxygen is, the slower the rate of forming the protective layer 101 is, if the gas flow rate of oxygen is less than 2000sccm, the rate of forming the protective layer 101 may be too slow, if the gas flow rate of oxygen is more than 20000sccm, the waste of oxygen may be caused, the reaction rate may be limited, the oxygen may be excessive, and at the same time, the too large gas flow rate of oxygen may cause the process of forming the protective layer 101 to be difficult to control, resulting in converting too many substrates 100 into the protective layer 101.
In some embodiments, the protective layer 101 may also be formed by deposition, by which the thickness of the protective layer 101 may be conveniently controlled to form the protective layer 101 of a desired thickness.
The material of the protective layer 101 may be silicon oxide or the like, and may be changed according to the need or the material of the substrate 100.
Referring to fig. 3, fig. 3 is a schematic structural diagram of forming a first groove on the basis of fig. 2 according to an embodiment of the present disclosure.
In some embodiments, the method of forming the first recess 150 includes performing a first laser process that irradiates the protective layer 101 located in the second region 140, performing a first etching process that etches the protective layer 101 located in the second region 140 and the substrate 100. The protection layer 101 and the substrate 100 can be modified by the first laser treatment so as to facilitate the removal of the first etching treatment, the difficulty in removing the protection layer 101 and the substrate 100 can be reduced by the first laser treatment so as to facilitate the formation of the first groove 150, and meanwhile, the substrate 100 damaged in the first laser treatment process can be removed by removing part of the substrate 100, so that the reliability of the formed solar cell is improved.
It should be noted that, the modification herein may refer to changing the state of the material of the protective layer 101 and the substrate 100 by using laser treatment, and the protective layer 101 and the substrate 100 in the second region 140 become more loose for etching.
The protection layer 101 located in the second region 140 herein means that the orthographic projection on the surface of the substrate 100 is located in the second region 140.
In some embodiments, the parameters of the first laser treatment include a power of 30 w-40 w, such as 30w, 32w, 34w, 36w, 38w, or 40w, etc., and the laser type is green-skin laser or violet-skin laser, and the parameters of the first etching treatment include a concentration of 8% -13%, such as 8%, 9%, 10%, 11%, 12%, or 13%, by volume of the etching solution.
For the power, the higher the power, the stronger the modifying ability of the first laser treatment, and the lower the power, the worse the modifying effect, so the power is set to be greater than or equal to 30w, so that the first laser treatment has a better modifying effect, and if the power is greater than 40w, the first laser treatment may cause excessive damage to the substrate 100.
For the laser type, compared with the green laser, the wavelength of the violet laser is smaller, the penetration depth of the film layer is smaller, and the energy of the violet laser is more concentrated on the surface of the film layer, which is beneficial to reducing the probability of larger laser damage of the first laser to the substrate 100.
The volume percentage concentration of the etching solution refers to the volume ratio of the solute to the solvent, the etching solution is taken as hydrofluoric acid as an example, the higher the volume percentage concentration of the hydrofluoric acid and the volume ratio of the aqueous solvent, the faster the etching rate is, and the greater the damage probability to the substrate 100 is, so that the volume percentage concentration of the etching solution is set to 8% -13%, and the reliability of the formed solar cell is considered while the processing rate of the first etching process is considered.
In some embodiments, the etching solution is an acidic solution, for example, a hydrofluoric acid solution, the water content in the etching solution may be 400l to 500l, and the hydrofluoric acid content may be 40l to 50l.
Referring to fig. 4, fig. 4 is a schematic structural view of forming a first doped conductive layer on the basis of fig. 3.
In some embodiments, the process of forming the first doped conductive layer 102 may include performing a diffusion process that dopes dopant ions into a portion of the thickness of the substrate 100 to convert a portion of the substrate 100 into the first doped conductive layer 102, it being understood that since the protective layer 101 is formed prior to forming the first doped conductive layer 102, only the substrate 100 exposed by the first recess 150 is subjected to a diffusion process to directly form the first doped conductive layer 102 located within the first recess 150.
Compared with the related scheme, the method for forming the first doped conductive layer 102 by directly performing the diffusion process reduces the steps of laser etching the first doped conductive layer 102, thereby reducing mechanical damage caused by the laser etching process, avoiding the substrate 100 from being damaged by the laser etching process, and improving the reliability of forming the solar cell.
In some embodiments, the process of forming the first doped conductive layer 102 may further include forming a first semiconductor layer covering the surface of the substrate 100 exposed by the protection layer 101 and the first recess 150, removing the first semiconductor layer located on the surface of the protection layer 101, and performing a diffusion process to convert the first semiconductor layer located in the first recess 150 into the first doped conductive layer 102. Similarly, the first semiconductor layer on the surface of the protection layer 101 is removed before the diffusion process, and the substrate 100 is prevented from being damaged due to the protection layer 101, and meanwhile, the protection layer 101 can prevent the doped ions from diffusing into the substrate 100 when the diffusion process is performed, so that the reliability of the formed solar cell is improved.
In some embodiments, forming the first doped conductive layer 102 may further include performing a third texturing process to form a third pyramid structure 170 within the first recess 150, the third pyramid structure 170 having a base size that is less than or equal to the base size of the first pyramid structure 160. The third pyramid structures 170 are formed in the first grooves 150 to further reduce the light reflectivity of the formed solar cell, thereby improving the absorption effect of the substrate 100 on the incident light.
In some embodiments, the third texturing process may be the same as the first texturing process such that the base size of the tower forming the third pyramid structure 170 is equal to the base size of the first pyramid structure 160, and providing the third texturing process the same as the first texturing process may reduce the process complexity of the solar cell. In some embodiments, the third texturing process may be different from the first texturing process, for example, the third additive may be more protective, so that the tower base size of the third pyramid structure 170 formed is smaller than the tower base size of the first pyramid structure 160, for the substrate 100 exposed by the first groove 150, the first doped conductive layer 102 and the first electrode 103 may be formed in the first groove 150, and light shielding may be caused to the substrate 100 corresponding to the first groove 150, so that the flatness of the surface of the substrate 100 in the first groove 150 may be improved by reducing the tower base size of the third pyramid structure 170, and the uniformity of the first doped conductive layer 102 formed by depositing the first semiconductor layer may be improved.
The third texturing process may be the same as the first texturing process and may mean that the process temperature is the same, the type and volume percentage concentration of the texturing solution are the same, and the type and volume percentage concentration of the first additive and the third additive are the same.
Referring to fig. 5, fig. 5 is a schematic structural diagram formed after the back polishing process based on fig. 4.
In some embodiments, the back polishing process removes the first pyramidal structures 160 formed on the second surface 120 by the first texturing process and removes the protective layer 101 on the back surface so as to form a structural layer on the second surface 120.
Referring to fig. 6 to 9, a tunneling layer 104 and a second doped conductive layer 105 are formed.
In some embodiments, forming the first doped conductive layer 102 further includes forming a tunneling layer 104, the tunneling layer 104 covering at least a portion of the second surface 120, and forming a second doped conductive layer 105, the second doped conductive layer 105 covering a surface of the tunneling layer 104. The tunneling layer 104 has a chemical passivation effect on the substrate 100, and reduces the density of defect states on the back surface of the substrate 100 by saturating dangling bonds on the back surface of the substrate 100, and reduces the recombination center on the surface of the substrate 100 to reduce the carrier recombination rate. The second doped conductive layer 105 also acts as a field passivation effect. Specifically, the second doped conductive layer 105 forms an electrostatic field that points to the inside of the substrate 100 on the back surface of the substrate 100, so that minority carriers escape from the interface, thereby reducing minority carrier concentration, reducing carrier recombination rate at the interface of the substrate 100, increasing open-circuit voltage, short-circuit current and filling factor of the solar cell, and improving photoelectric conversion efficiency of the solar cell.
The material of the tunneling layer 104 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, or magnesium fluoride. The material of the second doped conductive layer 105 may include at least one of amorphous silicon, polysilicon, or silicon carbide.
In some embodiments, the method of forming the second doped conductive layer 105 includes forming a second initially doped conductive layer 115, the second initially doped conductive layer 115 overlying the surface of the tunneling layer 104, removing the second initially doped conductive layer 115 located in the first region 130, and leaving the second initially doped conductive layer 115 as the second doped conductive layer 105. By forming the second initially doped conductive layer 115 first and then forming the second doped conductive layer 105 by removing a portion of the second initially doped conductive layer 115, the difficulty in forming the second doped conductive layer 105 can be reduced, and simultaneously the second initially doped conductive layer 115 in the first region 130 is removed while the second initially doped conductive layer 115 in the second region 140 is retained, so that the first doped conductive layer 102 in the first surface is opposite to the second doped conductive layer 105 in the second surface, and carriers in the substrate can be conveniently collected, thereby improving the carrier transmission efficiency.
Referring to fig. 6 and 7, fig. 6 is a schematic structural view of forming an initial tunneling layer and a second semiconductor layer on the basis of fig. 5, and fig. 7 is a schematic structural view of forming a second initially doped conductive layer on the basis of fig. 6.
In some embodiments, the initial tunneling layer 114 covers the entire second surface 120, and the second initially doped conductive layer 115 covers the surface of the initial tunneling layer 114.
In some embodiments, a method of forming the second initially doped conductive layer 115 may include forming the second semiconductor layer 125 and performing a doping process to convert the second semiconductor layer 125 into the second initially doped conductive layer 115.
It will be appreciated that during formation of the second initially doped conductive layer 115, a glass layer 106 is also formed, the glass layer 106 being located on a surface of the second initially doped conductive layer 115 remote from the substrate 100, the glass layer 106 being associated with a doping process, such as a doping process that dopes phosphorus into the second semiconductor layer 125, to form a phosphosilicate glass layer.
Referring to fig. 8, fig. 8 is a view of the removal of a portion of the second initially doped conductive layer 115 on the basis of fig. 7.
In some embodiments, the method of removing a portion of the second initially doped conductive layer 115 includes performing a second laser treatment that irradiates a surface of the second initially doped conductive layer 115 located in the first region 130, and performing a second etching treatment that etches the second initially doped conductive layer 115 located in the first region 130. It will be appreciated that the glass layer 106 may be formed during the formation of the second initially doped conductive layer 115, and that the glass layer 106 may affect the etching efficiency of the second etching process, and thus, the glass layer 106 may be modified by the second laser process to facilitate the removal of the glass layer 106 and the second initially doped conductive layer 115 by the second etching process.
Referring to fig. 9, fig. 9 is a schematic diagram of a structure formed by performing a second texturing process on the basis of fig. 8.
In some embodiments, forming the second doped conductive layer 105 further includes performing a second texturing process that forms a second pyramid structure 180 on the second surface 120, the tower base size of the first pyramid structure 160 being smaller than the tower base size of the second pyramid structure 180. By forming the second pyramid structures 180 on the second surface 120, where the size of the bases of the second pyramid structures 180 is larger than the size of the bases of the first pyramid structures 160, so as to form a differential texture of the first surface 110 and the second surface 120, and the second pyramid structures 180 with larger base sizes can increase the reflectivity of the second surface 120, when light is transmitted from the first surface 110 to the second surface 120 in the substrate 100, the second pyramid structures 180 can reflect light into the substrate 100 again, so that the double-sided rate of the formed solar cell can be increased, and the open-pressure of the formed solar cell can be increased.
In some embodiments, the process parameters of the second texturing process include a process temperature of 75-80 ℃, such as 75 ℃, 76 ℃, 77 ℃, 78 ℃, 79 ℃, or 80 ℃, a concentration of 0.4% -0.7%, such as 0.4%, 0.5%, 0.6%, or 0.7% by volume of the texturing solution, and a concentration of 0.2% -0.5%, such as 0.2%, 0.3%, 0.4%, or 0.5% by volume of the second additive, the protective power of the first additive being greater than the protective power of the second additive.
The process temperature provides an etching environment for the second texturing process to facilitate formation of the second pyramid structures 180, the texturing solution is used to etch portions of the substrate 100 to form the second pyramid structures 180, and the second additive is used to protect the substrate 100 from excessive damage to the substrate 100 by the second texturing process while controlling the surface of the substrate 100 to form the second pyramid structures 180.
For the second additive, since the protective capability of the second additive is smaller than that of the first additive, the etching effect of the second texturing process is faster when forming the second pyramid structure 180, so as to form the second pyramid structure 180 with a larger size of the tower base structure.
Referring to fig. 10, fig. 10 illustrates the formation of a first electrode and a second electrode on the basis of fig. 9.
The material of the first electrode 103 and the second electrode 107 may be a metal, for example, copper, silver, nickel, or aluminum.
In some embodiments, a passivation layer 108 is further formed before forming the first electrode 103 and the second electrode 107, the passivation layer 108 covers the first surface 110 and the surface of the first doped conductive layer 102, and the passivation layer 108 also covers the second surface 120 and the surface of the second doped conductive layer 105.
The material of the passivation layer 108 may be at least one of silicon oxide, aluminum oxide, silicon nitride, or silicon oxynitride.
In some embodiments, the passivation layer 108 may be a single layer structure. In some embodiments, the passivation layer 108 may also be a multi-layer structure in which the materials of the layers may be different from each other, or a portion of the number of layers may be different from each other, and the remaining portion of the number of materials may be the same. For example, the passivation layer 108 may be a multilayer structure of a silicon nitride layer and an aluminum oxide layer.
In some embodiments, removing the protective layer 101 on the first surface 110 may also be included before forming the passivation layer 108.
In some embodiments, the front projections of the first electrode 103 and the second electrode 107 on the substrate surface may be located in the second region 140, where the front projections of the first electrode 103 and the second electrode 107 on the substrate surface are located on the same region of the substrate as the front projections of the first electrode 103 and the second electrode 107 are opposite to each other, and the front projections of the first electrode and the second electrode on the substrate surface may be staggered, i.e., the front projections of the first electrode and the second electrode on the substrate surface are located on different regions of the substrate, e.g., the front projections of the first electrode on the substrate surface are located in the second region, and the front projections of the second electrode on the substrate surface are located in the first region.
In the embodiment of the disclosure, firstly, the protective layer 101 is formed on the first surface 110 of the substrate 100, the protective layer 101 protects the substrate 100 without etching in the process of forming the first groove 150, and then the first doped conductive layer 102 is formed in the first groove 150, by defining the position of the first doped conductive layer 102, the second processing of the first doped conductive layer 102 in the process of forming the first doped conductive layer 102 is avoided, meanwhile, the protective layer 101 also serves as a barrier layer in the process of forming the first doped conductive layer 102, the substrate 100 is prevented from being damaged in the process of forming the first doped conductive layer 102, the reliability of the first region 130 is prevented from being influenced, and thus the reliability of the solar cell is improved, and secondly, by forming the first groove 150, the glue situation in the process of forming the first electrode 103 is reduced, so that the glue loss is reduced, meanwhile, the first doped conductive layer 102 is formed in the first groove 150, so that the first electrode 103 can be more deeply contacted with the first doped conductive layer 102, the first electrode 103 can be prevented from being deeply contacted with the first doped conductive layer 102, and the bump 130 can be prevented from being unnecessarily contacted with the first electrode 100.
Another embodiment of the present disclosure provides a solar cell, which may be a solar cell formed by the method for manufacturing a solar cell as described above. The solar cell provided in the embodiments of the present disclosure will be described below with reference to the foregoing embodiments, and the same or corresponding parts as those in the foregoing embodiments will not be described in detail.
Referring to fig. 10, in some embodiments, a solar cell may include a substrate 100, the substrate 100 including opposing first and second surfaces 110 and 120, the first surface 110 including first and second regions 130 and 140 alternately arranged, and a first recess 150 in the substrate 100.
The solar cell may further include a first doped conductive layer 102, the first doped conductive layer 102 being located within the first recess 150.
The solar cell may further comprise a first electrode 103, the first electrode 103 being in contact electrical connection with the first doped conductive layer 102.
In some embodiments, the substrate 100 further includes a first pyramid structure 160, the first pyramid structure 160 being located on the first surface 110, a second pyramid structure 180, the second pyramid structure 180 being located on the second surface 120, and a base size of the first pyramid structure 160 being smaller than a base size of the second pyramid structure 180. By providing the second pyramid structure 180 with a base size greater than that of the first pyramid structure 160, a differential texture of the first surface 110 and the second surface 120 is formed, and the second pyramid structure 180 with a larger base size can increase the reflectivity of the second surface 120, and when light is transmitted from the first surface 110 to the second surface 120 in the substrate 100, the second pyramid structure 180 can reflect light into the substrate 100 again, thereby increasing the double-sided rate of the formed solar cell and further increasing the open-pressure of the formed solar cell.
The larger tower base size may mean that the average tower base size of the first pyramid structure in a certain area is larger than the average tower base size of the second pyramid structure in the same area, or may mean that the tower base size of any first pyramid structure in a certain area is larger than the tower base size of the second pyramid structure, and the tower base size may mean the side length of the tower bottom of the first pyramid structure, or the diagonal length.
In some embodiments, the substrate 100 further includes a third pyramid structure 170, the third pyramid structure 170 being positioned within the first recess 150, the third pyramid structure 170 having a base size that is less than or equal to the base size of the first pyramid structure 160. For the substrate 100 exposed by the first recess 150, the first doped conductive layer 102 and the first electrode 103 may shade light of the substrate 100 corresponding to the first recess 150, so that the evenness of the first doped conductive layer 102 may be improved by reducing the tower base size of the third pyramid structure 170 to improve the evenness of the surface of the substrate 100 in the first recess 150.
In some embodiments, the tower base size of the first pyramid structure 160 may be 1 μm to 3 μm, for example 1 μm, 2 μm, or 3 μm. The tower base size of the second pyramid structure 180 may be 5 μm to 10 μm, for example 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm.
Still another embodiment of the present disclosure provides a laminated cell, where the bottom cell may be a solar cell as in the above embodiment, or a solar cell formed by a method for manufacturing the solar cell. The stacked battery provided in the embodiments of the present disclosure will be described below with reference to the above embodiments, and the same or corresponding parts as those in the above embodiments will not be described in detail.
Referring to fig. 11, fig. 11 is a schematic structural view of a laminated battery according to an embodiment of the present disclosure.
The laminated cell may include a bottom cell 400, a composite layer 401, and a perovskite top cell 402 stacked in sequence along a preset direction, wherein the bottom cell 400 is a solar cell formed by the method for manufacturing a solar cell as described above, or a solar cell as described above.
The back electrode 404 in the bottom cell 400 may refer to the second electrode 107 in the above-described embodiment.
The material of the composite layer 401 includes a Transparent Conductive Oxide (TCO) for providing lateral conductivity and transmitting light. For example, the material may be Indium Tin Oxide (ITO), hydrogenated indium oxide (IO: H), zinc oxide (ZnO), or the like.
Perovskite top cell 402 may include hole transport layer 412, perovskite absorbing layer 422, electron transport layer 432, and electrode 442.
The photovoltaic module further comprises a battery string, wherein the battery string comprises a plurality of solar cells formed by the manufacturing method of the solar cells, or comprises a plurality of solar cells or a plurality of laminated batteries, a welding strip, a packaging adhesive film and a cover plate, the welding strip is electrically connected with at least two solar cells or the laminated batteries to be connected with adjacent solar cells or the laminated batteries in series, the packaging adhesive film is used for covering the surface of the battery string, and the cover plate is used for covering the surface of the packaging adhesive film far away from the battery string.
In some embodiments, the encapsulation film includes a first encapsulation layer covering one of the front or back side of the solar cell and a second encapsulation layer covering the other of the front or back side of the solar cell. Specifically, at least one of the first packaging layer or the second packaging layer may be an organic packaging film such as a polyvinyl butyral (Polyvinyl Butyral, abbreviated as PVB) film, an ethylene-vinyl acetate copolymer (EVA) film, a polyethylene octene co-elastomer (POE) film, or a polyethylene terephthalate (PET) film, or at least one of the first packaging layer or the second packaging layer may also be an EP film, an EPE film, or a PVP film. Wherein, the EP glued membrane refers to the co-extrusion glued membrane that comprises range upon range of EVA glued membrane that sets up and POE glued membrane, and the EPE glued membrane refers to the co-extrusion glued membrane that utilizes the EVA glued membrane that stacks gradually to set up + POE glued membrane + EVA glued membrane to form, and the PVP glued membrane refers to the co-extrusion glued membrane that is formed by range upon range of POE glued membrane + EVA glued membrane + POE glued membrane that sets up. The co-extrusion adhesive film can be prepared by sequentially extruding one or more raw materials onto another adhesive film or bonding different adhesive films together.
In some cases, the first and second encapsulant layers also have demarcations before lamination, and the formation of the photovoltaic module after lamination process does not have the concept of the first and second encapsulant layers anymore, i.e. the first and second encapsulant layers already form an integral encapsulant film.
In some embodiments, the cover plate may be a glass cover plate, a plastic cover plate, or the like having a light transmitting function. Specifically, the surface of the cover plate facing the packaging adhesive film may be a concave-convex surface or a suede surface containing a plurality of convex structures, so as to increase the utilization rate of incident light. The cover plate comprises a first cover plate and a second cover plate, wherein the first cover plate is opposite to the first packaging layer, and the second cover plate is opposite to the second packaging layer.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of implementing the disclosure, and that various changes in form and details may be made therein without departing from the spirit and scope of the embodiments of the disclosure. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the embodiments of the disclosure, and the scope of the embodiments of the disclosure should be assessed accordingly to that of the appended claims.
Claims (15)
1. The manufacturing method of the solar cell is characterized by comprising the following steps:
providing a substrate, wherein the substrate comprises a first surface and a second surface which are opposite, and the first surface comprises a first area and a second area which are alternately arranged;
forming a protective layer, wherein the protective layer is positioned on the first surface;
Etching the protective layer and the substrate in the second region to form a first groove;
forming a first doped conductive layer, wherein the first doped conductive layer is positioned in the first groove;
a first electrode is formed, the first electrode being electrically connected to the first doped conductive layer.
2. The method for manufacturing the solar cell according to claim 1, wherein the method for forming the protective layer comprises the steps of performing oxidation treatment, wherein the technological parameters of the oxidation treatment comprise a technological time of 3000-4500 s, a technological temperature of 850-1000 ℃, and a gas flow rate of oxygen of 2000-20000 sccm.
3. The method of claim 1, wherein the method of forming the first recess comprises:
performing a first laser treatment irradiating the protective layer located in the second region;
and performing a first etching process, wherein the first etching process etches the protective layer and the substrate which are positioned in the second region.
4. The method for manufacturing the solar cell according to claim 3, wherein the parameters of the first laser treatment comprise 30-40 w of power, green-skin laser or purple-skin laser, and the parameters of the first etching treatment comprise 8-13% of etching solution by volume percentage.
5. The method of manufacturing a solar cell according to claim 1, further comprising, after forming the first doped conductive layer:
Forming a tunneling layer, wherein the tunneling layer at least covers part of the second surface;
And forming a second doped conductive layer, wherein the second doped conductive layer covers the surface of the tunneling layer.
6. The method of manufacturing a solar cell according to claim 5, further comprising performing a first texturing process to form a first pyramid structure on the first surface before forming the protective layer;
And forming the second doped conductive layer, wherein the second texturing treatment is performed, a second pyramid structure is formed on the second surface by the second texturing treatment, and the tower base size of the first pyramid structure is smaller than that of the second pyramid structure.
7. The method of manufacturing a solar cell according to claim 6, wherein,
The technological parameters of the first texturing treatment comprise that the technological temperature is 70-75 ℃, the volume percentage concentration of the texturing solution is 0.4-0.7%, and the volume percentage concentration of the first additive is 0.2-0.5%;
The technological parameters of the second texturing treatment comprise that the technological temperature is 75-80 ℃, the volume percentage concentration of the texturing solution is 0.4-0.7%, the volume percentage concentration of the second additive is 0.2-0.5%, and the protection capability of the first additive is larger than that of the second additive.
8. The method of claim 6, further comprising performing a third texturing process, wherein the third texturing process forms a third pyramid structure within the first recess, wherein a base size of the third pyramid structure is less than or equal to a base size of the first pyramid structure.
9. The method of claim 5, wherein the forming the second doped conductive layer comprises:
forming a second initially doped conductive layer, wherein the second initially doped conductive layer covers the surface of the tunneling layer;
And removing the second initially doped conductive layer positioned in the first region, and taking the remaining second initially doped conductive layer as the second doped conductive layer.
10. The method of claim 9, wherein removing a portion of the second initially doped conductive layer comprises:
Performing a second laser treatment, the second laser treatment irradiating a surface of the second initially doped conductive layer located in the first region;
and performing a second etching process, wherein the second etching process etches the second initially doped conductive layer positioned in the first region.
11. A solar cell formed by the method of manufacturing a solar cell according to any one of claims 1 to 10, comprising:
The substrate comprises a first surface and a second surface which are opposite to each other, wherein the first surface comprises a first area and a second area which are alternately arranged, and the substrate also comprises a first groove;
the first doped conductive layer is positioned in the first groove;
And the first electrode is in contact electrical connection with the first doped conductive layer.
12. The solar cell of claim 11, wherein the substrate further comprises:
A first pyramid structure located on the first surface;
The second pyramid structure is positioned on the second surface, and the tower base size of the first pyramid structure is smaller than that of the second pyramid structure.
13. The solar cell according to claim 12, wherein the substrate further comprises a third pyramid structure positioned within the first recess, the third pyramid structure having a base size that is less than or equal to the base size of the first pyramid structure.
14. A laminated battery, characterized by comprising:
A bottom cell, a composite layer and a perovskite top cell which are stacked in sequence along a preset direction;
wherein the bottom cell is a solar cell sheet formed by the method for manufacturing a solar cell sheet according to any one of claims 1 to 10, or a solar cell sheet according to any one of claims 11 to 13.
15. A photovoltaic module, comprising:
A battery string comprising a plurality of solar cells formed by the method of manufacturing a solar cell according to any one of claims 1 to 10, or a plurality of solar cells according to any one of claims 11 to 13, or a plurality of stacked batteries according to claim 14;
The packaging adhesive film is used for covering the surface of the battery string;
and the cover plate is used for covering the surface, far away from the battery strings, of the packaging adhesive film.
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