CN120301426A - Signal folding circuits and electronic devices - Google Patents
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Abstract
本申请提供一种信号折叠电路和电子设备，涉及电路技术领域该信号折叠电路用于接收输入信号并输出输出信号，输入信号和输出信号为模拟信号。信号折叠电路包括动态门限选择电路和运算电路，动态门限选择电路，用于根据第一控制信号输出第一参考电压和第二参考电压，第一参考电压大于第二参考电压；运算电路，运算电路用于根据输入信号、第一参考电压和第二参考电压输出输出信号，输出信号等于输入信号减去或加上第一参考电压与第二参考电压之差的整数倍，且输出信号的电压值小于或等于第一参考电压，输出信号的电压值大于或等于第二参考电压；其中，第一控制信号由运算电路根据输出信号输出。该信号折叠电路用以解决输入信号动态范围大的问题。
The present application provides a signal folding circuit and an electronic device, which relates to the field of circuit technology. The signal folding circuit is used to receive an input signal and output an output signal, and the input signal and the output signal are analog signals. The signal folding circuit includes a dynamic threshold selection circuit and an operation circuit, the dynamic threshold selection circuit is used to output a first reference voltage and a second reference voltage according to a first control signal, and the first reference voltage is greater than the second reference voltage; the operation circuit, the operation circuit is used to output an output signal according to the input signal, the first reference voltage and the second reference voltage, the output signal is equal to the input signal minus or plus an integer multiple of the difference between the first reference voltage and the second reference voltage, and the voltage value of the output signal is less than or equal to the first reference voltage, and the voltage value of the output signal is greater than or equal to the second reference voltage; wherein the first control signal is output by the operation circuit according to the output signal. The signal folding circuit is used to solve the problem of a large dynamic range of the input signal.
Description
Technical Field
The present application relates to the field of circuit technologies, and in particular, to a signal folding circuit and an electronic device.
Background
A digital-to-digital converter (ADC) couples the actual analog signal to the digital processor so that the signal can be processed efficiently by the digital processor. The key parameters of such conversion are the sampling rate and the dynamic range for which it is theoretically necessary to ensure that the input signal dynamic range is smaller than the digital-to-analog converter dynamic range in order to ensure signal quality.
However, in some practical application scenarios, a single signal often has a large dynamic range, which exceeds the sampling dynamic range of the digital-to-analog converter. For example, referring to fig. 1, the input signal exceeds the dynamic range of the digital-to-analog converter, and the digital-to-analog converter can only sample and acquire the sampled signal within the dynamic range, so that the output signal acquired according to the sampled signal is truncated, and the signal is distorted, and the vector magnitude error (error vector magnitude, EVM) is reduced. In other application scenarios, two signals are received simultaneously, the large signal is dynamic and the small signal is dynamic and the dynamic superposition of the large and small signals exceeds the dynamic range of the receiver, which also causes signal distortion.
Therefore, the dynamic limitation of the size signal is a problem to be solved.
Disclosure of Invention
The embodiment of the application provides a signal folding circuit and electronic equipment, which are used for solving the problem of high power consumption when processing a large dynamic range.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
In a first aspect, embodiments of the present application provide a signal folding circuit for receiving an input signal and outputting an output signal, where the input signal and the output signal are analog signals. The signal folding circuit comprises a dynamic threshold selection circuit and an operation circuit, wherein the dynamic threshold selection circuit is used for outputting a first reference voltage and a second reference voltage according to a first control signal, the first reference voltage is larger than the second reference voltage, the operation circuit is used for outputting an output signal according to an input signal, the first reference voltage and the second reference voltage, the output signal is equal to the integral multiple of the difference between the first reference voltage and the second reference voltage subtracted or added by the input signal, the voltage value of the output signal is smaller than or equal to the first reference voltage, and the voltage value of the output signal is larger than or equal to the second reference voltage, wherein the first control signal is output by the operation circuit according to the output signal.
Therefore, the first control signal can dynamically control and output the first reference voltage and the second reference voltage, so that the dynamic range of the signal folding circuit is reduced, and the power consumption of the signal folding circuit and a system in which the signal folding circuit is positioned is reduced.
In a possible implementation manner of the first aspect, in a case where the output signal is equal to the input signal in the first unit time period, the first control signal output by the operation circuit decreases a difference between the first reference voltage and the second reference voltage output by the dynamic threshold selection circuit.
In a possible implementation manner of the first aspect, the output first control signal increases a difference between the first reference voltage and the second reference voltage output by the dynamic threshold selection circuit, in a case that the output signal is equal to 1 time or more of the input signal minus or plus the difference between the first reference voltage and the second reference voltage.
In one possible implementation manner of the first aspect, the operation circuit comprises a comparator module for comparing an input signal with a first reference voltage and outputting a first comparison result, comparing the input signal with a second reference voltage and outputting a second comparison result, a feedback voltage generating circuit for outputting a voltage signal according to the first comparison result and/or the second comparison result, wherein an absolute value of the voltage signal is an integer multiple of a difference between the first reference voltage and the second reference voltage, and an adder circuit for outputting an output signal according to the voltage signal and the input signal.
In a possible implementation manner of the first aspect, the operation circuit further includes a detection circuit configured to detect a maximum absolute value within a second unit time period of the input signal, a calculation circuit configured to output a second control signal according to the maximum absolute value, and the feedback voltage generation circuit further outputs a voltage signal according to the second control signal, where the second control signal is configured to indicate a value of an integer multiple of a difference between the first reference voltage and the second reference voltage. Thus, the second control signal can select the value of the integral multiple of the difference between the first reference voltage and the second reference voltage, so that the time delay of processing the input signal is reduced.
In a possible implementation manner of the first aspect, the absolute value of the voltage signal is 1,2, 4 or 8 times the difference between the first reference voltage and the second reference voltage.
In a possible implementation manner of the first aspect, the feedback voltage generating circuit comprises a wavelength division multiplexer for outputting an initial voltage signal according to the first reference voltage and/or the second reference voltage and the first comparison result and/or the second comparison result, a resistor divider network circuit for outputting a multiple indication signal according to the second control signal, the multiple indication signal being used for indicating the multiple, and a multiplier for outputting the voltage signal according to the initial voltage signal and the output multiple indication signal, wherein the voltage signal is equal to the product of the initial voltage signal and the multiple indicated by the multiple indication signal.
In one possible implementation manner of the first aspect, the first control signal includes a first sub-control signal and a second sub-control signal, and the dynamic threshold selection circuit includes a plurality of voltage drop regulators for generating different first reference voltages, a first wavelength division multiplexer module group for selecting one output from the first reference voltages according to the first sub-control signal, a plurality of synchronous inverse buck converters for generating different second reference voltages, and a second wavelength division multiplexer module group for selecting one output from the second reference voltages according to the second sub-control signal.
In one possible implementation manner of the first aspect, the absolute values of the first reference voltage and the second reference voltage can be unequal.
In a second aspect, the present application provides an electronic device comprising an antenna and the signal folding circuit of any one of the first aspects, the signal folding circuit being connected to the antenna.
Drawings
FIG. 1 is a schematic diagram of a prior art processing circuit with an input signal exceeding a dynamic range;
FIG. 2 is a schematic diagram of an embodiment of the present application after processing an input signal exceeding a dynamic range;
Fig. 3 is a schematic diagram of a signal folding circuit according to an embodiment of the present application;
FIG. 4 is a schematic diagram of another signal folding circuit according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a signal folding circuit according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a feedback voltage generating circuit according to an embodiment of the present application;
Fig. 7 is a schematic diagram of a dynamic threshold selection circuit according to an embodiment of the present application.
Detailed Description
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art. The terms "first," "second," "third," and the like in the description and in the claims, are not used for any order, quantity, or importance, but are used for distinguishing between different elements. Thus, a feature defining "a first", "a second", or a third "may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.
Aiming at the problem of dynamic limitation of a size signal, the solving ideas in the industry comprise:
1. Research on devices with larger dynamics, however, theoretical boundaries exist on device performance, and ADC indexes exceeding-155 dBm/Hz under broadband have extremely strong challenges, so that the implementation difficulty is high.
2. Automatic Gain Control (AGC) techniques are used prior to the ADC to ensure that the echo signal is within the dynamic range of the ADC device by loop detection amplification or attenuation.
For example, the gain-stabilized output signal may be obtained by decreasing the control voltage as the gain of the input signal increases, and correspondingly decreasing the output gain of the variable gain control region as the control voltage decreases. The automatic gain control circuit can realize automatic gain control when the gain of the input signal is changed within a certain range under the condition of unchanged signal-to-noise ratio (SNR), and obtain an output signal with stable gain.
For example, the automatic gain control compensation module can realize the synchronization of the input AGC factor and the I/Q data in a software and hardware interaction mode, can quickly track and detect the compensated saturated signal, quickly attenuate the signal exceeding the threshold and generate a corresponding DVGA factor according to the attenuation, and realize the synchronous output of the compensated I/Q data and the DVGA factor from the decision feedback equalizer (decision feedback equalization, DFE) to the baseband on the basis of not increasing storage resources.
However, in automatic gain control, when the signal changes greatly, the automatic power generation control (automatic generation control, AGC) system responds and adjusts the gain quickly, but such quick adjustment sometimes causes distortion of the signal. In a rapidly changing signal environment, the AGC system requires a certain amount of time to detect and adjust the gain, and if the change is too rapid, the system may not keep up in time, resulting in an unstable output signal or delay. AGC attenuation can cause noise floor rise, which in turn affects small signal detection, and can introduce additional feedback loop hardware and control overhead.
In addition, with the gradual advancement of the sense of general integration technology, the problem of the size signal is more and more prominent.
Therefore, the embodiment of the application provides a signal folding circuit which can fold the part of the input signal exceeding the dynamic range of the ADC into the dynamic range, perform lossless processing on the signal and then recover the signal in the subsequent processing process. Referring to fig. 1, when the input signal exceeds the dynamic range [ - λ, λ ], the sampled signal of the portion of the signal exceeding the dynamic range is the maximum value of the corresponding dynamic range, and the output signal obtained according to the sampled signal is truncated, so that the signal is distorted and the vector magnitude error is reduced. Referring to fig. 2, fig. 2 is a schematic diagram of folding a portion of an input signal exceeding the dynamic range [ - λ, λ ] of an ADC into the dynamic range. Thus, it can be seen that the folded output signal is located in the dynamic range, and the original input signal can be recovered by subsequent algorithm processing.
Referring to fig. 3, fig. 3 is a signal folding circuit 10 according to an embodiment of the application. It will be appreciated that the signal folding circuit 10 is configured to receive an input signal and output an output signal, the input signal and the output signal being analog signals.
The signal folding circuit 10 includes an arithmetic circuit 11 and a dynamic threshold selection circuit 12. The dynamic threshold selection circuit 12 is configured to dynamically select a first reference voltage and a second reference voltage, where the first reference voltage and the second reference voltage are two thresholds of a dynamic range to which an input signal needs to be folded. The first reference voltage is greater than the second reference voltage, and the dynamic range is from the second reference voltage to the first reference voltage.
The first reference voltage and the second reference voltage are both dynamically adjustable. For example, at a first point in time and a second point in time, the first reference voltage may be different and the second reference voltage may be different. It can be appreciated that when the signal is processed, the larger the dynamic range is, the higher the power consumption of the ADC circuit is, and if the dynamic range is dynamically adjusted in the process of processing the signal, the most suitable dynamic range for processing the signal can be selected, so that the use of an excessive dynamic range is avoided, and the power consumption of the circuit is reduced.
In some embodiments, the dynamic threshold selection circuit may be output according to a first control signal. The first control signal may be obtained according to the output signal of the signal folding circuit 10. It will be appreciated that in the case of an output signal that is not subject to partial signal folding, the partial signal is within the current dynamic range, e.g. the input signal within the t1 unit time period in fig. 1, and in the case of an output signal that is subject to folding, the partial signal is outside the current dynamic range, e.g. the input signal within the t2 unit time period in fig. 1.
The arithmetic circuit 11 is implemented to fold the portion of the input signal exceeding the dynamic range into the dynamic range. The operation circuit 11 is configured to output an output signal according to the input signal, the first reference voltage, and the second reference voltage, so that the output signal is located between the first reference voltage and the second reference voltage, that is, the voltage value of the output signal is less than or equal to the first reference voltage, and the voltage value of the output signal is greater than or equal to the second reference voltage. It will be appreciated that the output signal is equal to an integer multiple of the difference between the first reference voltage and the second reference voltage subtracted or added to the input signal, that is, when the input signal is greater than the first reference voltage, the difference between the first reference voltage and the second reference voltage can be subtracted from the input signal to enable the output signal to be located between the first reference voltage and the second reference voltage, and when the input signal is less than the second reference voltage, the difference between the first reference voltage and the second reference voltage can be added to enable the output signal to be located between the first reference voltage and the second reference voltage.
Here, the integer multiple of the difference between the first reference voltage and the second reference voltage may be 0-fold, 1-fold, 2-fold, 3-fold, or other integer multiples.
Meanwhile, the operation circuit outputs a first control signal according to the output signal, that is, the first control signal is output by the operation circuit according to the output signal. Thus, the first reference voltage and the second reference voltage are output according to the first control signal, and can also be considered as the first reference voltage and the second reference voltage are output according to the output signal. Therefore, the application controls the first reference voltage and the second reference voltage output by the dynamic threshold selection circuit by feeding back the output signal to the operation circuit in real time, thereby realizing the selection of the proper first reference voltage and the second reference voltage to update the dynamic threshold of the output signal, i.e. limiting the output signal between the first reference voltage and the second reference voltage. Therefore, the dynamic range of the circuit processing output signal can be reduced on the premise of not losing the signal precision, and the circuit power consumption is reduced. In addition, in the sense-through integrated system, after the sensing signal with a large dynamic range is canceled through simulation, the dynamic threshold can be changed in real time through the signal folding circuit, so that the communication signal is always in the dynamic range which can be processed by the signal folding circuit, the communication signal can be prevented from being recovered, and the precision of the communication signal is not lost.
In an exemplary embodiment, in a case where the output signal is equal to the input signal in the first unit period, the output first control signal decreases a difference between the first reference voltage and the second reference voltage output by the dynamic threshold selection circuit. It will be appreciated that the signal folding circuit 10 performs processing on the input signal in accordance with the feedback signal (i.e., the output signal), where the first unit time period refers to the first unit time period before the current time. The output signal being equal to the input signal means that the input signal is not subjected to addition or subtraction operation, so that the operation circuit can easily obtain whether the output signal is equal to the input signal. Reducing the difference between the first reference voltage and the second reference voltage may be achieved by simultaneously changing the first reference voltage and/or the second reference voltage. For example, the first reference voltage may be decreased and the second reference voltage may be increased. When the difference between the first reference voltage and the second reference voltage is reduced, the intermediate value of the first reference voltage and the second reference voltage may be kept constant, although the intermediate value may be changed.
The magnitude of the difference between the first reference voltage and the second reference voltage may be reduced to be constant, or may be a certain proportion of the difference between the first reference voltage and the second reference voltage or a certain proportion of the maximum value of the difference between the first reference voltage and the second reference voltage, which may take on values, for example, the foregoing proportion is 1/10, 1/5, or the like.
Illustratively, the output first control signal increases the difference between the first reference voltage and the second reference voltage output by the dynamic threshold selection circuit in the case where the output signal is equal to 1 times or more the difference between the input signal minus or plus the first reference voltage and the second reference voltage. It will be appreciated that in the case where the output signal is equal to 1 or more times the difference between the first reference voltage and the second reference voltage subtracted or added to the input signal, the input signal exceeds the current dynamic range, and the difference between the first reference voltage and the second reference voltage may be increased in order to reduce the variation of the multiple input signal. It will be appreciated that it is not possible to infinitely increase the difference between the first reference voltage and the second reference voltage, the first reference voltage having a maximum value and the second reference voltage having a minimum value, the maximum and minimum values determining a dynamic range that is the maximum dynamic range of the system in which the signal folding circuit is located.
The magnitude of each increase may be a certain proportion of the difference between the first reference voltage and the second reference voltage or a certain proportion of the maximum value of the difference between the first reference voltage and the second reference voltage, for example, the aforesaid proportion is 1/10, 1/5, etc.
In some embodiments, referring to fig. 4, the operation circuit 11 may include a comparator module 111, a feedback voltage generating circuit 112, and an adder circuit 113. The comparator module 111 is configured to compare the intermediate input signal with a first reference voltage and output a first comparison result, and compare the intermediate input signal with a second reference voltage and output a second comparison result. The feedback voltage generating circuit 112 outputs a voltage signal according to the first comparison result and/or the second comparison result, wherein the absolute value of the voltage signal is an integer multiple of the difference between the first reference voltage and the second reference voltage. The adder circuit 113 outputs an output signal based on the voltage signal and the input signal.
It will be appreciated that when the input signal is greater than the first reference voltage, the first comparison result may be 1, and the input signal is also greater than the second reference voltage. At this time, the feedback voltage generating circuit 112 outputs a negative voltage signal according to the first comparison result and/or the second comparison result, and the adder circuit 113 is configured to add the voltage signal and the input signal and output an output signal. The absolute value of the voltage signal may be 1 time the difference between the first reference voltage and the second reference voltage. When the input signal is smaller than the second reference voltage, the second comparison result may be 1, and the voltage signal is positive, which is not described herein.
Meanwhile, the first comparison result and/or the second comparison result may be used as the first control signal. Since the first comparison result and the second comparison result are associated with the output signal, the first control signal may also be considered to be derived from the output signal. For example, in the first unit time period, it may be determined whether the input signal is between the first reference voltage and the second reference voltage according to the first comparison result and the second comparison result, and if so, the difference between the first reference voltage and the second reference voltage may be reduced. For another example, in the first unit time period, while the input signal is smaller than the first reference voltage, in one unit time period in the first unit time period, the input signal is smaller than the second reference voltage, the first reference voltage and the second reference voltage may be reduced according to the first comparison result and the second comparison result, and the reduced amplitude may be determined according to the first reference voltage and the second reference voltage, respectively.
The comparator module may comprise a plurality of comparators. For example, the comparator module includes two comparators, one of which is for comparison with a first reference voltage and the other of which is for comparison with a second reference voltage.
In some embodiments, the arithmetic circuit 11 further includes a detection circuit 114 and a calculation circuit 115. The calculation circuit 115 may be a micro control unit module, for example, a single chip microcomputer with stm32h723 chip. The computing circuit 115 may be other circuits having a logic operation function.
The detection circuit 114 is configured to detect a maximum absolute value of the input signal within a second unit time period, and the calculation circuit 115 is configured to output a second control signal according to the maximum absolute value, wherein the feedback voltage generation circuit 112 is further configured to output a voltage signal according to the second control signal, and the second control signal is configured to indicate a value of an integer multiple of a difference between the first reference voltage and the second reference voltage.
The detection circuit 114 is configured to detect the maximum absolute value of the input signal in the second unit time period, that is, the time in which the signal folding circuit 11 operates is divided into a plurality of consecutive second unit time periods, and the detection circuit 114 detects the maximum absolute value of the input signal in each second unit time period. From this maximum absolute value it can be determined to what extent the input signal exceeds the dynamic range. If the exceeding degree is large, when the integral multiple of the difference between the first reference voltage and the second reference voltage is added or subtracted to the input signal, the input signal can be quickly folded into the dynamic range determined by the first reference voltage and the second reference voltage.
It will be appreciated that when the input signal is not within the dynamic range, the input signal may be folded between the first reference voltage and the second reference voltage by adding or subtracting an integer multiple of the difference between the first reference voltage and the second reference voltage. With continued reference to fig. 4, if the input signal exceeds the dynamic range by a large amount and only one time the difference between the first reference voltage and the second reference voltage can be added or subtracted, the difference between the first reference voltage and the second reference voltage needs to be added or subtracted multiple times, thereby increasing the processing delay. In the signal folding circuit shown in fig. 5, the detection circuit 114 is used to detect the maximum absolute value of the input signal in the second unit time period, and the integer of the difference between the first reference voltage and the second reference voltage can be added or subtracted accordingly, so that the input signal can be folded into the dynamic range more quickly. For example, when the maximum absolute value exceeds a range much, the voltage signal of the feedback voltage generating circuit may be appropriately increased. For example, when the maximum absolute value exceeds the first reference voltage by 8 times, the difference between the first reference voltage and the second reference voltage may be 4 times or 2 times the difference between the first reference voltage and the second reference voltage. It will be appreciated that there is no jump in the signal and there is a varying process, so that the degree to which the input signal is beyond the dynamic range is also gradually varied as the input signal is gradually varied from the aforementioned maximum absolute value. When the maximum absolute value exceeds the first reference voltage by 8 times, the difference between the first reference voltage and the second reference voltage is not changed drastically in the next second unit time period, and still exceeds the first reference voltage by more.
It can be seen that the voltage signal output by the feedback voltage generating circuit 112 can be determined by the calculating circuit 115 according to how much the aforementioned maximum absolute value exceeds the difference between the first reference voltage and the second reference voltage. For example, the absolute value of the voltage signal may be 1, 2, 4, or 8 times the difference between the first reference voltage and the second reference voltage. The calculation circuit 115 may output a second control signal for indicating the voltage signal output by the feedback voltage generation circuit 112.
For example, referring to fig. 6, the feedback voltage generating circuit 112 may include a wavelength division multiplexer, a resistive divider network circuit, and a multiplier.
The wavelength division multiplexer is used for outputting an initial voltage signal according to the first reference voltage and/or the second reference voltage and the first comparison result and/or the second comparison result. For example, if the first comparison result reflects that the input signal is larger than the first reference voltage value, the difference between the first reference voltage and the second reference voltage needs to be subtracted to enable the input signal to be folded into the dynamic range, and then the negative difference between the first reference voltage and the second reference voltage is output, otherwise, if the second comparison result reflects that the input signal is smaller than the second reference voltage value, the positive difference between the first reference voltage and the second reference voltage is output.
The resistor divider network circuit is used for outputting multiple indication signals according to the second control signals, and the multiple indication signals are used for indicating multiple. The multiple may be1, 2,3, 4, 8, etc. For example, the resistor divider network circuit includes a plurality of resistors connected in series and parallel, different voltages can be output between different resistors, and the magnitude of the voltage can indicate a multiple.
The multiplier is used for outputting a voltage signal according to the initial voltage signal and the output multiple indication signal, wherein the voltage signal is equal to the product of the initial voltage signal and the multiple indicated by the multiple indication signal.
The first control signal may also be output by the computing circuit 115, for example. In this way, the computing circuit 115 may output the first control signal according to the dynamic range of the input signal. For example, the calculation circuit 115 may execute complex algorithms that increase the accuracy of the determined first and second reference voltages by estimating the possible dynamic range of the input signal in consideration of various non-ideal factors.
The first control signal may include a first control sub-signal and a second control sub-signal, from which the dynamic threshold selection circuit 12 may determine the first reference voltage and the second reference voltage, respectively, whereby the absolute values of the first reference voltage and the second reference voltage may not be equal.
For example, referring to fig. 7, the dynamic threshold selection circuit 12 may include a plurality of differential voltage regulators, a first wavelength division multiplexer module group, a plurality of synchronous buck converters, and a second wavelength division multiplexer module group. The first wavelength division multiplexer module group can select one output from the first reference voltages according to the first sub-control signals. The second wavelength division multiplexer module group can select one output from the plurality of second reference voltages according to the second sub-control signals.
Next, a processing procedure of the input signal will be described by taking the signal folding circuit shown in fig. 5 as an example, wherein the calculation circuit 115 is a micro control unit module.
The input signal amplitude range is [ -9λ,9λ ], the signal amplitude is compressed at [ - λ, λ ], the initial first reference voltage is set as λ, the second reference voltage is set as- λ, the difference between the first reference voltage and the second reference voltage is 2λ, and the voltage signal output by the feedback voltage generating circuit may include 0, ±2λ, ±4λ, ±6λ, ±8λ.
It will be appreciated that during processing, the calculation circuit 115 may output a first control signal that controls the dynamic threshold selection circuit 12 to change the output first reference voltage and second reference voltage.
When the input signal is 9λ, the comparator module 111 outputs a first comparison result, which indicates that the input signal exceeds the first reference voltage.
In some embodiments, the computing circuit 115 outputs a second control signal based on the first comparison result, the second control signal indicating that the input signal needs to be reduced. The feedback voltage generating circuit 112 may output a voltage signal of-2λ according to the second control signal. The adder circuit 113 adds the voltage signal to the input signal so that the input signal becomes 7λ. Thereafter, the comparator module 111 continues to cyclically compare the changed input signal until the changed input signal is within the dynamic range [ - λ, λ ], and finally outputs the changed input signal within the dynamic range [ - λ, λ ] as an output signal.
In some embodiments, the maximum absolute value of the input signal in the second unit time period before the current time is detected by the detection circuit 114 is 9λ, so the calculation circuit 115 outputs a second control signal according to the first comparison result and the maximum absolute value detected by the detection circuit, the second control signal indicates that the input signal needs to be reduced, and the reduced amplitude is 4λ, where 4λ is obtained by calculation by the calculation circuit 115 according to the maximum absolute value detected by the detection circuit. The feedback voltage generating circuit 112 may output a voltage signal of-4λ according to the second control signal. The adder circuit 113 adds the voltage signal to the input signal so that the input signal becomes 5λ. The comparator module 111 continues to compare the altered input signal in a loop until the altered input signal is within the dynamic range [ - λ, λ ], and finally outputs the altered input signal within the dynamic range [ - λ, λ ] as an output signal. It will be appreciated that during the continued cycle of the comparison, the calculation circuit 115 will change the second control signal, thereby changing the voltage signal output by the feedback voltage generation circuit 112.
Meanwhile, after the cycle comparison is finished, that is, after the current input signal is folded to the dynamic range [ - λ, λ ], the calculation circuit 115 may output the first control signal according to the output signal in the first unit time period before the current time, and change the dynamic threshold selection circuit 12 to change the output first reference voltage and the second reference voltage for the next cycle comparison.
In addition, the embodiment of the application also provides electronic equipment which comprises an antenna and the signal folding circuit, wherein the signal folding circuit is connected with the antenna. The electronic device can be applied to terminals such as mobile phones, tablets and the like or other wireless communication devices.
It is to be understood that, in the present application, the transmission of signals between different circuits or modules means that different circuits or modules have a connection relationship, where the connection may be a direct connection or an indirect connection.
Other equivalent modifications and substitutions may be made by those skilled in the art, and other equivalent modifications and substitutions may be made to the disclosure of the embodiment of the present application, such as replacing a part of the original system (e.g. comparator, adder, etc.) with a circuit having different structures but identical functions, changing the modulation type of the input signal, supplying voltage of the circuit, and changing the order of the parallel architecture, etc. are also considered as the scope of the present application.
In summary, the above embodiments are only preferred embodiments of the present application, and are not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (10)
1. A signal folding circuit for receiving an input signal and outputting an output signal, the input signal and the output signal being analog signals, the signal folding circuit comprising:
The dynamic threshold selection circuit is used for outputting a first reference voltage and a second reference voltage according to a first control signal, wherein the first reference voltage is larger than the second reference voltage;
The operation circuit is used for outputting the output signal according to the input signal, a first reference voltage and a second reference voltage, the output signal is equal to the integral multiple of the difference between the first reference voltage and the second reference voltage subtracted or added by the input signal, the voltage value of the output signal is smaller than or equal to the first reference voltage, and the voltage value of the output signal is larger than or equal to the second reference voltage;
The first control signal is output by the operation circuit according to the output signal.
2. The signal folding circuit of claim 1, wherein the output first control signal reduces a difference between the first reference voltage and the second reference voltage output by the dynamic threshold selection circuit if the output signal is equal to the input signal for a first unit time period.
3. The signal folding circuit of claim 2, wherein the outputted first control signal increases a difference between the first reference voltage and the second reference voltage outputted by the dynamic threshold selection circuit in a case where the output signal is equal to 1 times or more a difference between the first reference voltage and the second reference voltage subtracted from or added to the input signal.
4. A signal folding circuit according to any one of claims 1 to 3, wherein the arithmetic circuit includes:
a comparator module for comparing the input signal with the first reference voltage and outputting a first comparison result, and comparing the input signal with the second reference voltage and outputting a second comparison result;
A feedback voltage generating circuit for outputting a voltage signal according to the first comparison result and/or the second comparison result, wherein the absolute value of the voltage signal is an integer multiple of the difference between the first reference voltage and the second reference voltage;
And an adder circuit outputting the output signal according to the voltage signal and the input signal.
5. The signal folding circuit of claim 4, wherein the arithmetic circuit further comprises:
A detection circuit for detecting a maximum absolute value of the input signal within a second unit time period;
A calculation circuit for outputting a second control signal according to the maximum absolute value;
the feedback voltage generating circuit is further configured to output the voltage signal according to the second control signal, where the second control signal is used to indicate a value of an integer multiple of a difference between the first reference voltage and the second reference voltage.
6. The signal folding circuit of claim 5, wherein an absolute value of the voltage signal is 1-fold, 2-fold, 4-fold, or 8-fold a difference between the first reference voltage and the second reference voltage.
7. The signal folding circuit according to claim 5 or 6, wherein the feedback voltage generating circuit includes:
The wavelength division multiplexer is used for outputting an initial voltage signal according to the first reference voltage and/or the second reference voltage and the first comparison result and/or the second comparison result;
The resistor voltage division network circuit is used for outputting multiple indication signals according to the second control signals, and the multiple indication signals are used for indicating multiple;
And the multiplier is used for outputting the voltage signal according to the initial voltage signal and the output multiple indication signal, wherein the voltage signal is equal to the product of the initial voltage signal and the multiple indicated by the multiple indication signal.
8. The signal folding circuit of any of claims 1-6, wherein the first control signal includes a first sub-control signal and a second sub-control signal, the dynamic threshold selection circuit comprising:
a plurality of differential voltage regulators for generating a plurality of different first reference voltages;
A first wavelength division multiplexer module group for selecting one of the plurality of first reference voltages to output according to the first sub-control signal;
A plurality of synchronous buck converters for generating a plurality of different second reference voltages;
And the second wavelength division multiplexer module group selects one of the plurality of second reference voltages to output according to the second sub-control signals.
9. The signal folding circuit according to any one of claims 1 to 8, wherein absolute values of the first reference voltage and the second reference voltage are not equal.
10. An electronic device comprising the signal folding circuit of any one of claims 1-9 and an antenna, the signal folding circuit being connected to the antenna.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202510283864.7A CN120301426A (en) | 2025-03-11 | 2025-03-11 | Signal folding circuits and electronic devices |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202510283864.7A CN120301426A (en) | 2025-03-11 | 2025-03-11 | Signal folding circuits and electronic devices |
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| CN202510283864.7A Pending CN120301426A (en) | 2025-03-11 | 2025-03-11 | Signal folding circuits and electronic devices |
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