CN1274584C - Method for making nano device - Google Patents

Abstract

The present invention relates to a method for making a nano device, which is characterized in that the present invention comprises that: cathode beams and overlay detection mark mask plates of an optical exposure machine are prepared; a base sheet is coated with polymethyl methacrylate resist; prebaking is carried out; the cathode beams are used for exposure; development is carried out according to the proportion of MIBK: IPA=1: 3, time is 1 minute, and development fixing is carried out for 30 seconds in IPA solution; metal is vaporized or sputtered; peeling is carried out in acetone solution; cathode beam resist is coated for the second time, and glue thickness is from 200 to 250 nm; prebaking is carried out; a method for detecting backscattered electrons of the mark edges by the cathode beams is used for detecting the whole mark on the base sheet and small marks of each core pipe, and correction is carried out according to a measurement value; secondary electron beam exposure is carried out, voltage is accelerated by 50KV, a dosage is 500 uC/cm <2>, and a beam current is 100PA; development is carried out according to the proportion of MIBK: IPA=1: 3, time is 1 minute, and development fixing is carried out for 30 seconds in the IPA solution; other patterns of the device are made from optical exposure, and finally, the nanon magnitude device is formed.

Description

Methods of making nanodevices

technical field

The invention provides a method for manufacturing a nanometer device.

Background technique

Due to its high efficiency, optical exposure is the mainstream technology of integrated circuit manufacturing at present, but the resolution of optical exposure is limited by the exposure wavelength and it is difficult to achieve nanoscale resolution. Electron beam exposure has a very high resolution, and the resolution of high-performance electron beam exposure machines can reach several nanometers. However, since the electron beam exposure system usually uses a thinner beam spot for ultra-fine graphic scanning exposure, the higher the graphic accuracy requirement, the finer the beam spot required for drawing the graphic, and the smaller the corresponding beam current density. The higher the sensitivity, the longer the exposure time is required. The beam spot size can range from micrometer to nanometer, and the beam span is one thousand times larger. The sensitivity of different resists also varies greatly. For example, the CMS sensitivity of negative electron beam resist is 0.3μC/cm ² , while the high The sensitivity of positive electron beam resist PMMA is 300μC/cm ² , a difference of one thousand times. For the same exposure area, the time required for pattern scanning will also vary by thousands of times for different precision requirements. Therefore The contradiction between accuracy and scanning efficiency has become the main contradiction of electron beam lithography. The key technology to solve this problem is to solve the problem of matching and mixing lithography technology between the electron beam lithography system and the current optical lithography system with high production efficiency. The method is Most of the process is exposed by projection lithography or contact exposure, and the graphic layer with ultra-fine graphics and overlay precision requires JBX-5000LS electron beam direct writing exposure.

Contents of the invention

The object of the present invention is to provide a method for manufacturing nanometer devices. The new method to achieve high-efficiency manufacturing of nano-devices is mainly aimed at a new method adopted by the Institute of Microelectronics, Chinese Academy of Sciences, which lacks high-block exposure equipment. Utilize the high efficiency of the optical stepper and the high resolution of the electron beam exposure machine to realize high-efficiency manufacturing of nano-devices. Among them, the preparation of the overlay detection mark mask plate; the etching mark of the metal raised mark or the substrate groove is realized on the chip by electron beam exposure machine or optical exposure machine; the pre-alignment of the entire chip before electron beam exposure Detection and accurate alignment detection of each small tube core, using this method, a 100nm PHEMT device was successfully developed, and the above figure shows the 100nm PHEMT device developed by the above method. The fine part of the source-drain pattern is exposed by electron beam, and other parts are exposed by optics. The bars of the grid pattern are exposed by electron beam, and other parts are exposed by optics. At the same time, the high resolution of electron beam and the high efficiency of optical system are used. .

invention technical solution

A method for manufacturing nano-devices, preparing a mask plate for overlay detection marks using two different types of equipment; using an electron beam exposure machine or an optical exposure machine to realize metal bump marks or substrate etching marks on chips; The pre-alignment detection of the entire chip and the precise alignment detection of each small die before the beam exposure; the electron beam with a resolution of nanometers is used to expose the finest pattern in the different layers of the entire nano-device - the gate pattern, other The layer pattern is completed by a highly efficient optical exposure machine, including the following steps:

(1) Prepare an overlay detection mark mask for electron beam and optical exposure machines;

(2) The substrate is coated with PMMA resist;

(3) Pre-baking;

(4) Electron beam exposure;

(5) developing MIBK:IPA=1:3, 1 minute, then fixing in IPA solution for 30 seconds;

(6) Evaporate or sputter metal;

(7) peel off in acetone solution;

(8) The electron beam resist PMMA is coated for the second time, and the glue thickness is 200-250nm;

(9) Pre-baking;

(10) Use electron beams to detect the backscattered electrons on the edge of the mark, detect the entire mark on the substrate and the small mark of each die, and correct the coordinate error between the ideal mark and the actual mark according to the measured value;

(11) Carry out the second electron beam exposure, the accelerating voltage is 50KV, the dose is 500μC/cm ² , and the beam current is 100PA;

(12) developing MIBK:IPA=1:3, 1 minute, then fixing in IPA solution for 30 seconds;

(13) Optical exposure to fabricate other patterns of the device, and finally form a nanoscale device.

The method for manufacturing nano-devices simultaneously prepares an overlay detection mark mask for an electron beam and an optical exposure machine, wherein the coating PMMA resist described in step 2 has a glue thickness of 450-500nm.

The method for manufacturing nano-devices uses the excellent peeling properties of PMMA to prepare metal raised marks, wherein the pre-baking described in step 3 has a temperature of 165° C. and a time of 40 minutes.

In the method for manufacturing nano-devices, the preparation of the mark adopts a stripping method, wherein the metal is evaporated or sputtered in step 6, and the thickness of the metal is 250nm.

Description of drawings

In order to further illustrate the technical content of the present invention, the present invention is described in detail below in conjunction with embodiment and accompanying drawing, wherein:

Figure 1 is a diagram of electron beam direct writing lithography chip and contact optical alignment mark;

Figure 2 is a diagram of the ASM silicon wafer mark and the table mask mark of the projection optical exposure machine;

Fig. 3 is a schematic diagram of electron beam detection marking;

Figure 4 is a diagram of marking and detection scan types;

Figure 5: Scanning Electron Microscope (SEM) photos of PMMA exposed to 30nm patterns.

Figure 6: SEM photo of the 100nm GaAs PHEMT device.

Detailed ways

1. Preparation of the overlay detection mark mask for electron beam and optical exposure machines: When designing the detection mark pattern, consider the marks for electron beam exposure machine detection and contact or projection optical exposure machines at the same time. Figures 1 and 2 respectively show the electron beam direct writing lithography chip and contact optical alignment mark and projection optical exposure machine ASM silicon wafer mark and mesa mask mark. A mask with these marks is produced by an electron beam lithography machine to ensure positioning accuracy.

2. Use an electron beam exposure machine to expose and make or an optical exposure machine to realize metal bump marks or etching marks for substrate grooves on the chip.

a. Electron beam exposure machine exposes to make metal raised marks.

(1) Simultaneously input the marks for electron beam and contact exposure machine (as shown in the figure above) and the fine parts of the source and drain patterns as the pattern file for electron beam exposure.

(2) Coating PMMA electron beam resist on the substrate, and baking at 165° C. for 40 minutes.

(3) Electron beam exposure writing pattern, its exposure condition is that its acceleration voltage is 50KV, dose 380μC/cm ² , beam current 2nA; After developing in the solution of MIBK:IPA=1:3 for 60 seconds, immerse in IPA solution 30 seconds. In order to facilitate subsequent peeling, bake at low temperature (about 80°C) for 30 minutes, and soak in the solution of MIBK:IPA=1:5 for 20 seconds.

(4) Evaporate or sputter 2000A-2500A metal, and peel it off in acetone solution. Formation of marks for electron beam and contact optical exposure.

b. The projection optical exposure machine makes etching marks of the grooves of the substrate.

(1) Before the electron beam exposure, use the optical STEPPER to expose the whole mark and each die mark for electron beam inspection.

(2) Etching the mark requires that the depth of the etched mark is about 1 μm and the steepness is greater than 85° C. to form a mark for electron beam exposure. Pre-alignment inspection of the entire chip and precise alignment inspection of each small die before electron beam exposure. Electron beam can recognize two kinds of marks: 1. Groove mark, 2. Metal raised mark. When the electron beam scans the corresponding mark, detectors A and B (see Figure 3) are used to detect the backscattered electrons on the edge of the mark respectively, and the waveform of the detection signal determines the position of the edge of the mark. The backscattered electron signals detected from the mark edges Ma, Mb are detected by detectors A, B. For groove marks, a differential signal (SUB) of detection signals A, B is used, and for land groove marks, a superimposed signal of detection signals A, B is used. The signal is amplified by the gain amplifier so that the waveform on the display has a suitable peak height. The amplified signal is stored in a waveform memory and an absolute-value amplifier. The data stored in the waveform memory is used for automatic adjustment, and the width of the pulse waveform generated by the waveform generator is equal to the distance between the two peaks of the output waveform of the absolute value amplifier. The computer reads the values of A, B, C, and D. From these readings, the computer determines the center position of the mark as:

The scanning mode and type are shown in Figure 4. In order to reduce the error caused by uneven edges, the scanning type

${\mathrm{<span\; class="notranslate">\; m</span>}}_{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; D.</span>}}_{\mathrm{<span\; class="notranslate">\; x</span>}}}{\mathrm{<span\; class="notranslate">\; 4</span>}}$

${\mathrm{<span\; class="notranslate">\; m</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; D.</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}}{\mathrm{<span\; class="notranslate">\; 4</span>}}$

Select raster scan.

3. The thinnest pattern in different layers of the whole nano-device—grid pattern is exposed by the electron beam with a resolution of nanometer level, and the other layer patterns are completed by a highly efficient optical exposure machine. Different exposure conditions are selected according to the type of etchant and the size of the design pattern. For example, if the exposure dose of PMMA resist is 380-500μC/cm ² , develop with MIBK:IPA=1:3 developer solution at 20°C for 1 minute, rinse with IPA for 30 seconds, and bake at 80°C Bake for 30 minutes to remove any residue. Using the above conditions to expose a pattern with a line width of 30nm, its SEM photo is shown in Figure 5.

The new method realizes high-efficiency preparation of nano-devices in the absence of expensive equipment, and has been successfully applied in the development of nano-scale CMOS devices and nano-scale GaAS PHEMT devices. Fig. 6 is a scanning electron microscope (SEM) photo of all 100nm gate length GaAS PHEMT devices developed by this method.

Claims (4)

1, a kind of method of making nano-device is characterized in that, the mask version of the alignment certification mark of two kinds of dissimilar equipment is adopted in preparation; On chip, realize the mark of metal bump mark or substrate etching with electron beam exposure apparatus or optical exposure machine; Respectively the prealignment detection of entire chip and the accurate aligning of each little tube core are detected before the electron beam exposure; Go out the thinnest figure-gate figure in the variant layer of whole nano-device by resolution ratio at the electron beam exposure of nanometer scale, other layer pattern is finished by the very high optical exposure machine of efficient.Comprise the steps:

(1) the alignment certification mark mask version of preparation electron beam and optical exposure machine;

(2) substrate is coated with the PMMA resist;

(3) preceding baking;

(4) electron beam exposure;

(5) development MIBK: IPA=1: 3,1 minutes, photographic fixing 30 seconds in IPA solution again;

(6) evaporation or splash-proofing sputtering metal;

(7) in acetone soln, peel off;

(8) be coated with electron sensitive resist PMMA, the thick 200-250nm of glue for the second time;

(9) preceding baking;

(10), detect the tick marks of on-chip full wafer mark and each tube core, according to the value correction ideal mark of measuring and the error of coordinate of real marking with the method for the backscattered electron at electron beam snoop tag edge;

(11) carry out the electron beam exposure second time, accelerating potential 50KV, dosage 500 μ C/cm ², line 100PA;

(12) development MIBK: IPA=1: 3,1 minutes, photographic fixing 30 seconds in IPA solution again;

(13) optical exposure is made other figure of device, finally forms the nanometer scale device.

2, the method for manufacturing nano-device according to claim 1 is characterized in that preparing simultaneously the alignment certification mark mask version of electron beam and optical exposure machine, the described PMMA resist that is coated with of step 2 wherein, and its glue is thick to be 450-500nm.

3, the method for manufacturing nano-device according to claim 1 is characterized in that, utilizes the good peel property of PMMA to prepare the metal bump mark, the wherein described preceding baking of step 3, and temperature is 165 ℃, the time is 40 minutes.

4, the method for manufacturing nano-device according to claim 1 is characterized in that, mark prepare the method peel off that adopts, wherein described evaporation of step 6 or splash-proofing sputtering metal, the thickness of metal is 250nm.

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