CN1272651A - Computer hard disk isolating apparatus - Google Patents

Abstract

The present invention relates to a computer hard-disk isolation device, positioned between common hard-disk driver IDE interface and computer IDE interface, and mainly is formed from isolation circuit, cipher memory, control logical unit, command receiving and answering interface and master/slave disk control interface. The control logical unit utilizes the command receiving and answering interface to receive cipher; if the cipher is not correct, the isolation circuit is controlled to isolate the computer from the signal of hard-disk to make hard-disk stop work, and if the cipher is correct, the computer and hard-disk are connected by means of signal, the hard-disk can be used as master/slave disk, so that the hard-disk with said invented device can prevent illegal use, and all the hard-disks can be mutually isolated.

Description

Computer hard disk isolating apparatus

The present invention relates to the interface arrangement between a kind of computing machine and peripheral hardware, refer in particular to a kind of computer hard disk isolating apparatus.

Computing machine is commonly used in the occasion as office, commercial department, school and family etc., the phenomenon of the shared computing machine of many people is very general, a lot of under these circumstances people wish to have and can open by enough passwords, forbid the own hard disk that other disabled user uses, prevent that the data of key are viewed or duplicate; In addition, when networking, be subjected to illegal attack on the network, wish that at this moment the hard disk that has critical data is isolated when networking, reduce dangerous through regular meeting.At present, still not having this cipher instruction that can receive makes hard disk connect work or out-of-work device when needed.

Task of the present invention provides a kind of hard disk isolating apparatus, its resident program that do not use a computer, do not change the data structure of hard disk, just can realize receiving cipher instruction certain hard disk and computing machine isolation are quit work, or connect as master, from coiling the purpose of using with computing machine.

In order to solve above-mentioned task, the solution that the present invention adopts is: between common hard disk drive ide interface and Computer I DE interface, places one main by buffer circuit, password memory, control logic unit, command reception reply interface, the principal and subordinate is coiled the hard disk isolating apparatus that control interface is formed; In the password memory of this device, there are control hard disk password of connecting and the address code of discerning this device, control logic unit is at first replied interface by command reception and is judged whether peripheral operation is effective to this device, as effectively then receiving instruction, analyze after receiving instruction, require hard disk to connect the instruction of coiling in this way for the principal and subordinate, then wait for the password input, receive behind the password and password memory in the password that stores compare, reach three times as password bad, then continuing the control buffer circuit makes the signal between computing machine and the hard disk be in isolation, forbid hard disk work, stop reaction simultaneously the input of outside; Correct as password, the signal between computing machine and the hard disk is connected, coil control interface output principal and subordinate by the principal and subordinate simultaneously and coil control signal, hard disk can correspondingly be used as the master or from dish, and keep this state.

Revise the instruction of password in this way, then wait for receiving original code, check whether the original code of receiving is correct, when the original code of receiving is correct, then wait for the input of new password, after once input finishes, wait for input once more, import three times altogether, if errorless then new password is write password memory.Otherwise it is constant to keep original code; Reach three times if the original code of receiving is incorrect, then the no longer input of response external.

A plurality of command reception with sampling device are replied interface and are arranged to same pin and can be connected to each other together, so that receive the instruction of outside input simultaneously.The hard disk that has said apparatus like this can reach and prevent illegal use or make the purpose that each hard disk is isolated mutually in the same computing machine.

The present invention has following positive effect: the break-make that has the hard disk of this device can be by cipher control, if password is correct, can guarantee that then hard disk is as master or from the dish connection, operate as normal is unaffected, if password bad then make hard disk be in the Signal Spacing state, the program that can not be moved is used, thereby does not know that the user of password can't use this hard disk, like this, same computing machine can action be separate by many people are shared; Moreover because the connection of each hard disk is controlled with isolating two states in computing machine, so the user can make each hard disk that is connected to same computing machine as required, promptly can allow it separate, can allow it work simultaneously again; Like this, under a certain environment, a certain specific hard disk is isolated, make data on it not be subjected to the influence of such working environment, improve security; Because this password only under the correct situation of input original code, just can be rewritten, thereby can reach the purpose that the control hard disk uses.

Now be described in further detail as follows in conjunction with the accompanying drawings with preferred embodiment:

Fig. 1 is a theory diagram of the present invention

Fig. 2 is embodiment circuit theory diagrams of theory diagram shown in Figure 1

Fig. 3 is this embodiment of the invention main program flow chart

Fig. 4 is that this embodiment of the invention principal and subordinate is coiled connection processing subroutine flow chart

Fig. 5 is that this embodiment of the invention address pin is revised subroutine flow chart

In theory diagram shown in Figure 1, be a hard disk isolating apparatus in the frame of broken lines, be decorated with two such devices among the figure.If this device not, then Computer I DE interface directly is connected with the hard disk drive ide interface by connecting line, signal directly is communicated with, after using this device, the line of the ide interface of computing machine joins with hard disk drive after by buffer circuit again, owing to used buffer circuit, computing machine be connected with the signal of hard disk can be in connection or isolation; This two states can cipher instruction that interface receives controls according to replying from command reception by control logic unit.

Fig. 2 is the circuit theory diagrams of one embodiment of the present of invention, buffer circuit is by four bidirectional electronic switch 4066[U2] and eight single-wire drive device 74F244[U3] form, four bidirectional electronic switch [U2] are used to isolate two two-way signalings: one of them is 34 pin PDLAG signals on the ide interface, this signal is to power up an agreement part, represents master driver and whether has finished self check from driver; Another is 39 pin DASP signals on the ide interface, this signal be transmit driver active/have signal from driver; These two signals are isolated with bidirectional electronic switch both can prevent to be in the interference of the hard disk signal of halted state to the hard disk signal of duty, can carry out two-way communication again when using as the major-minor dish.Per two switches of four bidirectional electronic switch [U2] are merged into one group, make two groups of switches and use, 1,11 pin that 2,10 pin of [U2] of one group of switch are connected to 34 pin of hard disk ide interface [P1], corresponding other end [U2] are used to connect 34 pin of the ide interface [P0] of computing machine; 3,9 pin of one [U2] of another group electronic switch are connected to 39 pin that 39 pin of hard disk ide interface [P1], corresponding other end are used to be connected to Computer I DE interface [P0]; Eight single-wire drive devices [U3] are used to isolate the one-way transmission signal of seven keys, they are: 21 pin of [P0] [P1] are DMA request pin, 27 pin are the ready pin of passage, 31 pin are the interrupt request pin, 32 pin i.e. 16 bit data transmit signal, these four is the signal from the output of hard disk drive IDE mouth, isolate these four signals and prevent the phase mutual interference, 29 pin of [P0] [P1] are that DMA replys pin, 37 pin are command register group selection signals, 38 pin are control register group selection signals, all are input signals, isolate these three signals and stop register relevant in the hard disk drive of not wishing to use selected, cause data corruption.Because above-mentioned is the one-way transmission signal, gets final product with eight single-wire drive device 74F244.Eight single-wire drive device 74F244[U3] input end 2,4,6,8 pin be connected respectively to 21,27,31,32 pin of hard disk drive ide interface [P1], corresponding output end 18,16,14,12 pin are respectively applied for 21,27,31,32 pin that connect Computer I DE interface [P0]; Output terminal 9,7,5 pin of [U3] are connected respectively to 29,37,38 pin of hard disk drive ide interface [P1]. Respective input 11,13,15 pin are respectively applied for 29,37,38 pin that are connected to Computer I DE interface [P0].

Password memory uses serial electrically-erasable memory 24CL02[U4]; This memory has the 256B memory space, can carry out reading and writing data by its serial-shift input end of clock 6 pin, serial data input/output terminal 5 pin, the data of its preservation can not lost under the situation of outage yet, are used as storage address code and password in this example.

In this example, control logic unit, command reception are replied interface, the principal and subordinate is coiled control interface and adopted a slice single-chip microcomputer 89C2051[U1] realize, 89C2051 is 8 single-chip microcomputers of compatible 51 series, comprising data memory, 2 * 16 bit timing devices of the FLASH memory under program that oscillator, central processor CPU, 2KB are arranged, 128B; 15 programmable I/O mouth lines, full duplex serial port, 89C2051 have 20 pins, and its pin function as shown in FIG., pin 1 is a reset terminal, pin 2 is the serial data input end, and pin 3 is the serial data output terminal, and pin 4,5 is the external crystal oscillator end of oscillator, pin 6,7 are respectively interrupt request singal input end INT0, INT1, and pin 8,9 is respectively the terminals of timer counter T0, T1, and pin 11,12 is two-way input/output port to pin 19 for 89C2051I/O.Single-chip microcomputer 89C2051[U1] i.e. 19 pin of IO interface end P1.7, four control ends that are connected to bidirectional electronic switch [U2] are 13,12,5,6 pin, high level is effective, make [U2] open-minded when promptly exporting high level, [U2] turn-offed, and P1.6 i.e. 18 pin is connected to eight single-wire drive device 74F244[U3] i.e. 1,19 pin of two Enable Pins; It is in the high resistant isolation during high level, makes the unidirectional connection of its input and output during low level, and the IO interface end P1.5 of [U1] i.e. i.e. 16 pin of 17 pin, P1.4, are connected respectively to serial electrically-erasable memory 24CL02[U4] 6 pin, 5 pin; To realize to [U4] read-write operation, the input/output port P1.3 of [U1] i.e. 15 pin coils control level MASTER/SLAVE to hard disk drive output principal and subordinate, promptly constitute the principal and subordinate and coil control interface, can make corresponding hard disk as using from dish during its output high level, output low level can make it use as master; Utilize the communication port of single-chip microcomputer to reply interface as command reception, its 2 pin be RXD as communication receiver externally be connected to COM1,3 pin are that TXD externally is connected to COM2 as the communication transmitting terminal, all its COM1 of such device, COM2 ends correspondingly connect together, the communication work mode that single-chip microcomputer is set is the multiple single chip microcomputer communication mode, whether the instruction of discerning input is effective to this device, so that make same device can receive external command, password respectively and have the function of replying.6 of [U1], 7,8,9 and 11,12,13,14 pin do not use in this example.

In order to clearly illustrate the annexation between hardware, in Fig. 2, each pin of chip has been write name of code with English and numeral, all titles are consistent represents that they are electrically connected, and promptly when making printed circuit board (PCB), the line of all title unanimities is welded in a bit.

See also Fig. 3 main program flow chart, the course of work of this example is such, behind the single-chip microcomputer electrification reset in each this sampling device, communication work mode 3 is set, is provided with that SM2 is 1 among the SCON, wait for selected, single-chip microcomputer is under 1 the situation in that SM2 is set, and only receives that an address byte just can be interrupted, and can not be interrupted by a data byte, the difference of an address byte and a data byte is: the 9th is 1 in address byte, and the 9th is 0 in data byte; Whether single-chip microcomputers that address byte can make all be provided with like this enter interruption, and each single-chip microcomputer can be checked the byte of receiving, look at identically with the address that oneself is stored in the password memory, identically promptly are addressed, and represent that this device is selected; Single-chip microcomputer after selected can be removed the SM2 position, prepare to receive the data byte that sends, and other does not have selected same device, can not receive data byte thereafter.Instruction, password all can transmit as data in this device, and selected like this device just can receive instruction or password, does not have selected same device, can not receive instruction or password.Receive and judge after the instruction, read the address number instruction in this way, then send address number if principal and subordinate's dish is opened instruction then to be called the principal and subordinate and coil to connect and handle subroutine and handle, modified address cipher instruction in this way, then the call address password is revised subroutine and is handled.As not being that above-mentioned instruction does not then deal with and returns, after each subroutine was finished dealing with and returned, resetting communication mode was that SM2 is 1, waits for selected more again.

See also Fig. 4, it is so at first request input password that the principal and subordinate is coiled the connection processing subroutine course of work, judge whether password is correct, as correct, look at whether hard disk is in running order, then forbid in this way communicating by letter and return, as do not open and control then that bidirectional electronic switch [U2] is connected, eight single-wire drive devices [U3] enable, making the corresponding low or high level of P1.3 output of [U1], is master and slave dish so that control corresponding hard disk, allows hard disk work; Concurrent hard disk duty is good, and be wrong if password is received, its number of times does not surpass three times and then continues to send out request input password, surpasses three times and then forbids communication disruption, and single-chip microcomputer no longer receives external command.

See also Fig. 5, it is such that address pin is revised the subroutine course of work, at first request input password, judge whether password is correct, inputed correct password with interior, then require three new addresses of input, password as three times, then make amendment as three unanimities, and forbid communicating by letter and return master routine.If three times inconsistent then this time revise invalidly, forbid that then communication returns master routine and handle; The incorrect number of times of original code as input has surpassed three times, then sends out input password mistake, does not fill and is permitted to revise, and forbid communication, and single-chip microcomputer no longer receives any information.

Claims (3)

1. computer hard disk isolating apparatus, it is between common hard disk drive ide interface and the Computer I DE interface, it is characterized in that it includes buffer circuit, password memory, control logic unit, command reception and replys interface, the principal and subordinate is coiled control interface.

2. computer hard disk isolating apparatus according to claim 1, it is characterized in that: buffer circuit is by four bidirectional electronic switch 4066[U2] and eight single-wire drive device 74F244[U3] form, per two switches of four bidirectional electronic switch [U2] are merged into one group, make two groups of switches and use, of one group of switch is connected to 34 pin that 34 pin of hard disk drive ide interface, corresponding other end are used to be connected to the ide interface of computing machine; Another group one of electronic switch is connected to 39 pin that 39 pin of hard disk drive ide interface, corresponding other end are connected to the ide interface of computing machine; Input end 2,4,6,8 pin of eight single-wire drive devices [U3] are connected respectively to 21,27,31,32 pin of hard disk drive ide interface, and corresponding output end 18,16,14,12 pin are connected respectively to 21,27,31,32 pin of Computer I DE interface; Output terminal 9,7,5 pin of eight single-wire drive devices [U3] are connected respectively to 29,37,38 pin of hard disk drive ide interface.Respective input 11,13,15 pin are connected respectively to 29,37,38 pin of Computer I DE interface;

3. computer hard disk isolating apparatus according to claim 1 and 2 is characterized in that: this password memory is serial electrically-erasable memory 24CL02[U4]; This control logic unit is by single-chip microcomputer 89C2051[U1] realize, its IO interface end P1.7 i.e. 19 pin, be connected to bidirectional electronic switch 4066[U2] control end 13,12,5,6 pin, P1.6 i.e. 18 pin is connected to eight single-wire drive device 74F244[U3] Enable Pin 1,19 pin; Its IO interface end P1.5 i.e. i.e. 16 pin of 17 pin, P1.4, are connected respectively to serial electrically-erasable memory 24CL02[U4] i.e. i.e. 5 pin of 6 pin, data terminal of clock end; The principal and subordinate coil control interface by the input/output port P1.3 of [U1] promptly 15 pin output constitutes to hard disk; This command reception is replied interface and is used single-chip microcomputer 89C2051[U1] communication port constitute, its 2 pin is that RXD is that TXD is as communication breath transmitting terminal as communication receiver, 3 pin.A plurality of its communication receivers of such device, transmitting terminal are interconnected.

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