CN1261860C - Exponential calculation method and device for floating point numbers - Google Patents

Abstract

An exponent operation device for floating-point numbers, which is used to obtain an exponent operation result with a floating-point number base 2, comprising: a conversion device for receiving floating point number input, converting the floating point number into an integer part and a fractional part output; k index lookup tables, the fractional part has N bits, the N bits are divided into K parts, each part has N bits₁、N₂、…、N_KBit, and N ═ N₁+N₂+…+N_KEach index table receives an input of the N parts and generates an output result by table look-up; and a multiplier, for receiving the output result input of each exponent comparison table and generating a mantissa; the integer part is an exponent, an exponent operation result is represented by mantissa, exponent and output sign number with a value of zero, and the expression method of the exponent operation result is as follows: (-1)^Sy·2^Ey·m_yWhere Sy is the number of symbols, Ey is the exponent, m_yIs a mantissa, 1 is less than or equal to m_y< 2, and N, N as described above₁、N₂、…、N_KIs a natural number.

Description

Exponential calculation method and device for floating point numbers

technical field

The present invention relates to a method and device for exponential calculation, in particular to a method and device for exponential calculation of floating point numbers.

Background technique

In the current electronic computer, the most commonly used representation of the floating point number F is:

F=M× ^βE

Where M is the mantissa, E is the exponent, and β is the base of the exponent.

The Institute of Electrical and Electronic Engineers (Institute of Electrical and Electronic Engineers, IEEE) has established four standard formats for the representation of floating-point numbers. The first two formats are single-precision 32-bit format and double-bit format. Accurate 64-bit format (double-precision 64-bit format), and the other two are extended formats used to represent intermediate results during operations. For the single-precision 32-bit format representation, the most important purpose is to express the accuracy of floating-point numbers, and only use the double-bit precise 64-bit format representation to obtain more effective digits. The double length (Double Length) storage space stores the floating point number.

Referring to FIG. 1, FIG. 1 shows a schematic diagram of the above-mentioned single precise 32-bit format representation. In this notation, with 2 as the base, the floating point number F=(-1) ^S 2 ^E ·M, where M is the mantissa of the floating point number, represented by 23 bits, and E is the mantissa of the floating point number The exponent is represented by 8 bits, and S is the symbol number of the point number represented by 1 bit.

In current electronic computers, almost all calculations use floating-point calculations, so the calculation efficiency of floating-point numbers determines the performance of the electronic computer. In the current practice, the method of looking up the table is usually used to establish a comparison table in advance, and cooperate with the table lookup during the operation to obtain the result of the exponential operation of the floating-point number. When using this method to perform the exponential operation of the floating-point number, There will be some problems with the accuracy of calculations. An 8-bit comparison table is already quite large, but using an 8-bit comparison table to perform floating-point exponent operations, the accuracy of the operation results is still not enough, because Usually the mantissa part of a floating point number has 23 bits.

Contents of the invention

In view of this, the main purpose of the present invention is to provide a floating-point number exponent operation device and method for obtaining the floating-point number exponent operation result with the highest precision.

In order to achieve the above object, the present invention provides a floating-point number exponent operation device, which is used to obtain a floating-point number with base 2 as an exponent operation result, and the representation of the floating-point number is (-1) ^Sx 2 ^Ex m _x , the expression of the exponent operation result is (-1) ^Sy 2 ^Ey m _y , where Sx is the symbol number of the floating point number, Sy is the symbol number of the exponent operation result, Ex is the exponent of the floating point number, Ey is the exponent of the exponent operation result, m _x is the mantissa of the floating point number, m _y is the mantissa of the exponent operation result and 1≤m _x <2, 1≤m _y <2, and the exponent operation device includes: a conversion The device is used to receive the sign number of the floating point number, the exponent of the floating point number and the mantissa input of the floating point number, and convert the floating point number into an integer part and a fractional part for output; K exponent comparison tables, the fractional part has N Divide N bits into K parts, each part has N ₁ , N ₂ ,..., N _K bits respectively, and N=N ₁ +N ₂ +...+N _K , each The exponent table receives an input from the above-mentioned K part, and looks up the table to generate an output result; a multiplier is used to receive the input of the output result of each of the above-mentioned exponent comparison tables, and generate the mantissa of the above-mentioned exponent operation result. Wherein the integer part output by the conversion device is the exponent of the result of the exponential operation, the value of the sign number of the result of the exponential operation is zero, and the above N, N ₁ , N ₂ , . . . , N _K are natural numbers.

On the other hand, the present invention also provides a floating-point number exponent operation method, which is used to obtain an exponent operation result of a floating-point number with base 2, and the representation of the floating-point number is (-1) ^Sx 2 ^Ex m _x , where Sx is the symbol number of the floating point number, Ex is the exponent of the floating point number, m _x is the mantissa of the floating point number, and 1≤m _x <2, the exponent calculation method includes the following steps: first, the above floating point The sign number of point number, the exponent of above-mentioned floating-point number and the mantissa of above-mentioned floating-point number are input in a conversion device; Then, in above-mentioned conversion device, above-mentioned floating-point number is converted into an integer part and a fractional part; The above-mentioned fractional part is divided into K parts , the above-mentioned fraction part has N bits, each part has N ₁ , N ₂ ,..., N _K bits respectively, and N=N ₁ +N ₂ +...+N _K , each index table receives An input in the above-mentioned K part, and a look-up table produces an output result; Then, the output result of each of the above-mentioned index tables is input in a multiplier to generate a mantissa; finally use the above-mentioned mantissa, the above-mentioned integer part, and a value of The sign number of zero represents the above-mentioned exponent operation result, and the representation of the exponent operation result is (-1) ^Sy 2 ^Ey m _y , wherein sy is the sign number, Ey is the above-mentioned integer part, and m _y is the above-mentioned output mantissa, And _1≤my <2, and the above-mentioned N, N ₁ , N ₂ , ..., N _K are natural numbers.

Description of drawings

FIG. 1 shows a schematic diagram of a conventional single precise 32-bit format representation;

Fig. 2 shows the schematic diagram of the structure of the exponent operation device of the floating-point number of the present invention;

Fig. 3 shows the schematic diagram of the structure of the conversion device of the present invention;

FIG. 4 shows a schematic diagram of the structure of the floating-point number exponent operation device according to the embodiment of the present invention.

Description of figure number:

M, m _x - the mantissa of the floating-point number;

E, Ex-exponent of floating point number;

S, Sx-the symbol number of symbol points;

Ix - integer part;

Fx - fraction part;

10 - conversion device;

12 - displacement device;

14 - detection device;

16 - decision means;

20 ₁ -20 _K - index comparison table;

30 - multiplier;

Fsc - fractional part of the shift;

Isc - shifted integer part output;

Err - error message;

Sy - sign number of exponential operation result;

Ey - the exponent of the result of the number operation;

m _y - the mantissa of the result of the exponent operation.

Detailed ways

FIG. 2 shows a schematic diagram of the structure of the floating-point exponential computing device of the present invention. As shown in the figure, the floating-point exponent calculation device includes a conversion device 10 , K exponent comparison tables 20 ₁ -20 _K and a multiplier 30 . The conversion device 10 is used to receive the sign number Sx of a floating-point number X, the exponent Ex of the floating-point number X, and the mantissa _mx of the floating-point number X as input, convert the floating-point number into an integer part Ix and a fractional part Fx output and in Error message Err is output when the floating-point number cannot be represented as an integer part and a fractional part. The fractional part Fx has N bits, and the N bits are divided into K parts, each part has N ₁ , N ₂ ,..., N _K bits respectively, and N=N ₁ +N ₂ +...+ N _K , each index table in the K index comparison tables 20 ₁ -20 _K receives an input from the above K part, and looks up the table to generate an output result. The multiplier 30 is used for receiving the output result of each exponent table and generating a mantissa m _y of an exponent operation result Y. The integer part Ix outputted by the conversion device 10 is the exponent Ey of the exponent operation result Y and since the exponent operation results Y are all positive numbers, the sign number Sy of the exponent operation result Y is zero.

The representation of the above floating-point number X is:

X＝(-1) ^Sx 2 ^Ex m _x (1)

Wherein Sx is the sign number of the floating point number, when the floating point number X is a positive number, the sign number Sx of the floating point number is 0. When the floating-point number X is a negative number, the sign number Sx of the floating-point number is 1; Ex is the exponent of the floating-point number; m _x is the mantissa of the floating-point number, and 1≤m _x <2.

The floating-point number exponent operation device of the present invention is used to obtain the exponent operation result Y of the floating-point number X with base 2:

Y＝2 ^X ＝(-1) ^Sy 2 ^Ey m _y (2)

Wherein Sy is the symbol number of the exponential operation result, because the exponential operation result Y is a positive number, so the symbol number Sy of the exponential operation result Y is zero; Ey is the exponent of the exponent operation result; m _y is the index of the exponent operation result mantissa, and 1≤m _y <2.

In order to obtain Y, the method of the present invention first divides X into an integer part and a fractional part:

X＝(-1) ^Sx 2 ^Ex m _x ＝Ix+Fx (3)

Wherein Ix is an integer part, Fx is a fractional part and 0≤Fx<1.

Fx＝q·2 ^-N ＝(Ai·2 ^Ni )·2 ^-N (4)

Among them, q is a N-digit number, and Ai is a Ni-digit number.

$\mathrm{<span\; class="notranslate">\; Y</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; Ix</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; Fx</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; Ix</span>}}<span\; class="notranslate">\; \&times;</span><span\; class="notranslate">\; [</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; Ai</span>}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{{\mathrm{<span\; class="notranslate">\; N</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; N</span>}}}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 5</span>}<span\; class="notranslate">\; )</span>$

Therefore, the exponent Ey of the exponent operation result, the mantissa m _y of the exponent operation result, and the symbol number Sy of the exponent operation result Y are respectively:

Ey＝Ix (6)

$\mathrm{<span\; class="notranslate">\; my</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; Fx</span>}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; Ai</span>}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{{\mathrm{<span\; class="notranslate">\; N</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; N</span>}}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}\mathrm{<span\; class="notranslate">\; Ti</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 7</span>}<span\; class="notranslate">\; )</span>$

Sy=0 (8)

And in $\mathrm{Ti}=\underset{i}{\mathrm{\&Pi;}}{2}^{\mathrm{Ai}\&times;2^{N_i-N}},$ And 1≤i≤K, K is the number of index comparison table, and because 0≤Fx<1, so 2 ⁰ ≤2 ^Fx <2 ¹ , that is, 1≤2 ^Fx <2, so 1≤m _y <2 .

Utilize the exponent operation device of floating-point number of the present invention to obtain this floating-point number X with 2 as the exponent operation result Y, at first, the symbol number Sx of floating-point number X, the exponent Ex of floating-point number X and the mantissa m of floating-point number X _x is input into the conversion device 10 . Next, the floating-point number X is expressed in the conversion device 10 as an integer part Ix and a fractional part Fx (see the third formula). Next, divide the fraction part into K parts, the fraction part has N bits, each part has N ₁ , N ₂ , ..., N _K bits, and N=N ₁ +N ₂ +.. .+N _K , each index table receives an input in the above-mentioned N part, and looks up the table to generate an output result, and then input the output result of each index table into the multiplier 30 to generate the mantissa m _y of the exponent operation result Y (Refer to formulas 4, 5 and 7). Finally, use the mantissa m _y , the integer part Ix, and a symbol number Sy with a value of zero to represent the exponent operation result Y. The representation of the exponent operation result Y is (-1) ^Sy · 2 ^Fy · m _y , where Sy is a symbolic number whose value is zero (refer to formula 8), Ey is the integer part Ix (refer to formula 6), m _y is the mantissa and 1≤m _y <2.

FIG. 3 shows a schematic diagram of the structure of the conversion device of the present invention. As shown in the figure, the converting device 10 includes a shifting device 12 , a detecting device 14 and a determining device 16 . The shifting device 12 is used to receive the input of the exponent Ex of the floating point number and the mantissa m _x of the floating point number, and shift the mantissa m _x of the floating point number according to the exponent Ex of the floating point number. For example, when the exponent Ex of the floating point number is a positive integer, Then move the mantissa m _x of the floating point number to the left according to the positive integer. For example, if the exponent Ex of the floating point number is 5, then the mantissa m _x of the floating point number is shifted to the left by 5 bits. When the exponent Ex of the floating point number is a negative integer, then The mantissa m _x of the floating point number is shifted to the right according to the positive integer, for example: the exponent Ex of the floating point number is -1, then the mantissa m _x of the floating point number is shifted to the right by 1 bit, and the shifting device 12 generates a shift fraction Part Fsc and a shifted integer part Isc are output.

The detecting device 14 is used for detecting the shifting device 12, and sends an error message Err when the shifting device 12 overflows. The decision device 16 is used to receive the input of the shifted integer part Isc and the sign number Sx of the floating point number, and determine the sign of the shifted integer part Isc according to the sign number Sx of the floating point number to generate the integer part Ix to output the conversion device 10, when When Sx is 1, Ix=-Isc, and when Sx is 0, Ix=Isc. The shifted fractional part Fsc is the fractional part Fx after being output from the conversion device 10 .

FIG. 4 shows a schematic diagram of the structure of the floating-point number exponent operation device according to the embodiment of the present invention. As shown in the figure, the floating-point exponent computing device includes a shifting device 12 , a detecting device 14 , a determining device 16 , three exponent comparison tables 20 ₁ -20 ₃ and a multiplier 30 . The floating-point number exponent operation device of this embodiment is used to obtain the exponent operation result Y of the floating-point number X with base 2 = 2 ^X , and the representation of the floating-point number X is X=(-1) ^Sx 2 ^Ex . m _x , where Sx is the sign number of the floating point number, expressed in 1 bit, when the floating point number X is a positive number, the floating point number Sx is 0, when the floating point number X is a negative number, the floating point number is the sign number Sx is 1; Ex is the exponent of the floating point number, expressed in 8 bits; m _x is the mantissa of the floating point number, expressed in 24 bits, and 1≤m _x <2.

In order to obtain Y, X needs to be divided into an integer part Ix represented by 8 bits and a fractional part Fx represented by 23 bits, wherein 0≤Fx<1; the shifting device 12 receives the exponent Ex of the floating-point number and the floating-point number The mantissa m _x of the floating point number is input, and the mantissa m _x of the floating point number is shifted according to the exponent Ex of the floating point number. For example, when the exponent Ex of the floating point number is a positive integer, the mantissa m _x of the floating point number is shifted to the left according to the positive integer , for example: the exponent Ex of the floating point number is 5, then the mantissa m _x of the floating point number is shifted to the left by 5 bits, when the exponent Ex of the floating point number is a negative integer, the mantissa m _x of the floating point number is shifted to the right according to the positive integer, For example, if the exponent Ex of the floating point number is -1, then the mantissa m _x of the floating point number is shifted to the right by 1 bit, and the shifting device 12 generates a shifted fractional part Fsc and a shifted integer part Isc as outputs. The detecting device 14 is used for detecting the shifting device 12, and sends an error message Err when the shifting device 12 overflows, and the error message Err includes an overflow message and an underflow message. When the exponent Ex of the floating-point number is greater than 7, the mantissa m _x of the floating-point number is shifted to the left by more than 7 bits, and an overflow message is issued at this time. When the exponent Ex of the floating point number is less than -23, the mantissa m _x of the floating point number is shifted to the right by more than 23 bits, and an underflow bit message is issued at this time. The determining device 16 is used to receive the input of the shifted integer part Isc and the sign number Sx of the floating point number, and determine the sign of the shifted integer part Isc according to the sign number Sx of the floating point number to generate an output of the integer part Ix represented by 8 bits In the converting device 10, when Sx is 1, Ix=-Isc, and when Sx is 0, Ix=Isc.

Wherein the shifted fractional part Fsc is the integer part of the fractional part Fx represented by 23 bits after being output from the conversion device 10, and the integer part Ix is the exponent Ey of the exponent operation result Y (refer to the sixth formula).

Then, the fractional part Fx is divided into 3 parts, respectively 8 bits, 8 bits and 7 bits, each part is input in the index comparison table 20, 22, 24 in order, and in each index comparison table Generate an output result, and then input the output result of each exponent table into the multiplier 30 to generate the mantissa m _y of the exponent operation result Y.

According to formula 7:

${\mathrm{<span\; class="notranslate">\; m</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; Fx</span>}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; Ai</span>}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{{\mathrm{<span\; class="notranslate">\; N</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; N</span>}}}<span\; class="notranslate">\; =</span>\underset{\mathrm{<span\; class="notranslate">\; i</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}\mathrm{<span\; class="notranslate">\; Ti</span>}$

In this embodiment, 1≤i≤3, 3 is the number of the index comparison table, so:

${\mathrm{<span\; class="notranslate">\; m</span>}}_{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&Pi;Ti</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="T"\; filenames="C0212709100131.png,C0212709100141.png"\; state="\{\{state\}\}">T</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 8</span>}}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 16</span>}}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; \&times;</span>{\mathrm{<span\; class="notranslate">\; 2</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; twenty\; three</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 9</span>}<span\; class="notranslate">\; )</span>$

in ${\mathrm{<figure-callout\; id="1"\; label="T"\; filenames="C0212709100131.png,C0212709100141.png"\; state="\{\{state\}\}">T</figure-callout>}}_1=2^{A_1\&times;2^{-8}},$ And A ₁ is the first part of the 3 parts divided into the fractional part Fx, which is an 8-bit number; $T_2=2^{A_2\&times;2^{-16}},$ And A ₂ is the second part of the 3 parts divided by the fractional part Fx, which is an 8-bit number; $T_3=2^{A_3\&times;2^{-\mathrm{twenty\; three}}},$ And A ₃ is the last part among the 3 parts divided by the fractional part Fx, which is a 7-bit number.

Since the exponential operation results Y are all positive numbers, the sign number Sy of the exponential operation result Y is zero (refer to Expression 8).

Finally, use my _y , Ix , and Sy to represent the exponent operation result Y, and its notation is Y=(-1) ^Sy · 2 ^Ey · m _y , where Sy is the sign number of the exponent operation result, and Ey is the exponent operation result The exponent of the result, m _y is the mantissa of the exponent operation result, and 1≤m _y <2.

Claims (8)

1. An exponent operation device of a floating-point number, used to obtain an exponent operation result of a floating-point number with base 2, the representation of the floating-point number is (-1) ^Sx · 2 ^Ex · m _x , the exponent operation result The notation is (-1) ^Sy · 2 ^Ey · m _y , where Sx is the symbol number of the floating point number, Sy is the symbol number of the exponent operation result, Ex is the exponent of the floating point number, and Ey is the exponent operation result , m _x is the mantissa of the floating-point number, m _y is the mantissa of the exponent operation result, and 1≤m _x <2, 1≤m _y <2, the exponential operation device includes: A shifting device, used to receive the input of the exponent of the floating point number and the mantissa of the above floating point number, when the exponent of the floating point number is a positive integer, shift the mantissa of the floating point number to the left by an amount equal to the exponent of the floating point number bit, and when the exponent of the floating point number is a negative integer, the mantissa of the above floating point number is shifted to the right by the bit equivalent to the exponent of the above floating point number to generate a shifted number, and one of the shifted number is output respectively a fractional part and a shifted integer part; A determining device, used to receive the input of the above-mentioned shifted integer part and the sign number of the above-mentioned floating point number, and determine the sign of the above-mentioned shifted integer part according to the sign number of the above-mentioned floating-point number, so as to generate the above-mentioned shift integer part into an integer part; K index comparison table, the above-mentioned fraction part has N bits, and the N bits are divided into K parts, each part has N ₁ , N ₂ , ..., N _K bits respectively, and N=N ₁ +N ₂ +...+N _K , each index comparison table receives an input corresponding to the index comparison table in the above K part, and looks up the table to generate an output result; and a multiplier, used to receive the output result of each of the above-mentioned index comparison tables as an input, and generate the mantissa of the above-mentioned exponent operation result; Wherein the integer part output by the above-mentioned determining means is the exponent of the above-mentioned exponential operation result, the sign number of the above-mentioned exponential operation result has a value of zero, and the above-mentioned N, N ₁ , N ₂ , . . . , N _K are natural numbers. 2. The floating-point exponent operation device according to claim 1, further comprising a detection device for detecting the shifting device, and sending an error message when the shifting device overflows. 3. The exponential operation device of floating-point number according to claim 1, characterized in that: the above-mentioned i-th index comparison table receives the input of the i-th part Ai in the above-mentioned fractional part, and the above-mentioned fractional part has N bits, and Ai has Ni bit, the output result Ti is: $\mathrm{Ti}=2^{\mathrm{Ai}\&times;2^{\mathrm{Ni}-N}},$ where i is a natural number. 4. The exponential operation device of floating-point number according to claim 1, characterized in that: when the above-mentioned floating-point number is a positive number, the sign number of the above-mentioned floating-point number is 0, and when the above-mentioned floating-point number is a negative number, the sign number of the above-mentioned floating-point number is 0. The number of symbols is 1. 5. An exponent operation method of a floating-point number, used to obtain an exponent operation result of a floating-point number with base 2, the representation of the floating-point number is (-1) ^Sx 2 ^Ex m _x , where Sx is the The symbol number of the floating-point number, Ex is the exponent of the floating-point number, m _x is the mantissa of the floating-point number, and 1≤m _x <2, the exponent calculation method comprises the following steps: Using a shifting device to receive the input of the exponent of the floating-point number and the mantissa of the above-mentioned floating-point number, when the exponent of the floating-point number is a positive integer, shift the mantissa of the above-mentioned floating-point number to the left by a position equivalent to the exponent of the above-mentioned floating-point number , and when the exponent of the floating-point number is a negative integer, shift the mantissa of the above-mentioned floating-point number to the right by the bit equivalent to the exponent of the above-mentioned floating-point number to generate a shifted number, and output a fraction of the shifted number respectively part and a shifted integer part; Utilize a determining device to receive the input of the above-mentioned shifted integer part and the sign number of the above-mentioned floating point number, and determine the sign of the above-mentioned shifted integer part according to the sign number of the above-mentioned floating-point number, so as to generate the above-mentioned shift with the above-mentioned sign The bit integer part is an integer part; the above-mentioned fractional part is divided into K parts, the above-mentioned fractional part has N bits, and each part has _N1 , _N2 , ..., _NK bits respectively, and N= _N1 +N ₂ +...+N _K , each index comparison table receives an input corresponding to the index comparison table in the above K part, and looks up the table to generate an output result; inputting the output of each of the above exponent tables into a multiplier to generate a mantissa; and Utilize the above-mentioned mantissa, the above-mentioned integer part, and a symbolic number with a value of zero to represent the above-mentioned exponent operation result, the representation of the exponent operation result is (-1) ^Sy 2 ^Ey m _y , where Sy is the symbolic number, Ey is the above-mentioned integer part, my _y is the above-mentioned output mantissa, _1≤my <2, and the above-mentioned N, N ₁ , N ₂ , ..., N _K are natural numbers. 6. The exponent calculation method of floating-point numbers according to claim 5, characterized in that: in the above-mentioned conversion device, the step of representing the above-mentioned floating-point numbers as an integer part and a fractional part further includes substeps: Using a detection device, the above error message is issued when the above shift device overflows. 7. The exponent operation method of floating-point numbers according to claim 5, characterized in that: the above-mentioned i-th index comparison table receives the input of the i-th part Ai in the above-mentioned fractional part, and the above-mentioned fractional part has N bits, and Ai has Ni bit, the output result Ti is: $\mathrm{Ti}=2^{\mathrm{Ai}\&times;2^{\mathrm{Ni}-N}},$ where i is a natural number. 8. The exponential operation method of floating-point numbers according to claim 5, characterized in that: when the above-mentioned floating-point numbers are positive numbers, the sign number of the above-mentioned floating-point numbers is 0, and when the above-mentioned floating-point numbers are negative numbers, the sign number of the above-mentioned floating-point numbers is 0. The number of symbols is 1.

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