CN1260883C - Impedance matching circuit - Google Patents

Abstract

An impedance matching circuit for matching impedance between a cable and a receiver includes a first transistor, a second transistor, a resistor, a negative feedback control circuit, a multiplexer, and a reference voltage generator. The operational amplifier, the transistor and the resistor are used to match the impedance of the cable with the input of the receiver, and when the characteristic impedance of the cable changes, the reference voltage generator and the multiplexer in the impedance matching circuit with adjustable resistance value generate different reference voltages, so that the impedance matching of the cable with the input of the receiver can be realized.

Description

Impedance matching circuit

technical field

The present invention relates to an impedance matching circuit that makes the characteristic impedance of the cable and the input impedance of the input end of the receiver for data transmission achieve impedance matching, and especially relates to an impedance matching circuit that can still make the cable when the characteristic impedance of the cable changes. The characteristic impedance of the data transmission and the input impedance of the input end of the receiver for data transmission achieve an impedance matching adjustable resistance impedance matching circuit.

Background technique

Figure 1 is a schematic diagram of the data transmission system. In Fig. 1, two parts are included in the data transmission system, the first one is T _X (transmitter) 10, the second one is R _X (receiver) 12, and the medium connecting these two parts is collectively referred to as cable (cable)14. Usually cables have a characteristic impedance (characteristic impedance) Z _Φ , if the input impedance Z _in at the R _X 12 end does not match the characteristic impedance Z _Φ of the cable 14 (that is, Zi _n ≠ Z _Φ ), there will be signal reflection (signal reflection) phenomenon. Therefore, the input impedance Z _in of the terminal R _X 12 must be properly adjusted so as to achieve impedance matching with the characteristic impedance Z _Φ of the cable 14, so as to reduce signal reflection and prevent the received signal from being destroyed.

2A-2D are common impedance matching circuit diagrams. In Fig. 2A, the characteristic impedance of the cable 202 is Z _Φ , the input impedance seen from the input end of R _X 208 is Z _in 206, and a fixed resistance R _Φ is connected between the input end of R _X 208 and the voltage source Vdd 204. Wherein, generally the input impedance Z _in 206 of the input terminal of R _X 208 is very large, and the resistance value of the input impedance Z _in 206 is far greater than the resistance value of the fixed resistance R _Φ 204, so the input impedance Z _in 206 and the fixed resistance R _Φ The parallel resistance value after the parallel connection of 204 is similar to the resistance value of the fixed resistance _RΦ204 . When the resistance value of the fixed resistor R _Φ 204 is selected to be the same as the characteristic impedance Z _Φ of the cable 202, the purpose of impedance matching is achieved.

In Fig. 2B, the characteristic impedance of the cable 212 is Z _Φ , the input impedance seen from the input end of R _X 218 is Z _in 216, and a fixed resistance R _Φ 214 is connected between the input end of R _X 218 and the ground end . Among them, the input impedance Z _in 216 of the input terminal of R _X 218 is generally very large, and the resistance value of the input impedance Z _in 216 is much larger than the resistance value of the fixed resistance R _Φ 214, so the input impedance Z _in 216 and the fixed resistance R _Φ The parallel resistance value after 214 is connected in parallel is similar to the resistance value of the fixed resistance R _Φ 214. When the resistance value of the fixed resistor _RΦ 214 is selected to be the same as the characteristic impedance _ZΦ of the cable 212, the purpose of impedance matching is achieved.

In Fig. 2C, the characteristic impedance of cable 222 is Z _Φ , the input impedance seen from the input terminal of R _X 228 is Z _in 226, the drain of PMOS 224 is connected at the input terminal of R _X 228, and the source of PMOS 224 The pole is connected to the voltage source Vdd, the gate of the PMOS 224 is connected to the control terminal of the feedback control circuit 225, and a precision resistor R _ext 227 is connected between the signal terminal of the feedback control circuit 225 and the voltage source Vdd. Wherein, the equivalent resistance viewed from the drain of the PMOS is R _eff , and the resistance value of the precision resistor R _ext 227 is R _ext =α·R _eff , and the value of α is controlled by the feedback control circuit 225 . Generally, the input impedance Z _in 226 of the input terminal of R _X 228 is very large, and the resistance value of the input impedance Z _in 226 is much larger than the resistance value of the equivalent resistance R _eff seen from the drain of the PMOS, so the input impedance Z _in The parallel resistance after 226 is connected in parallel with the equivalent resistance R _eff is approximately the resistance value of the equivalent resistance R _eff . When the resistance value of the equivalent resistance R _eff is selected to be the same as the characteristic impedance Z _Φ of the cable 222 , the purpose of impedance matching is achieved.

In Fig. 2D, the characteristic impedance of cable 232 is Z _Φ , the input impedance seen from the input terminal of R _X 238 is Z _in 236, the drain of NMOS 234 is connected to the input terminal of R _X 238, and the source of NMOS 234 The gate of the NMOS 234 is connected to the control terminal of the feedback control circuit 235, and a precision resistor R _ext 237 is connected between the signal terminal and the ground terminal of the feedback control circuit 235. Wherein, the equivalent resistance viewed from the drain of the NMOS is R _eff , and the resistance value of the precision resistor R _ext 237 is R _ext =β·R _eff , and the value of β is controlled by the feedback control circuit 235 . Generally, the input impedance Z _in 236 of the input terminal of R _X 238 is very large, and the resistance value of the input impedance Z _in 236 is much larger than the resistance value of the equivalent resistance R _eff seen from the drain of the NMOS, so the input impedance Z _in The parallel resistance after 236 is connected in parallel with the equivalent resistance R _eff is approximately the resistance value of the equivalent resistance R _eff . When the resistance value of the equivalent resistance R _eff is selected to be the same as the characteristic impedance Z _Φ of the cable 232 , the purpose of impedance matching is achieved.

In Figure 2A ~ Figure 2D, when the characteristic impedance Z _Φ of the cable changes, the fixed resistance R _Φ and precision resistance R _ext must be changed accordingly, and when the number of cables is large, the fixed resistance R in Figure 2A and Figure 2B _Φ will increase with the number of cables, which will cause an increase in the cost of the impedance matching circuit.

Fig. 3 is another common impedance matching circuit diagram. In Fig. 3, resistor R _cur 302 is an external or built-in bias resistor, which mainly generates current to transistor mib 304, while transistor mdrz 306, transistor mb7 308, transistor mdlz 310, transistor mdri 312, transistor ma7 314 , The transistor mdli 316 and the transistor mib 304 form a current mirror circuit. Because the gates of the aforementioned transistors are all connected together, the current flowing through them is proportional to the current ibias in multiples according to the ratio of the length and width of the transistor size.

The gate voltage Vref at transistor muri 318 and transistor mulz 320 is a parameter

Considering the voltage, its voltage Vref is usually less than the potential of the voltage source Vdd by about ΔV. Transistor muli 322, transistor muri 318, transistor mulz 320, and transistor murz 324 are used for level shift, mainly to reduce the gate voltage of the transistor by a voltage value of about a threshold voltage, and then Its source outputs the voltage (that is, forms a source follower (Source Follower)).

Transistor ma1 326, transistor ma2 328, transistor ma3 330, transistor ma4332 and transistor ma5 334 form an operational amplifier, and the output voltage of the operational amplifier is Voa. After the voltage Vref has undergone a potential displacement, the contact ka2 is connected to the gate of the transistor ma2328, the transistor mna2 336, the transistor mna1 338 seen by the voltage Voa, the voltage Vref and the contact ka1 form a negative feedback circuit (the capacitor mca 340 is the frequency Compensation capacitance, so that the operational amplifier can be stable), so the voltage value of the contact point ka1 and the contact point ka2 are equal, and the voltage value of the contact point ka1 is the voltage value after the voltage Vext displacement, and the voltage value of the contact point ka2 is the voltage after the voltage Vref displacement Therefore, the voltage value of the voltage Vext is equal to the voltage value of the voltage Vref.

Transistor mb1 342, transistor mb2 344, transistor mb3 346, transistor mb4348 and transistor mb5 350 form another operational amplifier, and the output voltage of the operational amplifier is Vob, because the voltage Vref has undergone a potential shift, and the contact kb2 is connected to the transistor mb2 344 The grid of transistor mz0 352, voltage Vxx, transistor murz 324 and contact kb1 seen by voltage Vob form a negative feedback circuit (capacitor mcb 354 is a frequency compensation capacitor to stabilize the operational amplifier), so contact kb1 and contact kb2 The voltage values are equal, and the voltage value of the contact kb1 is the voltage value after the voltage Vxx displacement, and the voltage value of the contact kb2 is the voltage value after the voltage Vref displacement, so the voltage value of the voltage Vxx is equal to the voltage value of the voltage Vref.

The gates of transistor mna2 336 and transistor mnb2 356 are connected together, so the currents flowing through transistor mna2 336 and transistor mnb2 356 are equal, and the current flowing through resistor Rext 358 is equal to the current flowing through transistor mz0 352, so the resistance of resistor Rext 358 The value is equivalent to the resistance value of the transistor mz0 352 equivalent resistance.

The main spirit of the above circuit is to make the voltage Vext=voltage Vref=voltage Vxx, and the current flowing through the resistor Rext 358 is equal to the current flowing through the transistor mz0 352, so that the resistance value of the equivalent resistance of the transistor mz0 352 can be regarded as the same as that of the resistor The resistance values of Rext 358 are equal (of course, to meet the above two conditions, it must be completed by two operational amplifiers).

Suppose the chip width W=Wp of the transistor mz0 352, the chip width W=10Wp of the transistor mlp1 360, and the chip width W=Wp of the transistor mlp2362. The chip width of transistor mnb2356 is W=Ws, the chip width of transistor mnx 364 is W=11Ws, and transistor mnb2 356 is connected with the gate of transistor mnx 364, so the current flowing through transistor mnx 364 is 11 times of the current flowing through transistor mnb2 356 , and the current flowing through the transistor mlp1 360 is 10 times the current flowing through the transistor mz0 352, the current flowing through the transistor mlp2 362 is equal to the current flowing through the transistor mz0 352 (because the gates of the transistor mlp1 360, the transistor mlp2 362 and the transistor mz0 352 pole connected). Therefore, the equivalent resistance seen from the terminal datab to the voltage source Vdd is about 1/10 of the equivalent resistance of the transistor mz0 352, and the equivalent resistance seen from the ground terminal is about infinite, so the equivalent resistance of the terminal datab is The resistance value is (1/10)*Rext//infinite impedance=(1/10)*Rext.

The disadvantages of the above impedance matching circuit are: (1). When the characteristic impedance of the cable changes, the impedance matching resistance value required by the impedance matching circuit will also change, and the resistor Rext needs to be replaced. (2). This impedance matching circuit requires two operational amplifiers to complete the negative feedback condition, so the circuit becomes more complicated. (3). When the voltage Vref of the impedance matching circuit is changed, the impedance matching resistance of the impedance matching circuit cannot be changed.

Contents of the invention

Therefore the object of the present invention is to provide an impedance matching circuit with adjustable resistance, in addition to the purpose of impedance matching between the cable and the input end of the receiver, and when the characteristic impedance of the cable changes, the impedance of the adjustable resistance The matching circuit still provides impedance matching between the cable and the input of the receiver.

In order to achieve the above and other objects, the present invention proposes an impedance matching circuit with adjustable resistance, which is used as an impedance matching between a cable and a receiver for data transmission, and the impedance matching circuit includes a first A transistor, a second transistor, a resistor and a negative feedback control circuit (which may be operational amplifiers, differential amplifiers, inverting amplifiers, etc.). The above-mentioned first transistor has a power supply terminal, a control terminal and a load terminal, the power supply terminal of the first transistor is connected to a voltage source, and the load terminal is connected to an input terminal of the receiver. The second transistor has a power terminal, a control terminal and a load terminal, wherein the power terminal of the second transistor is connected to the voltage source, and the control terminal of the second transistor is connected to the control terminal of the first transistor. One end of the resistor is connected to the load end of the second transistor, and the other end is grounded. An inverting input terminal of the negative feedback control circuit receives an adjustable reference voltage, the other non-inverting input terminal is connected to the load terminal of the second transistor, and an output terminal of the negative feedback control circuit is connected to the control of the second transistor. end. When the characteristic impedance of the cable changes, the resistance value of the equivalent resistance of the impedance matching circuit can be equal to the changed characteristic impedance of the cable by adjusting the reference voltage.

The above impedance matching circuit may further include a multiplexer. The multiplexer has a selection terminal and a signal output terminal. The multiplexer receives at least one voltage signal of different magnitudes, and after selecting one of the voltage signals according to a selection signal received by the selection terminal, It is regarded as the reference voltage and output to the inverting input terminal of the negative feedback control circuit.

The above-mentioned impedance matching circuit further includes a reference voltage generator for generating a voltage signal and outputting it to the multiplexer.

In the impedance matching circuit with adjustable resistance, the first transistor is a PMOS, and the second transistor is a PMOS.

In order to achieve the above and other objects, the present invention proposes another impedance matching circuit with adjustable resistance, which is used for impedance matching between a cable and a receiver for data transmission, and the impedance matching circuit includes a A first transistor, a second transistor, a resistor and a negative feedback control circuit (which may be an operational amplifier, a differential amplifier, or an inverting amplifier). The first transistor has a power supply terminal, a control terminal and a load terminal, the power supply terminal of the first transistor is connected to an input terminal of the receiver, and the load terminal of the first transistor is grounded. One end of the resistor is connected to a voltage source. The second transistor has a power supply end, a control end and a load end, the power supply end of the second transistor is connected to the other end of the resistor, the control end of the second transistor is connected to the control end of the first transistor, and the load end of the second transistor grounded. An inverting input terminal of the negative feedback control circuit receives an adjustable reference voltage, a non-inverting input terminal of the negative feedback control circuit is connected to the power supply terminal of the second transistor, and an output terminal of the negative feedback control circuit is connected to the second transistor the control terminal. When the characteristic impedance of the cable changes, by adjusting the reference voltage, the resistance value of the equivalent resistance of the impedance matching circuit can be equal to the characteristic impedance after changing the cable.

The above-mentioned impedance matching circuit with adjustable resistance further includes a multiplexer. The multiplexer has a selection terminal and a signal output terminal. The multiplexer receives at least one voltage signal of different magnitudes, and after selecting one of the voltage signals according to a selection signal received by the selection terminal, The output is used as the reference voltage to the inverting input terminal of the negative feedback control circuit.

The above-mentioned impedance matching circuit with adjustable resistance further includes a reference voltage generator for generating the above-mentioned voltage signal and outputting it to the multiplexer.

In the impedance matching circuit with adjustable resistance, the first transistor is an NMOS, and the second transistor is a lower NMOS.

Therefore the feature of the present invention is to provide a kind of impedance matching circuit with adjustable resistance, in addition to utilizing the negative feedback control circuit, transistor and resistance to make the cable and the input end of the receiver reach the purpose of impedance matching, and when the characteristic impedance of the cable changes When, the reference voltage generator and the multiplexer in the impedance matching circuit with adjustable resistance generate different reference voltages, the purpose of impedance matching can still be achieved between the cable and the input end of the receiver.

Description of drawings

Fig. 1 is a schematic diagram of a data transmission system;

2A to 2D are common impedance matching circuit diagrams;

Fig. 3 is another common impedance matching circuit diagram;

Fig. 4 is the impedance matching circuit diagram of the present invention;

FIG. 5 is another impedance matching circuit diagram of the present invention.

10: Teleporter

12, 208, 218, 228, 238, 404, 504: Receiver

14, 202, 212, 222, 232, 402, 502: cables

204, 214: Fixed resistance R _Φ

206, 216, 226, 236, 418, 518: input impedance Z _in

224, 406, 408: PMOS

225, 235: Feedback control circuit

227, 237: precision resistor R _ext

234, 506, 508: NMOS

302: Resistance Rcur

304: transistor mib

306: transistor mdrz

308: Transistor mb7

310: transistor mdlz

312: transistor mdrz

314: Transistor ma7

316: transistor mdli

318: Transistor muri

320: transistor mulz

322: transistor muli

324: transistor murz

326: Transistor ma1

328: Transistor ma2

330: Transistor ma3

332: Transistor ma4

334: Transistor ma5

336: transistor mna2

338: Transistor mna1

340: capacitance mca

342: Transistor mb1

344: transistor mb2

346: transistor mb3

348: transistor mb4

350: transistor mb5

352: transistor mz0

354: capacitance mcb

356: transistor mnb2

358, 410, 510: resistor Rext

360: transistor mlp1

362: transistor mlp2

364: transistor mnx

400, 500: impedance matching circuit

412, 512: Operational amplifiers

414, 514: multiplexer

416, 516: reference voltage generator

Detailed ways

first embodiment

Fig. 4 is an impedance matching circuit diagram of the present invention. In FIG. 4 , an impedance matching circuit 400 with adjustable resistance is used for impedance matching between a cable 402 and a receiver 404 for data transmission. Wherein, the components of the impedance matching circuit 400 are described as follows:

The source of the PMOS 406 is connected to the voltage source Vdd, and the drain of the PMOS 406 is connected to the input of the receiver 404 . The source of PMOS 408 is connected to the voltage source Vdd, and the gate of PMOS 408 is connected to the gate of PMOS 406 . One end of the resistor Rext 410 is connected to the drain of the PMOS 408, and the other end of the resistor Rext 410 is grounded. The inverting input terminal of the operational amplifier 412 receives a reference voltage Vref, the non-inverting input terminal of the operational amplifier 412 is connected to the drain of the PMOS 408 , and the output terminal of the operational amplifier 412 is connected to the gate of the PMOS 408 . The selection terminal of the multiplexer 414 receives a selection signal SEL, and the signal output terminal of the multiplexer 414 outputs the reference voltage Vref to the inverting input terminal of the operational amplifier 412 . And, the reference voltage generator 416 has several voltage output terminals for outputting different reference voltages Vref to the signal input terminals of the multiplexer 414 .

In FIG. 4 , the reference voltage at the inverting input terminal of the operational amplifier 412 is Vref=α·Vdd, where 0<α≦1. A negative feedback system is formed by PMOS 406, PMOS 408 and resistor Rext 410. According to the virtual short circuit theory of operational amplifiers, Vref=α·Vdd=Vext can be obtained, and the voltage Vext is the drain of PMOS 408 and resistor Rext410 voltage between. Assuming that the equivalent impedance seen from the drain of PMOS 408 is Req, the voltage can be derived $\mathrm{Vext}=\frac{\mathrm{Rext}}{\mathrm{Rext}+\mathrm{req}}\&Center\; Dot;\mathrm{Vdd}.$ so you can get $\mathrm{\&alpha;}=\frac{\mathrm{Rext}}{\mathrm{Rext}+\mathrm{req}},$ So the equivalent impedance $\mathrm{req}=\frac{1-\mathrm{\&alpha;}}{\mathrm{\&alpha;}}\&Center\; Dot;\mathrm{Rext}.$

Assume that the chip size of PMOS 406 is The die size of the PMOS 408 is And the chip size of PMOS 406 Die size with PMOS 408 The scale is fixed at x, so ${\left(\frac{W}{l}\right)}_{\mathrm{<figure-callout\; id="1"\; label="P"\; filenames="C0113446500231.png"\; state="\{\{state\}\}">P</figure-callout>}1}=x\&Center\; Dot;{\left(\frac{w}{l}\right)}_{P2}.$ Assuming that the equivalent impedance seen from the drain of PMOS 406 is R _Φ , since

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; \&Phi;</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; \&mu;</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; OX</span>}}<span\; class="notranslate">\; \&CenterDot;</span>{<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}}{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; )</span>}_{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="P"\; filenames="C0113446500231.png"\; state="\{\{state\}\}">P</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; sg</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; tP</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; )</span>}$

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; eq</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; \&mu;</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; OX</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}}{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; )</span>}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; sg</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; tP</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; )</span>}$

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="V\; sg"\; filenames="C0113446500231.png"\; state="\{\{state\}\}">V</figure-callout></span><figure-callout\; id="1"\; label="V\; sg"\; filenames="C0113446500231.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; sg</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}$

$<span\; class="notranslate">\; \&DoubleRightArrow;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; \&Phi;</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; x</span>}}\mathrm{<span\; class="notranslate">\; req</span>}$

$<span\; class="notranslate">\; \&DoubleRightArrow;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; \&Phi;</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}\mathrm{<span\; class="notranslate">\; Rext</span>}$

Among them, μ _P is the carrier mobility, C _OX is the capacitance per unit area of the gate, V _sg1 and V _sg2 are the voltage drop between the source and the gate, |V _tP | is the threshold voltage (thresholdvoltage ).

Therefore, when the input resistance Z _in 418 seen by the input of the receiver 404 is very large, the equivalent impedance R _Φ formed by the impedance matching circuit 400 and the input impedance Z _in 418 of the receiver 404 are connected in parallel and the resistance value is approximately Based on the resistance of the equivalent impedance R _Φ of the impedance matching circuit 400, and make the resistance of the equivalent impedance R _Φ equal to the resistance of the characteristic impedance Z _Φ of the cable 402 to achieve the purpose of impedance matching.

If the resistance value of the characteristic impedance _ZΦ of the cable 402 changes, the multiplexer 414 in the impedance matching circuit 400 outputs different reference voltages Vref to the inverting input of the operational amplifier 412, when the inverting input of the operational amplifier 412 is adjusted The reference voltage Vref at the phase input terminal is to adjust the value of α. When the value of α is adjusted, the value of the impedance Req is adjusted. When the value of the impedance Req is adjusted, the value of the equivalent impedance R _Φ is adjusted, so that the impedance matching circuit 400 changes the equivalent impedance The resistance value of R _Φ is equal to the resistance value of the changed characteristic impedance Z _Φ of the cable 402 . Therefore, when the resistance value of the characteristic impedance Z _Φ of the cable 402 changes, the appropriate reference voltage Vref of the reference voltage generator 416 is selected by the multiplexer 414 to change the resistance value of the equivalent impedance R _Φ of the impedance matching circuit 400 , so that the resistance value of the equivalent impedance R _Φ is equal to the resistance value of the characteristic impedance Z _Φ of the cable 402 , so as to achieve the purpose of impedance matching.

second embodiment

FIG. 5 is another impedance matching circuit diagram of the present invention. In FIG. 5 , an impedance matching circuit 500 with adjustable resistance is used for impedance matching between a cable 502 and a receiver 504 for data transmission. Wherein, the components of the impedance matching circuit 500 are described as follows:

The source of the NMOS 506 is grounded and the drain of the NMOS 506 is connected to the input of the receiver 504 . The source of NMOS 508 is grounded and the gate of NMOS 508 is connected to the gate of NMOS 506 . One end of the resistor Rext 510 is connected to the drain of the NMOS 508, and the other end of the resistor Rext 510 is connected to the voltage source Vdd. The inverting input terminal of the operational amplifier 512 receives a reference voltage Vref, the non-inverting input terminal of the operational amplifier 512 is connected to the drain of the NMOS 508 , and the output terminal of the operational amplifier 512 is connected to the gate of the NMOS 508 . The selection terminal of the multiplexer 514 receives a selection signal SEL, and the signal output terminal of the multiplexer 514 outputs the reference voltage Vref to the inverting input terminal of the operational amplifier 512 . And, the reference voltage generator 516 has several voltage output terminals for outputting different reference voltages Vref to the signal input terminals of the multiplexer 514 .

In FIG. 5 , the reference voltage at the inverting input terminal of the operational amplifier 512 is Vref=β·Vdd, where 0<β≦1. A negative feedback system is formed by NMOS 506, NMOS 508 and resistor Rext 510. According to the virtual short circuit theory of operational amplifiers, Vref=β·Vdd=Vext can be obtained, and the voltage Vext is the voltage between the drain of NMOS 508 and resistor Rext 510 . Assuming that the equivalent impedance seen from the drain of NMOS 508 is Req, the voltage can be derived $\mathrm{Vext}=\frac{\mathrm{Rext}}{\mathrm{Rext}+\mathrm{req}}\&Center\; Dot;\mathrm{Vdd}.$ so you can get $\mathrm{\&beta;}=\frac{\mathrm{Rext}}{\mathrm{Rext}+\mathrm{req}},$ So the equivalent impedance $\mathrm{req}=\frac{1-\mathrm{\&beta;}}{\mathrm{\&beta;}}\&Center\; Dot;\mathrm{Rext}.$

而且NMOS 506的芯片尺寸 与PMOS 408的芯片尺寸的比例是固定为y，所以 ${\left(\frac{W}{l}\right)}_{n1}=y\&CenterDot;{\left(\frac{w}{l}\right)}_{n2}.$ 假设从NMOS 506的漏极看进去的等效阻抗为R_Φ，由于Suppose the chip size of NMOS 506 is The chip size of NMOS 508 is

And the chip size of NMOS 506 Die size with PMOS 408 The scale of is fixed for y, so ${\left(\frac{W}{l}\right)}_{\mathrm{no}1}=\mathrm{the\; y}\&CenterDot;{\left(\frac{w}{l}\right)}_{\mathrm{no}2}.$ Assuming that the equivalent impedance seen from the drain of NMOS 506 is R _Φ , since

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; \&Phi;</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; \&mu;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; OX</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}}{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; )</span>}_{\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; gs</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; tn</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; )</span>}$

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; eq</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; \&mu;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; OX</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; W</span>}}{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; )</span>}_{\mathrm{<span\; class="notranslate">\; no</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; gs</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; tn</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; )</span>}$

${\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="V\; gs"\; filenames="C0113446500231.png"\; state="\{\{state\}\}">V</figure-callout></span><figure-callout\; id="1"\; label="V\; gs"\; filenames="C0113446500231.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; gs</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}$

$<span\; class="notranslate">\; \&DoubleRightArrow;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; \&Phi;</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}\mathrm{<span\; class="notranslate">\; req</span>}$

$<span\; class="notranslate">\; \&DoubleRightArrow;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; \&Phi;</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; \&CenterDot;</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&beta;</span>}}{\mathrm{<span\; class="notranslate">\; \&beta;</span>}}\mathrm{<span\; class="notranslate">\; Rext</span>}$

Among them, μ _n is the carrier mobility, V _gs1 and V _gs2 are the voltage drop between the source and the gate, and |V _tn | is the critical voltage.

Therefore, when the input resistance Z _in 518 seen by the input end of the receiver 504 is very large, the resistance value of the equivalent impedance R _Φ formed by the impedance matching circuit 500 and the input impedance Z _in 518 of the receiver 504 in parallel is approximately Based on the resistance of the equivalent impedance R _Φ of the impedance matching circuit 500, and make the resistance of the equivalent impedance R _Φ equal to the resistance of the characteristic impedance Z _Φ of the cable 502 to achieve the purpose of impedance matching.

If the resistance value of the characteristic impedance _ZΦ of the cable 502 changes, the multiplexer 514 in the impedance matching circuit 500 outputs different reference voltages Vref to the inverting input terminal of the operational amplifier 512, when the inverting input terminal of the operational amplifier 512 is adjusted, The reference voltage Vref at the input terminal of the phase is to adjust the value of β. When the value of β is adjusted, the value of the impedance Req is adjusted. When the value of the impedance Req is adjusted, the value of the equivalent impedance R _Φ is adjusted, so that the impedance matching circuit 500 changes the equivalent impedance The resistance value of R _Φ is equal to the resistance value of the changed characteristic impedance Z _Φ of the cable 502 . Therefore, when the resistance value of the characteristic impedance Z _Φ of the cable 502 changes, the appropriate reference voltage Vref of the reference voltage generator 516 is selected by the multiplexer 514 to change the resistance value of the equivalent impedance R _Φ of the impedance matching circuit 500 , so that the resistance value of the equivalent impedance R _Φ is equal to the resistance value of the characteristic impedance Z _Φ of the cable 502, so as to achieve the purpose of impedance matching.

Therefore, the present invention provides an impedance matching circuit with adjustable resistance. In addition to using operational amplifiers, transistors and resistors to achieve impedance matching between the cable and the input end of the receiver, and when the characteristic impedance of the cable changes, it can The reference voltage generator and the multiplexer in the impedance matching circuit with adjustable resistance can generate different reference voltages, which can still achieve the purpose of impedance matching between the cable and the input end of the receiver.

Claims (12)

1, a kind of impedance matching circuit, this impedance matching circuit are used for the impedance matching between a cable and the receiver, it is characterized in that, this impedance matching circuit comprises:

One the first transistor, this first transistor have a power end, a control end and a load end, and the power end of this first transistor is connected to a voltage source, and the load end of this first transistor is connected to an input of this receiver;

One transistor seconds, this transistor seconds have a power end, a control end and a load end, and the power end of this transistor seconds is connected to this voltage source, and the control end of this transistor seconds is connected to the control end of this first transistor;

One resistance, an end of this resistance is connected to the load end of this transistor seconds, the other end ground connection of this resistance; And

One negative feedback control circuit, one inverting input of this negative feedback control circuit receives an adjustable reference voltage, one non-inverting input of this negative feedback control circuit is connected to this load end of this transistor seconds, and an output of this negative feedback control circuit is connected to this control end of this transistor seconds;

Wherein, by adjusting this reference voltage, the resistance of the equivalent resistance of this impedance matching circuit is equated with the characteristic impedance of this cable.

2, impedance matching circuit as claimed in claim 1 is characterized in that, this first transistor is a PMOS.

3, impedance matching circuit as claimed in claim 1 is characterized in that, this transistor seconds is a PMOS.

4, impedance matching circuit as claimed in claim 1, it is characterized in that, this circuit more comprises a multiplexer, this multiplexer has a selecting side, a signal output part, this multiplexer receives the voltage signal of at least one different sizes values, and according to one selecting signal by this selecting side receives, select these at least one different sizes values voltage signal one of them as this reference voltage, export the inverting input of this reference voltage to this negative feedback control circuit.

5, impedance matching circuit as claimed in claim 4 is characterized in that, more comprises a reference voltage generator, in order to the voltage signal that produces these at least one different sizes values and export this multiplexer to.

6, impedance matching circuit as claimed in claim 1 is characterized in that, this negative feedback control circuit is an operational amplifier or is a differential amplifier or is a sign-changing amplifier.

7, a kind of impedance matching circuit, this impedance matching circuit are used for the impedance matching between a cable and the receiver, it is characterized in that, this impedance matching circuit comprises:

One the first transistor, this first transistor have a power end, a control end and a load end, and the power end of this first transistor is connected to an input of this receiver, the load end ground connection of this first transistor;

One resistance, an end of this resistance is connected to a voltage source;

One transistor seconds, this transistor seconds has a power end, a control end and a load end, the power end of this transistor seconds is connected to the other end of this resistance, and the control end of this transistor seconds is connected to the control end of this first transistor, the load end ground connection of this transistor seconds; And

One negative feedback control circuit, one inverting input of this negative feedback control circuit receives an adjustable reference voltage, one non-inverting input of this negative feedback control circuit is connected to the power end of this transistor seconds, and an output of this negative feedback control circuit is connected to the control end of this transistor seconds;

Wherein, by adjusting this reference voltage, the resistance of the equivalent resistance of this impedance matching circuit is equated with the characteristic impedance of this cable.

8, impedance matching circuit as claimed in claim 7 is characterized in that, this first transistor is a NMOS.

9, impedance matching circuit as claimed in claim 7 is characterized in that, this transistor seconds is a NMOS.

10, impedance matching circuit as claimed in claim 7, it is characterized in that, more comprise a multiplexer, this multiplexer has a selecting side, a signal output part, this multiplexer receives the voltage signal of at least one different sizes values, and according to one selecting signal by this selecting side receives, select these at least one different sizes values voltage signal one of them as this reference voltage, export the inverting input of this reference voltage to this negative feedback control circuit.

11, impedance matching circuit as claimed in claim 7 is characterized in that, more comprises a reference voltage generator, in order to the voltage signal that produces these at least one different sizes values and export this multiplexer to.

12, impedance matching circuit as claimed in claim 7 is characterized in that, this negative feedback control circuit is an operational amplifier or is a differential amplifier or is a sign-changing amplifier.

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