CN1248183C - Driving method of plasma display - Google Patents
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Abstract
公开一种驱动等离子体显示器的方法,该等离子体显示器至少包含一第一电极以及一第二电极,该驱动方法包含以下步骤。首先,在第一电极输入一第一电压V1。接着,在一第一时段内,在第二电极输入一第二电压V2,该第二电压大于该第一电压,使第一电极与第二电极的电压差为一第一压差D2,且该第二电压差D1为V2-V1。之后,在一第二时段内,在第二电极输入一第三电压V3,第三电压小于第一电压,使第一电极与第二电极的电压差为一第二电压差D2,且该第二电压差D2为V3-V1。
A method for driving a plasma display is disclosed. The plasma display comprises at least a first electrode and a second electrode. The driving method comprises the following steps. First, a first voltage V1 is input to the first electrode. Then, in a first time period, a second voltage V2 is input to the second electrode. The second voltage is greater than the first voltage, so that the voltage difference between the first electrode and the second electrode is a first voltage difference D2, and the second voltage difference D1 is V2-V1. Afterwards, in a second time period, a third voltage V3 is input to the second electrode. The third voltage is less than the first voltage, so that the voltage difference between the first electrode and the second electrode is a second voltage difference D2, and the second voltage difference D2 is V3-V1.
Description
发明的领域Field of Invention
本发明提供一种维持阶段驱动等离子体显示器的方法,特别是指一种可精简电路元件的维持阶段驱动等离子体显示器的方法。The invention provides a method for driving a plasma display in a sustaining phase, in particular a method for driving a plasma display in a sustaining phase which can simplify circuit elements.
背景说明Background Note
等离子体显示器(plasma display panel)的尺寸大而薄,而且没有幅射线,因此是未来大尺寸显示器的主流。等离子体显示器中包含有排成阵列(matrix)的多个等离子体显示单元,其中并密封有惰性气体。等离子体显示器是由一驱动电路按照一定的驱动程序(driving sequence)来驱动这些等离子体显示单元,以使其中的惰性气体激发电离而放电发光。等离子体显示器的电路特性约略可等效视为一个电容性的负载,其驱动原理是提供电流以对此电容充电,并借助在电容两端施加高压高频的交流电,使等离子体显示单元中等离子体的电荷来回驱动,在驱动的过程中放出紫外线来激发器壁上的萤光剂而发出光线。Plasma display panel (plasma display panel) is large and thin, and has no radiation, so it will be the mainstream of large-size displays in the future. A plasma display includes a plurality of plasma display units arranged in a matrix, and an inert gas is sealed therein. The plasma display is driven by a driving circuit according to a certain driving sequence (driving sequence), so that the inert gas in it is excited and ionized to discharge and emit light. The circuit characteristics of the plasma display can be roughly regarded as a capacitive load. The driving principle is to provide current to charge the capacitor, and to apply high-voltage and high-frequency alternating current across the capacitor to make the plasma in the plasma display unit The charge of the body is driven back and forth, and ultraviolet rays are emitted during the driving process to excite the fluorescent agent on the wall of the device to emit light.
请参阅图1,图1为公知等离子体显示器10的示意图。公知等离子体显示器10包含有平行安装的后板12以及透明前板14。前板14的下侧设有多个维持电极对(electrode pair)16,每一维持电极对16包含有二维持电极18、19,且每一维持电极18、19皆为固定宽度的长条形。一介电层20设在前板14的下侧并覆盖维持电极对16,用于提供交流驱动时所需的电容以防止电击穿(Electric Breakdown)。一保护层22设在介电层20的下侧,通常由氧化镁(MgO)构成,用于保护介电层20不受等离子体的溅射(sputtering)而造成劣化。后板12上设有多个阻隔壁((rib)24,多个数据电极(data electrode)26,以及蓝色、红色与绿色萤光体(phosphor)30B、30R、30G依序地填入阻隔壁24之间。每二相邻的阻隔壁24之间充填有放电气体。多个阻隔壁24可以使阻隔壁24二边的等离子体无法相互流过干扰。Please refer to FIG. 1 , which is a schematic diagram of a conventional plasma display 10 . The conventional plasma display 10 includes a rear panel 12 and a transparent front panel 14 installed in parallel. The lower side of the front plate 14 is provided with a plurality of sustaining electrode pairs (electrode pair) 16, each sustaining electrode pair 16 includes two sustaining electrodes 18, 19, and each sustaining electrode 18, 19 is a long strip with a fixed width. . A dielectric layer 20 is disposed on the lower side of the front plate 14 and covers the pair of sustain electrodes 16 for providing capacitance required for AC driving to prevent electric breakdown. A protective layer 22 is disposed on the lower side of the dielectric layer 20 and is usually made of magnesium oxide (MgO) for protecting the dielectric layer 20 from degradation caused by plasma sputtering. The rear plate 12 is provided with a plurality of barrier ribs (rib) 24, a plurality of data electrodes (data electrode) 26, and blue, red and green phosphors (phosphor) 30B, 30R, 30G are sequentially filled into the barrier ribs. Between the walls 24. Discharge gas is filled between every two adjacent barrier walls 24. A plurality of barrier walls 24 can prevent the plasma on the two sides of the barrier walls 24 from flowing and interfering with each other.
等离子体显示器10的维持电极18、19又称X、Y维持电极(X,Y sustainelectrode)。X、Y维持电极18、19为一较宽且接近透明的导体,通常由氧化铟锡(indium tin oxide,ITO)所制成,用于引发并维持放电。X、Y维持电极18、19另各包含有一个辅助电极(bus electrode)36、38设置在其下侧。辅助电极36、38是一较细且不透明的金属导线,通常由铬-铜-铬三层金属所制成,用于辅助X、Y维持电极18、19引发放电,并降低X、Y维持电极18、19的阻值。The sustain electrodes 18 and 19 of the plasma display 10 are also called X and Y sustain electrodes (X, Y sustain electrode). The X and Y sustain electrodes 18 and 19 are wide and nearly transparent conductors, usually made of indium tin oxide (ITO), for initiating and sustaining discharges. The X and Y sustain electrodes 18, 19 each include an auxiliary electrode (bus electrode) 36, 38 disposed on the lower side thereof. Auxiliary electrodes 36, 38 are thin and opaque metal wires, usually made of chromium-copper-chromium three-layer metal, used to assist X, Y sustain electrodes 18, 19 to initiate discharge, and lower X, Y sustain electrodes 18, 19 resistance.
如图1所示,每二阻隔壁24与维持电极对16限定一个次像素单元(sub-pixel unit)32B、32R、或32G。三个次像素单元32B、32R、32G组成一像素单元(pixel unit)34。次像素单元32B、32R、32G以及像素单元34为图1所示虚线下方所含括的区域。当施加一驱动电压在各次像素单元32B、32R、32G中的X、Y维持电极18、19以及数据电极26之间时,将形成一电场,引发电离气体放电产生紫外线,并照射萤光体30B、30R、或30G而发光。As shown in FIG. 1 , every pair of barrier ribs 24 and sustain electrodes 16 defines a sub-pixel unit 32B, 32R, or 32G. Three sub-pixel units 32B, 32R, 32G form a pixel unit (pixel unit) 34 . The sub-pixel units 32B, 32R, 32G and the pixel unit 34 are the areas included below the dotted line shown in FIG. 1 . When a driving voltage is applied between the X, Y sustain electrodes 18, 19 and data electrodes 26 in each sub-pixel unit 32B, 32R, 32G, an electric field will be formed, which will cause ionized gas discharge to generate ultraviolet rays, and irradiate the phosphor 30B, 30R, or 30G to emit light.
请参考图2,图2为图1所示的等离子体显示器10的驱动程序时序图。公知的等离子体显示器中,每一像素单元均以一预定的正常驱动程序施加一连串的驱动脉冲,以形成一组图像显示脉冲,最后达成显示图像的目的。以图1所示的像素单元34为例,正常驱动程序通常可分为下列几个阶段:(a)重置阶段(reset period),(b)定址阶段(address period),(c)维持阶段(sustain period)。当像素单元34处于重置阶段时,在X、Y维持电极18、19上施加一电压,在这个阶段的目的主要让维持电极表面的壁电荷(wall charge)的状态一致,以便在后续的定址阶段可将图像数据正确写入预定地址,并在维持阶段使等离子体显示单元中惰性气体激发电离而放电发光来显示图像。此时因惰性气体产生电离现象,而使得等离子体显示器的像素单元处于稳定易于激发的状态。公知定址阶段与维持阶段的驱动方法已为本技术领域的技术人员所公知,在此不再赘述。重复上述正常驱动程序中的各阶段,为使得等离子体显示器的各像素单元接受不同图像显示脉冲的驱动,于是使用者就可以看到相对应的图像画面呈现在等离子体显示器的显示面板上。举例来说,公知等离子体显示器在维持阶段时的驱动方法是在美国专利案号第4866349号“power efficient sustain driversand address drivers for plasms panel”中所公开,其分别对X、Y维持电极18、19施加脉冲以驱动惰性气体激发电离而放电发光。Please refer to FIG. 2 , which is a timing diagram of the driving program of the plasma display 10 shown in FIG. 1 . In a known plasma display, a series of driving pulses are applied to each pixel unit according to a predetermined normal driving program to form a group of image display pulses, and finally achieve the purpose of displaying images. Taking the pixel unit 34 shown in FIG. 1 as an example, the normal driving program can usually be divided into the following stages: (a) reset period (reset period), (b) address period (address period), (c) maintenance period (sustain period). When the pixel unit 34 is in the reset phase, a voltage is applied to the X and Y sustain electrodes 18, 19. The purpose of this phase is to keep the states of the wall charges (wall charge) on the surface of the sustain electrodes consistent, so that in the subsequent addressing The image data can be correctly written into the predetermined address in the stage, and the inert gas in the plasma display unit is excited and ionized to discharge and emit light in the sustain stage to display the image. At this time, due to the ionization phenomenon generated by the inert gas, the pixel unit of the plasma display is in a stable and easy-to-excite state. The driving methods of the conventional addressing phase and the sustaining phase are well known to those skilled in the art and will not be repeated here. Each stage in the above-mentioned normal driving procedure is repeated, so that each pixel unit of the plasma display is driven by different image display pulses, so that the user can see the corresponding image frame presented on the display panel of the plasma display. For example, the known driving method of a plasma display in the maintenance phase is disclosed in US Pat. No. 4,866,349 "power efficient sustainable drivers and address drivers for plasmas panel", which respectively maintain the X and Y electrodes 18, 19 A pulse is applied to drive the inert gas to stimulate ionization and discharge to emit light.
请参阅图3,图3为图1所示的等离子体显示器10的驱动电路40示意图。驱动电路40包含有电容C1、C2、Cp,电感L1、L2,开关Q1、Q2、Q3、Q4、Q5、Q6,以及一电压源Vs(输出电压为V伏特)。请注意,由于等离子体显示器10包含有一介电层20设置在后板12与透明前板14之间,因此维持电极18、19之间所造成的电路特性可视为一该电容Cp。当开关Q2导通(on)时,电压源Vs可经由开关Q2将电流输入电容Cp,然而当开关Q2非导通(off)时,电压源Vs则无法经由开关Q2将电流输入电容Cp。电容Cp的两端点X、Y分别连接在维持电极18及维持电极19,而电容C1、C2、Cp与电感L1、L2形成一谐振电路(resonant circuit)而使电容Cp两端点X、Y的电压产生振荡变化,因此驱动电路40可经由改变电容Cp两端点X、Y的电压而同时改变输入X维持电极18及Y维持电极19的电压。此外,依据谐振电路的特性,电容C1、C2两端的电压差等于电压源Vs输出电压的一半,即是1/2V伏特,假如电容C1、C2两端的电压差不等于电压源Vs输出电压的一半,则在谐振电路运行的过程中造成能量变化,其原因详述于后。Please refer to FIG. 3 . FIG. 3 is a schematic diagram of the
请参阅图3及图4,图4为图3所示的等离子体显示器10在维持阶段的时序图。当公知等离子体显示器10进入维持阶段前,各个开关Q1、Q2、Q3、Q4、Q5、Q6皆为非导通状态,而且电容C1、C2两端的电压差为1/2V,此时电容Cp两端的电压差为0。然后,开关Q1、Q5导通而使端点X的电压由0振荡至V(以1/2V为转折点)。接着开关Q1关断、开关Q2导通且开关Q5维持导通,使端点X的电压保持在V。然后开关Q1导通、开关Q2关断且开关Q5维持导通,使端点X的电压由V振荡至0(以1/2V为转折点),此时端点X已产生一脉冲。接着开关Q5关断且开关Q3、Q6导通,则端点Y的电压由0振荡至V(以1/2V为转折点)。然后开关Q6关断,开关Q4导通且开关Q3维持导通,使端点Y的电压保持在V。接着开关Q4关断、开关Q6导通且开关Q3维持导通,则端点V的电压由V振荡至0(以1/2V为转折点)。最后开关Q3、Q6关断,而此时端点Y已产生一脉冲。假如电容C1两端的电压差小于1/2V,当晶体管Q1、Q5导通使端点X的电压上升时,驱动电路的电压小于1/2V(由电容C1提供),然后,当开关Q1、Q5导通使端点X的电压下降时,驱动电路的电压大于1/2V(由电压源Vs与电容C1的电压差提供),因此对电容C1而言,其流出能量小于流入能量。相反地,假如电容C1两端的电压差大于1/2V,则其流出能量大于流入能量。因此为了保持稳定状态,电容C1两端的电压差必须等于1/2V,同理,电容C2呈现稳定状态时,其两端的电压差亦等于1/2V。以驱动电路40提供维持电极18、19所需的脉冲时,为了分别对维持电极18及维持电极19产生一电压由0振荡至V后再由V振荡至0的脉冲,公知等离子体显示器10必须分别为维持电极18及维持电极19设计一谐振电路来驱动,因此必须使用较多的电路元件,例如电容、电感、晶体管,所以造成生产成本不易降低。Please refer to FIG. 3 and FIG. 4 . FIG. 4 is a timing diagram of the plasma display 10 shown in FIG. 3 in the sustain phase. Before the known plasma display 10 enters the maintenance phase, each switch Q1, Q2, Q3, Q4, Q5, and Q6 is in a non-conducting state, and the voltage difference between the capacitors C1 and C2 is 1/2V. At this time, the capacitor Cp is two The voltage difference across the terminals is 0. Then, the switches Q1 and Q5 are turned on so that the voltage at the terminal X oscillates from 0 to V (with 1/2V as the turning point). Then the switch Q1 is turned off, the switch Q2 is turned on and the switch Q5 is kept on, so that the voltage of the terminal X is kept at V. Then the switch Q1 is turned on, the switch Q2 is turned off, and the switch Q5 is kept on, so that the voltage of the terminal X oscillates from V to 0 (with 1/2V as the turning point), and at this time the terminal X has generated a pulse. Then the switch Q5 is turned off and the switches Q3 and Q6 are turned on, then the voltage of the terminal Y oscillates from 0 to V (with 1/2V as the turning point). Then the switch Q6 is turned off, the switch Q4 is turned on and the switch Q3 is kept on, so that the voltage of the terminal Y is kept at V. Then the switch Q4 is turned off, the switch Q6 is turned on and the switch Q3 is kept on, so the voltage of the terminal V oscillates from V to 0 (1/2V is the turning point). Finally, the switches Q3 and Q6 are turned off, and the terminal Y has generated a pulse at this time. If the voltage difference between the two ends of the capacitor C1 is less than 1/2V, when the transistors Q1 and Q5 are turned on to increase the voltage of the terminal X, the voltage of the driving circuit is less than 1/2V (provided by the capacitor C1), and then, when the switches Q1 and Q5 are turned on When the voltage of the terminal X drops, the voltage of the driving circuit is greater than 1/2V (provided by the voltage difference between the voltage source Vs and the capacitor C1), so the outflow energy of the capacitor C1 is less than the inflow energy. Conversely, if the voltage difference across the capacitor C1 is greater than 1/2V, its outgoing energy is greater than its incoming energy. Therefore, in order to maintain a stable state, the voltage difference between the two ends of the capacitor C1 must be equal to 1/2V. Similarly, when the capacitor C2 is in a stable state, the voltage difference between its two ends is also equal to 1/2V. When the
发明内容Contents of Invention
因此本发明的主要目的是提供一种精简电路元件的驱动等离子体显示器的方法,可降低生产成本。Therefore, the main purpose of the present invention is to provide a method for driving a plasma display with simplified circuit elements, which can reduce production costs.
本发明有关一种驱动等离子体显示器的方法。该等离子体显示器至少包含一第一电极以及一第二电极,该驱动方法包含以下步骤。首先,在第一电极输入一第一电压V1。接着,在一第一时段内,在第二电极输入一第二电压V2,该第二电压大于该第一电压,使第一电极与第二电极的电压差为一第一电压差D1,且该第一电压差D1为V2-V1。之后,在一第二时段内,在第二电极输入一第三电压V3,第三电压小于第一电压,使第一电极与第二电极的电压差为一第二电压差D2,且该第二电压差D2为V3-V1。The invention relates to a method for driving a plasma display. The plasma display at least includes a first electrode and a second electrode, and the driving method includes the following steps. First, a first voltage V1 is input to the first electrode. Then, within a first period of time, a second voltage V2 is input to the second electrode, the second voltage is greater than the first voltage, so that the voltage difference between the first electrode and the second electrode is a first voltage difference D1, and The first voltage difference D1 is V2-V1. Afterwards, within a second period of time, a third voltage V3 is input to the second electrode, the third voltage is lower than the first voltage, so that the voltage difference between the first electrode and the second electrode is a second voltage difference D2, and the first electrode The voltage difference D2 is V3-V1.
附图说明Description of drawings
图1为公知等离子体显示器的示意图。FIG. 1 is a schematic diagram of a conventional plasma display.
图2为图1所示的等离子体显示器的驱动程序时序图。FIG. 2 is a timing diagram of a driving program of the plasma display shown in FIG. 1 .
图3为图1所示的等离子体显示器的驱动电路示意图。FIG. 3 is a schematic diagram of a driving circuit of the plasma display shown in FIG. 1 .
图4为图1所示的等离子体显示器在维持阶段的时序图。FIG. 4 is a timing diagram of the sustain phase of the plasma display shown in FIG. 1 .
图5为本发明第一种等离子体显示器的驱动电路的示意图。FIG. 5 is a schematic diagram of a driving circuit of the first plasma display of the present invention.
图6为图5所示驱动电路的第一种电路示意图。FIG. 6 is a first circuit schematic diagram of the driving circuit shown in FIG. 5 .
图7为图6所示的驱动电路在维持阶段的时序图。FIG. 7 is a timing diagram of the driving circuit shown in FIG. 6 in a sustain phase.
图8至图9为图6所示的驱动电路的等效电路图。8 to 9 are equivalent circuit diagrams of the driving circuit shown in FIG. 6 .
图10为图5所示驱动电路的第二种电路示意图。FIG. 10 is a second circuit schematic diagram of the driving circuit shown in FIG. 5 .
图11为本发明第二种等离子体显示器的驱动电路的示意图。FIG. 11 is a schematic diagram of a driving circuit of a second plasma display according to the present invention.
图12为本发明第三种等离子体显示器的驱动电路的示意图。FIG. 12 is a schematic diagram of a driving circuit of a third plasma display according to the present invention.
图13为本发明第四种等离子体显示器的驱动电路的示意图。FIG. 13 is a schematic diagram of a driving circuit of a fourth plasma display according to the present invention.
图14为本发明第五种等离子体显示器的驱动电路的示意图。FIG. 14 is a schematic diagram of a driving circuit of a fifth plasma display according to the present invention.
图15为本发明第六种等离子体显示器的驱动电路的示意图。FIG. 15 is a schematic diagram of a driving circuit of a sixth plasma display according to the present invention.
图16为图15的驱动电路的时序图。FIG. 16 is a timing diagram of the driving circuit of FIG. 15 .
附图的符号说明Explanation of the symbols in the attached drawings
10 等离子体显示器 12 后板10 Plasma Display 12 Rear Panel
14 前板 16 维持电极对14 Front Plate 16 Sustaining Electrode Pairs
18、19 维持电极 20 介电层18, 19 Sustaining electrode 20 Dielectric layer
22 保护层 24 阻隔壁22 Protective layer 24 Barrier wall
26 数据电极 30G 绿色萤光体26 data electrode 30G green phosphor
30R 红色萤光体 30B 蓝色萤光体30R Red Phosphor 30B Blue Phosphor
32G、32R、32B次像素单元 34 像素单元32G, 32R, 32B sub-pixel unit 34 pixel unit
36、38 辅助电极36, 38 Auxiliary electrodes
40、50、80、92、105、108、112、140 驱动电路40, 50, 80, 92, 105, 108, 112, 140 drive circuit
52、81、93、94、113 电感52, 81, 93, 94, 113 Inductance
54、82、95、126、127、128 电容54, 82, 95, 126, 127, 128 Capacitance
56、58、60、62、83、84、85、86、96、97、98、99、114、56, 58, 60, 62, 83, 84, 85, 86, 96, 97, 98, 99, 114,
115、116、117、118、119、120、121 晶体管115, 116, 117, 118, 119, 120, 121 Transistors
64、66、122、123、124、125、132、133 体二极管64, 66, 122, 123, 124, 125, 132, 133 Body diode
87、88、100、101 二极管87, 88, 100, 101 Diodes
68、70、72、89、90、91、102、103、104、109、110、106、68, 70, 72, 89, 90, 91, 102, 103, 104, 109, 110, 106,
107、129、130、131 电压源107, 129, 130, 131 Voltage source
具体实施方式 Detailed ways
请参阅图5,图5为本发明第一种等离子体显示器的驱动电路50的示意图。驱动电路50包含有一电感L3,电容C,开关S1、S2、S3,以及三个电压源V′、V″、V。为实现图5所显示的驱动电路50,请参阅图6,图6为图5所示的驱动电路50的第一种电路示意图。如图6所示,驱动电路50包含有一电感52,电容54,四个晶体管56、58、60、62,二个二极管64、66,以及三个电压源68、70、72。当一电流流过电感52时,电感52与电容54串接形成一谐振电路,晶体管56、58、60、62则可控制其导通状态而作为开关(switch)以控制电流导通的方向。例如,当晶体管60导通时则电压源68可输出电流经由晶体管60而流入电容54。二极管64、66为晶体管56、58本身结构形成的体二极管(body diode),因此本实施例中利用二极管64、66与晶体管56、58而形成一双向开关(bi-directional switch)可控制电流左右流过的方向。当晶体管56导通时,电感52的输出电流可经由二极管66及晶体管56流入接地端(ground)。同样地,当晶体管58导通时,接地端的输出电流可经由二极管64及晶体管58流入电感52,而电压源68、70、72则提供一稳定电压使驱动电路50运行。电压源72提供一第一电压V1。电压源68提供一第二电压V2,且该第二电压为正电压(V2伏特)。电压源70提供一第三电压V3,且该第三电压为负电压(V3伏特,V3为负值)。此外电压源72提供的第一电压V1施加在维持电极19上,且该第一电压为任何介于第二电压与第三电压之间的电压值(V1伏特,V3<V1<V2)。维持电极18、19之间所造成的电路特性可视为一电容54,所以电容54的端点A为维持电极18,而电容54的端点B为维持电极19。Please refer to FIG. 5 . FIG. 5 is a schematic diagram of a driving
请参阅图7至图9,图7为图6所示的驱动电路50在维持阶段的时序图,图8至图9为图6所示的驱动电路50的等效电路图。假设一开始时,驱动电路50中只有晶体管60导通,所以电容54的端点A的电压为电压源68所提供的第二电压(V2伏特),而电容54的端点B的电压为电压源72所提供的第一电压(V1伏特),因此电容54两端的电位差为第一电压差D1,D1为V2-V1伏特,如图7中第一时段所示。然后,关断晶体管60且导通晶体管56,则电容54与电感52串接,并经由二极管66及晶体管56构成一谐振电路,其等效电路如图8所示,电容54的端点A以接近接地电压0伏特为转折点偏压,由V2-V1伏特向下振荡至-(V2-V1)伏特,所以电容54两端的电压由V2-V1伏特变化至-(V2-V1)伏特,如图7的第三时段所示。然后,关断晶体管56并导通晶体管62,所以电容54的端点A箝位于电压源70所提供的第三电压(V3伏特),因此电容54两端的电位差将变成第二电压差D2,D2为V3-V1伏特(为负值),如图7的第二时段所示。然后,关断晶体管62及导通晶体管58,则电容54与电感52串接,并经由二极管64及晶体管58构成一谐振电路,其等效电路如图9所示,电容54两端的电压由V3-V1伏特变化至-(V3-V1)伏特(为正值),如图7的第四时段所示。之后,关断晶体管58及导通晶体管60,所以电容54的端点A的电压变为电压源68所提供的第二电压(V2伏特),因此电容54两端的电位差保持为V2-V1伏特,如图7的第五时段所示。重复上述步骤,本发明驱动电路50可在电容54的端点A产生一脉冲,虽然电容54的端点B由电压源72维持为第一电压(V1伏特),经由端点A的电压振荡变化可促使维持电极18及维持电极19之间的电压差改变。Please refer to FIG. 7 to FIG. 9 , FIG. 7 is a timing diagram of the driving
请参阅图10,图10为图5所示的驱动电路50的第二种电路示意图。驱动电路80包含有一电感81,一电容82,四个晶体管83、84、85、86,两个二极管87、88,以及三电压源89、90、91。电压源89提供一正电压的第二电压(V2伏特),电压源90提供一负电压的第三电压(V3伏特,V3<0),且电压源91提供任何介于第二电压与第三电压之间的第一电压(V1伏特,V3<V1<V2)。晶体管85为第一开关S1,晶体管86为第二开关S2。此外,二极管87与晶体管83串联,二极管88与晶体管84串联,且串联的二极管87与晶体管83以及串联的二极管88与晶体管84则形成一并联电路以作为第三开关S3来控制电流的流过方向。第一电压差D1为V2-V1,第二电压差D2为V3-V1。经由端点A的电压振荡变化可促使维持电极18及维持电极19之间的电压差改变,使电容82两端的电压差在第一电压差D1与第二电压差D2之间振荡。本实施例中,电容82两端电压差的驱动波形与第一种等离子体显示器的驱动电路50的电容54两端电压差的驱动波形相同,如图7所示。Please refer to FIG. 10 , which is a second schematic diagram of the driving
请参阅图5及图11,图11为本发明第二种等离子体显示器的驱动电路140的示意图。图11所示的驱动电路140在图5所示的驱动电路50中增加一电容C′,而该电容C′两端的电压差Vc可为正值或负值,取决于电压V″、V以及开关S3导通时间的长短。如此,可使电容54的两端压差不以接地电压(0伏特)为转折点,由V″-V′伏特向下振荡至V-V′伏特。电压V″、V的限制条件与前述实施例中所述相同。Please refer to FIG. 5 and FIG. 11 . FIG. 11 is a schematic diagram of a
请参阅图12,图12为本发明第三种等离子体显示器的驱动电路92的示意图。驱动电路92包含有两电感93、94,一电容95,四个晶体管96、97、98、99,两个二极管100、101,以及三电压源102、103、104。电压源102提供一正电压的第二电压(V2),电压源103提供一负电压的第三电压(V3,V3<0),且电压源104提供任何介于第二电压与第三电压之间的第一电压(V1,V3<V1<V2)。晶体管98为第一开关S1,晶体管99为第二开关S2。此外,电感93、二极管100与晶体管96形成一串联电路,作为第三开关S3(图中未标示)。电感94、二极管101与晶体管97亦形成一串联电路,作为第四开关S4(图中未标示)。串联的电感93、二极管100与晶体管96以及串联的电感94、二极管101与晶体管97则形成一并联电路以做为开关来控制电流的流过方向。第三开关是控制电容95两端的电压由V2-V1开始往下振荡,第四开关则控制电容95两端的电压由V3-V1开始往上振荡。由于电容95两端的电压改变是由不同的开关所控制,因此往下振荡与往上振荡的斜率可以不相同。第一电压差D1为V2-V1,第二电压差D2为V3-V1。经由端点A的电压振荡变化可驱动维持电极18及维持电极19之间的电压差改变,使电容95两端的电压差在第一电压差D1与第二电压差D2之间振荡。本实施例中,电容95两端电压差的驱动波形与第一种等离子体显示器的驱动电路50的电容54两端电压差的驱动波形相同。Please refer to FIG. 12 . FIG. 12 is a schematic diagram of a driving circuit 92 of a third plasma display according to the present invention. The driving circuit 92 includes two
请参阅图13,图13为本发明第四种等离子体显示器的驱动电路105的示意图。驱动电路105包含有一电感81,一电容82,四个晶体管83、84、85、86,两个二极管87、88,以及五电压源89、90、91、106、107。电压源89提供正电压而电压源90提供负电压。此外,电压源89提供一第二电压(V2,V2>0),电压源90提供一第三电压(V3<0),电压源91提供任何介于第二电压与第三电压之间的第一电压(V1,V3<V1<V2)。晶体管85为第一开关S1,晶体管86为第二开关S2。二极管87与晶体管83串联,形成第三开关S3,而二极管88与晶体管84串联,形成第四开关S4(S1、S2、S3、S4图中未标示)。本实施例中,当驱动电路105仅有晶体管85导通时,电容82的端点A的电压保持在电压源89所提供的第一电压V1。然后,关断晶体管85及导通晶体管83,此时驱动电路105形成一谐振电路。由于电压源106的关系,电容82的端点A的电压将不以接地电压为转折点向下振荡。同样地,当驱动电路105仅有晶体管86导通时,电容82的端点A的电压保持在电压源90所提供的第三电压V3,然后关断晶体管86及导通晶体管84,此时驱动电路105形成一谐振电路,由于电压源107的关系,电容82的端点A的电压将不以接地电压为转折点向上振荡。相较在图10的驱动电路80以接近接地电压(0伏特)为振荡的转折点,本实施例使用一电压源106来提供向下振荡的转折点偏压,以及使用一电压源107来提供向上振荡的转折点偏压,因此本实施例可以驱动电容82的端点A的电压不以零电压为转折点振荡。第一电压差D1为V2-V1,第二电压差D2为V3-V1。经由端点A的电压振荡变化可驱动维持电极18及维持电极19之间的电压差改变,使电容95两端的电压差在第一电压差D1与第二电压差D2之间振荡。Please refer to FIG. 13 . FIG. 13 is a schematic diagram of a
请参阅图14,图14为本发明第五种等离子体显示器的驱动电路108的示意图。驱动电路108包含有两电感93、94,一电容95,四个晶体管96、97、98、99,两个二极管100、101,以及五电压源102、103、104、109、110。电压源102提供一正电压的第二电压(V2,V2>0)而电压源103提供一负电压的第三电压(V3,V3<0)。此外,电压源104提供任何介于第二电压与第三电压之间的第一电压(V1,V3<V1<V2)。晶体管98为第一开关,晶体管99为第二开关。此外,电感93、二极管100与晶体管96形成一串联电路且构成第三开关,电感94、二极管101与晶体管97亦形成一串联电路且构成第四开关来控制电流的流过方向。如本发明第四种等离子体显示器的驱动电路105所公开,相较于图12所示的第三种等离子体显示器的驱动电路92以接地电压为振荡的转折点,本实施例使用一电压源109来提供向下振荡的转折点偏压,以及使用一电压源110来提供向上振荡的转折点偏压,因此本实施例可以驱动电容95的端点A的电压不以零电压为转折点振荡。第一电压差D1为V2-V1,第二电压差D2为V3-V1。经由端点A的电压振荡变化可促使维持电极18及维持电极19之间的电压差改变,使电容95两端的电压差在第一电压差D1与第二电压差D2之间振荡。Please refer to FIG. 14 . FIG. 14 is a schematic diagram of a fifth plasma
请参阅图15及图16,图15为本发明第六种等离子体显示器的驱动电路112的示意图,而图16为图15的驱动电路112的时序图。驱动电路112包含有一电感113,八个晶体管114、115、116、117、118、119、120、121,六个二极管122、123、124、125、132、133,三个电容126、127、128以及三电压源129、130、131。二极管122、123、124、125、132、133分别为晶体管114、115、116、117、118、119、120、121本身结构具有的体二极管。电压源129提供一正电压的第二电压(V2,V2<0),此外电压源131提供任何介于第二电压与第三电压之间的第一电压(V1,V3<V1<V2)。本实施例中,使用晶体管118作为第一开关、晶体管119作为第二开关、晶体管114作为第三开关、晶体管117作为第四开关、晶体管120与晶体管121作为第五开关、晶体管115作为第四开关及晶体管116作为第七开关。如公知等离子体显示器的驱动电路40所公开,谐振电路运行的过程中,电容126两端的电位差等于电压源129所提供的第二电压的一半,以及电容127两端的电位差等于电压源130所提供的第三电压的一半以避免能量损耗,而本实施例中,经由第五开关(晶体管120、121)及二极管132、133的组合可形成一双向开关,因而使电容128的端点A的初始电压等于接地电压,并经由电感113与电容126、127所组成的谐振电路,使电容128的端点A的电压振荡变化。在振荡变化的过程中,由第五开关(晶体管120、121)及二极管132、133所形成的双向开关可将电容128端点A的电压维持在接地电压。第六开关(晶体管115)导通后,因电容128及电感113形成谐振电路,使电容128端点A的电压由零电位向上振荡。若导通第七开关(晶体管116),因电容128及电感113形成谐振电路,则可使电容128端点A的电压由零电位向下振荡。第一电压D1为V2-V1,第二电压差D2为V3-V1。经由端点A的电压振荡变化可促使维持电极18及维持电极19之间的电压差改变,使电容128两端的电压差在第一电压差D1与第二电压差D2之间振荡。Please refer to FIG. 15 and FIG. 16 , FIG. 15 is a schematic diagram of the driving
相较于公知技术,本发明驱动等离子体显示器的方法在维持阶段时,在每一个次像素单元中,输入一固定电压至一维持电极,且输入一正负极性随时间振荡变化的电压在另一维持电极,使得在单一个次像素单元中,在两维持电极之间产生正电压及负电极的周期性变化。当两维持电极之间的电位差大于一放电电压时引发电离气体放电产生紫外线,所以本发明的驱动方法仅需使用一谐振电路对一维持电极产生驱动脉冲,而不需对另一维持电极配置相对应的谐振电路。如本发明第一种等离子体显示器的驱动电路所示,本发明可以节省谐振电路所需的电感及电容元件。所以,本发明驱动等离子体显示器的方法公开一种与公知技术不同的驱动波形,不但可达到驱动维持电极使电离气体放电的目的,而且本发明的驱动电路使用较少的电路元件完成,还可以降低整体生产成本。此外,本发明的驱动方法不仅可使用在维持阶段。当使用此方法时,可减少元件数目且增加电路效率,因此可应用于重置(reset)或定址(address)阶段,使其有效地达到重置或定址的功效。Compared with the known technology, the method for driving a plasma display according to the present invention inputs a fixed voltage to a sustain electrode in each sub-pixel unit during the sustain phase, and inputs a voltage whose positive and negative polarity oscillates with time. The other sustaining electrode makes positive voltage and negative electrode periodically change between the two sustaining electrodes in a single sub-pixel unit. When the potential difference between the two sustain electrodes is greater than a discharge voltage, the ionized gas discharge is caused to generate ultraviolet rays, so the driving method of the present invention only needs to use a resonant circuit to generate a drive pulse to one sustain electrode, without disposing the other sustain electrode corresponding resonant circuit. As shown in the driving circuit of the first plasma display of the present invention, the present invention can save the inductance and capacitance components required by the resonant circuit. Therefore, the method for driving a plasma display of the present invention discloses a driving waveform different from that of the known technology, which not only achieves the purpose of driving the sustain electrode to discharge the ionized gas, but also uses fewer circuit components to complete the driving circuit of the present invention, and can also Lower overall production costs. Furthermore, the driving method of the present invention can be used not only in the maintenance phase. When this method is used, the number of components can be reduced and the circuit efficiency can be increased, so it can be applied to the reset or address stage, so that it can effectively achieve the effect of reset or address.
以上所述仅为本发明的较佳实施例,凡依本发明权利要求所做的均等变化与改进,皆应属本发明专利的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and improvements made according to the claims of the present invention shall fall within the scope of the patent of the present invention.
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|---|---|---|---|
| CN 02102058 Expired - Fee Related CN1248183C (en) | 2002-01-18 | 2002-01-18 | Driving method of plasma display |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| GB201309282D0 (en) * | 2013-05-23 | 2013-07-10 | Shimadzu Corp | Circuit for generating a voltage waveform |
| GB201507474D0 (en) | 2015-04-30 | 2015-06-17 | Shimadzu Corp | A circuit for generating a voltage waveform at an output node |
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2002
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| Publication number | Publication date |
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| CN1432982A (en) | 2003-07-30 |
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