CN1243374C - Method for increasing the surface adhesion of silicon nitride by using patterned metal structure - Google Patents

Abstract

The invention relates to a method for increasing silicon nitride surface adhesion by using a patterned metal structure, which forms a plurality of patterned metal structures (metal pattern structures) on the surface of a passivation layer, particularly a silicon nitride layer, and produces the effect of roughening the surface, thereby increasing the adhesion strength between the passivation layer and a bottom sealing glue formed on the passivation layer. The method provided by the invention forms the patterned metal structure, and can form Under Bump Metallurgy (UBM) in a bump growing process and simultaneously form the UBM on the surface of the passivation layer. Wherein the composition of the metal pattern is the same as that of the under bump metallurgy. The two-stage etching process for forming the under bump metallurgy has an anchoring effect (anchor effect) on the jagged edge pattern caused by the metal layer to increase the adhesion between the passivation layer and the bottom encapsulation.

Description

Method for increasing the surface adhesion of silicon nitride by using patterned metal structure

technical field

The invention relates to flip chip packaging technology, in particular to a method for increasing the surface adhesion of silicon nitride by using a patterned metal structure.

Background technique

The main functions of IC packaging include: protecting the IC and providing an interface for information transmission between the chip and external system devices. Therefore, the development of IC manufacturing processes and the functionality of system products are the main factors affecting the development of IC packaging technology. The requirements of today's electronic products are light, thin, and small, so there must be a technology to reduce the size of the die; the miniaturization of the IC process, resulting in an increase in the number of logic circuits contained in the die, it is necessary to find a way to add more input and output signals outside the die. foot position. Due to the variety of these requirements, many different new generation packaging methods have been created, such as: ball grid array (BGA), chip size package (CSP), multi-chip module (multi-chip module; MCM), flip chip (FC) And other advanced technology came into being. Among them, flip-chip packaging has better electrical characteristics because it reduces the path distance of information transmission between the chip and the external system device, and has become a next-generation packaging technology that has attracted much attention.

Flip-chip packaging technology utilizes conductor bumps as input/output. For the process of forming conductor tin-lead bumps, the passivation layer is usually etched by an etching process to expose the pad on the aluminum metal pad. Then deposit a combined layer of barrier layer and conductive layer on it. The general composition includes Cr/Cu, Ti/Cu, Cr/CrCu/Cu, AL/NiV/Cu, and then apply photoresist by lithography process. etchant and patterned, the formed photoresist pattern has an opening on the aluminum bonding pad. The tin-lead is formed by electroplating to be in contact with the conductive layer in the window, and then the photoresist pattern is removed to form a tin-lead bump. The next step is to use the tin-lead bump as an etching mask to remove the uncaught barrier layer and conductive layer to complete the process of forming the tin-lead bump, and the remaining combined layer of the barrier layer and the conductive layer is called Under Bump Metal.

Solder bumps are completed after the remaining tin-lead bumps are subjected to a solder reflow process. Please refer to Figure 1, which is a schematic diagram of a typical flip-chip package structure. The front side of the die 1 is connected to the substrate 3 with solder bumps 5, and then the gel-like underfill 7 is filled therein. The pores of the substrate 3 are then solidified to increase the strength of the solder bumps, and the other side of the substrate 3 is a solder ball 9 connected to the system. Among them, the adhesion strength between the bottom sealant and the die passivation layer is the key factor to pass the terminal reliability test. In the current conventional technology, in order to enhance the adhesive strength between the bottom sealant and the grain passivation layer, try to improve it with various compositions of the bottom sealant; or use benzocyclobutene (BCB) or The polyimide (PI) layer is a passivation layer, and the surface treatment of the passivation layer, such as plasma bombardment (plasma), increases the roughness of the organic surface to enhance the adhesive strength with the bottom sealant. If silicon nitride is used as the passivation layer, a re-passivation layer (re-passivation) is formed on it, BCB or PI layer, and then the surface of this re-passivation layer is treated, because the surface roughness is increased by plasma bombardment. The silicon nitride layer is less effective.

However, using ion bombardment comes at an added cost. However, the method of adding an additional passivation layer not only increases the cost, but also prolongs the production time a lot. The method provided by the present invention does not use ion bombardment to make the surface of the passivation layer rough, and does not need to change the bottom sealant, especially for wafers with silicon nitride as the passivation layer, which is a cost-saving and high-efficiency method.

Contents of the invention

The object of the present invention is to provide a method for increasing the adhesive strength between the die passivation layer and the underfill during the packaging process.

The principle utilized by the present invention is that a rough surface can increase the adhesion strength between the surface of an object and the substances formed thereon. The method of the invention is to form a thin film on a surface, develop and etch the thin film to form a compact pattern. Thereby simulating the effect of a rough surface and increasing the adhesive strength of the surface.

In order to achieve the above object, the present invention proposes a method for increasing the adhesion in the bump process, which at least includes the following steps: forming a plurality of welding pads on the wafer; forming a passivation layer on the wafer and the plurality of welding pads; patterning Thinning the passivation layer, exposing the upper surface of the plurality of welding pads; forming an under bump metallurgy layer on the passivation layer, and connecting the exposed plurality of welding pads; using a photoresist to define desired forming areas of tin-lead bumps and patterns for increasing the surface roughness of the passivation layer; etching the UBM layer not covered by the photoresist; forming a mesh with a pattern of long tin-lead bumps A stencil is placed on the wafer; solder paste is filled into the long tin-lead bump pattern of the stencil to bond with the UBM exposed on the wafer; and the stencil is removed.

Another technical solution of the present invention is: a method for increasing the adhesion in the bump process, at least including the following steps: forming a plurality of welding pads on the wafer; forming a passivation layer on the wafer and the plurality of welding pads ; patterning the passivation layer, exposing the upper surface of the plurality of welding pads; forming an under bump metal layer on the passivation layer, and connecting the exposed plurality of welding pads; using a first photoresist Define the area where tin-lead bumps are to be formed; form tin-lead bumps on the UBM layer not covered by the photoresist by electroplating; remove the first photoresist; use a second photoresist The resist defines a pattern for increasing the surface roughness of the passivation layer; the exposed UBM layer is etched; and the second photoresist is removed.

Yet another technical solution of the present invention is: a method for increasing the adhesion of a substrate, at least including the following steps: forming a sacrificial layer on a substrate to increase the adhesion; using a photoresist to define patterning for increasing the surface roughness of the substrate; etching the sacrificial layer not covered by the photoresist; and removing the photoresist. The sacrificial layer includes at least two different layer structures. The etching the sacrificial layer not covered by the photoresist includes etching the sacrificial layer to form a plurality of convex structure layers with jagged edges on the substrate surface. It further includes adjusting the number of the convex structure layers and the distance between two adjacent convex structure layers to change the surface roughness of the substrate.

The method of the present invention forms some patterned metal structures (metal patterned structures) on the surface of the passivation layer, especially the silicon nitride layer, to produce the effect of roughening the surface, thereby increasing the passivation layer and subsequent formation on it. Adhesion strength between the bottom sealants. The method provided by the present invention forms a patterned metal structure, which can be formed on the surface of the passivation layer at the same time as the step of forming the underbump metallurgy (UBM) in the long bumping process. The composition of the metal pattern is the same as that of the UBM. The two-stage etching process for forming the UBM has an anchor effect on the jagged edge pattern caused by the metal layer to increase the adhesion between the passivation layer and the bottom encapsulant.

Description of drawings

Figure 1 shows a cross-sectional view of a flip chip package structure;

Fig. 2 shows the semiconductor wafer sectional view of the UBM layer on the wafer formed by the present invention;

FIG. 3A is a cross-sectional view of a semiconductor wafer forming UBM and UBM dense patterns according to the present invention;

Figure 3B shows an enlarged view of the dotted line in Figure 3A;

Fig. 4 shows the cross-sectional view of the semiconductor wafer that forms the solder balls for the heat flow of the tin-lead bumps of the present invention;

Figure 5 shows an enlarged view of the dotted line in Figure 4.

Detailed ways

In the packaging process, after the long bumping process is completed, between the die and the substrate, a gel-like bottom sealant is used to fill the gaps therebetween and then cured to increase the strength of the solder bumps. Among them, the adhesive strength between the bottom sealant and the die passivation layer is the key to whether the die can pass the reliability test after the die is packaged. If the adhesive strength is insufficient, there may be a risk of peeling off, reducing the service life. The present invention discloses a method for increasing the adhesion strength, which is to make dense patterns on the surface of the silicon nitride layer when forming UBM, increase the roughness of the surface, and use the jagged edges formed when etching the metal layer The shape has an anchor effect on the bottom sealant. These two methods are used to increase the adhesion strength between the grain passivation layer and the filler. The detailed description is as follows, and the preferred embodiments described are only for illustration and are not intended to limit the present invention.

Referring to FIG. 2 , there is a metal pad 4 on the wafer 2 , the area where the pad is located is defined by photoresist, and the passivation layer 6 is etched by an etching process to expose the pad 4 . The above-mentioned composition of the passivation layer 6 may contain PI or BCB or silicon nitride. Next, an under bump metal layer 400 is formed (refer to FIG. 3B ); the under bump metal (UBM) can generally choose a metal/copper layer/nickel layer structure including titanium or chromium. The barrier layer 8 is deposited first, and a metal including titanium or chromium can be selected. Then form a conductive layer on it. The conductive layer generally includes copper or copper alloy. A copper seed layer (seeding layer) 10 that is beneficial to copper material electroplating can be formed first, and then an electroplated copper layer 12 can be used, and then electroplating can be used on it. A nickel layer 14 is formed on the surface, wherein the thickness of the copper layer 12 is about 4 to 6 microns, and the thickness of the nickel layer 14 is about 2 to 4 microns. The copper seed layer 10 mentioned above can be formed on the surface of the barrier layer 8 by sputtering, and its composition is Cr/Cu or Ti/Cu. The material and thickness mentioned above are only used as an example for illustration, and are not intended to limit the spirit of the present invention, so the scope of the present invention includes the replacement of materials with equivalent functions.

Referring to FIG. 3A , a spin-on process is performed to coat a photoresist layer 16 on the UBM layer structure. Next, a lithography process is used to define areas 100 on the photoresist where tin-lead bumps are to be formed, and a dense pattern 200 is defined between the areas where tin-lead bumps are to be formed. Using the photoresist as a mask, etch each metal layer up to the passivation layer. The photoresist is removed, followed by screen printing to form tin-lead bumps. There is a pattern on the screen to form tin-lead bumps, and the solder paste is filled through the screen to connect with the exposed metal layer. Since the densely patterned area is blocked by the screen, no solder paste will form in this area. Then, after heat flow (reflow), the tin-lead particles in the solder paste form a spherical structure due to factors such as cohesion to complete the production of solder balls, as shown in Figure 4. Then remove the flux (fluxcleaning).

As shown in FIGS. 4 and 5 , by virtue of the dense pattern 200 defined between the areas where the long tin-lead bumps are to be formed, many convex structure layers 201 are formed and distributed on the passivation layer 6 . The convex structure layer 201 makes the surface of the passivation layer 6 obviously convex and concave to increase the roughness, thereby increasing the adhesive strength between the passivation layer 6 and the bottom sealant (not shown) subsequently formed thereon. Wherein each convex structure layer 201 comprises at least one metal layer 2011, and the material of the metal layer 2011 is the same as sacrificial layers such as barrier layer 8, copper seed layer 10, copper layer 12 or nickel layer 14, and the dense distribution of convex structure layer 201 The degree of roughness of the surface of the passivation layer 6 can be determined to increase the required adhesive strength.

The convex structure layer 201 and the SnPb UBM layer 400 are defined simultaneously. When etching the metal layer, it can be carried out by wet etching, and because it is a multi-layered metal layer, multi-stage etching is required. The structure of the SnPb UBM layer 400 and the convex structure layer 201 in FIG. 4 is, from bottom to top, barrier layer 8/copper seed layer 10/copper layer 12/nickel layer 14, which is performed by four photomasks. Formed by stage etching. The jagged edges as shown in FIG. 5 are caused by the four-stage etching around the protruding structure layer 201 . The serrated edge has an anchoring effect on the bottom sealant formed on the passivation layer later, and can increase the adhesive strength between the bottom sealant and the passivation layer.

If the tin-lead bump is formed by electroplating, the tin-lead bump is formed because the exposed metal part is used as an electrode. It is not possible to define both tin-lead bumps and dense patterns between tin-lead bumps with a single photoresist. After the tin-lead bumps are made and the photoresist is removed, another layer of photoresist can be formed on the surface of the passivation layer, and this another layer of photoresist can be used to define the gap between the tin-lead bumps. dense pattern.

It should be noted that the focus of the present invention is to form a patterned metal structure on the surface of the passivation layer, resulting in a rough surface and an anchoring effect to increase the adhesive strength between the passivation layer and the bottom sealant. Therefore, in the tin-lead bump manufacturing process, the steps or methods of forming the patterned metal structure may be different, which does not depart from the scope of the patent of the present invention.

The above-described embodiment is only to illustrate the technical ideas and characteristics of the present invention, and its purpose is to enable those skilled in this art to understand the content of the present invention and implement it accordingly. Equivalent changes or modifications made according to the spirit disclosed in the present invention shall still fall within the scope of the claims of the present invention.

Claims (10)

1. A method for increasing the degree of adhesion in the bump manufacturing process, characterized in that: the method at least comprises the following steps: forming a plurality of pads on the wafer; forming a passivation layer on the wafer and the plurality of bonding pads; patterning the passivation layer to expose the upper surfaces of the plurality of welding pads; forming an under bump metallurgy layer on the passivation layer, and connecting the exposed pads; Using a photoresist to define the area where the tin-lead bump is to be formed and the pattern for increasing the surface roughness of the passivation layer; etching the UBM layer not covered by the photoresist; overlaying a screen with a pattern of long tin-lead bumps on the wafer; filling solder paste into the long tin-lead bump pattern of the screen to bond with the exposed UBM on the wafer; and Remove the screen. 2. The method for increasing the adhesion in the bump manufacturing process as claimed in claim 1, characterized in that: the pattern used to increase the surface roughness of the passivation layer can increase the passivation according to the increased surface roughness. Adhesion strength between layer and bottom sealant. 3. The method for increasing the adhesion in the bump manufacturing process as claimed in claim 1, wherein the step of etching the UBM layer not covered by the photoresist comprises etching the bump The lower metal layer is used to form a plurality of convex structure layers with jagged edges on the surface of the substrate. 4. A method for increasing the degree of adhesion in bump manufacturing process, characterized in that: the method at least comprises the following steps: forming a plurality of pads on the wafer; forming a passivation layer on the wafer and the plurality of bonding pads; patterning the passivation layer to expose the upper surfaces of the plurality of welding pads; forming an under bump metallurgy layer on the passivation layer, and connecting the exposed pads; Utilizing the first photoresist to define a region where tin-lead bumps are to be formed; forming tin-lead bumps by electroplating on the UBM layer not covered by the photoresist; removing the first photoresist; using a second photoresist to define a pattern for increasing the surface roughness of the passivation layer; etching the exposed UBM layer; and The second photoresist is removed. 5. The method for increasing the adhesion in the bump manufacturing process as claimed in claim 4, characterized in that: the pattern used to increase the surface roughness of the passivation layer can increase the passivation according to the increased surface roughness. Adhesion strength between layer and bottom sealant. 6. The method for increasing adhesion in bump process as claimed in claim 4, wherein the step of etching the UBM layer not covered by the second photoresist comprises etching the The UBM layer is used to form a plurality of convex structure layers with serrated edges on the surface of the substrate. 7. A method for increasing substrate adhesion, characterized in that: the method at least comprises the following steps: forming a sacrificial layer on a substrate to increase adhesion; using a photoresist to define a pattern on the sacrificial layer for increasing the surface roughness of the substrate; etching the sacrificial layer not covered by the photoresist; and The photoresist is removed. 8. The method for increasing adhesion according to claim 7, characterized in that: said sacrificial layer comprises at least two different layer structures. 9. The method for increasing adhesion as claimed in claim 8, wherein said etching the sacrificial layer not covered by the photoresist comprises etching the sacrificial layer to form a plurality of bumps with jagged edges The structure layer is on the surface of the substrate. 10. The method for increasing adhesion as claimed in claim 9, further comprising: adjusting the number of the convex structure layers and the distance between two adjacent convex structure layers to change the surface roughness of the substrate.

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