CN113810048A - Phase-locked loop two-point modulation circuit with gain correction, transmitter and correction method - Google Patents
Phase-locked loop two-point modulation circuit with gain correction, transmitter and correction method Download PDFInfo
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
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- H03L7/097—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a comparator for comparing the voltages obtained from two frequency to voltage converters
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- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- H—ELECTRICITY
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- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
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- H04B2001/0491—Circuits with frequency synthesizers, frequency converters or modulators
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Abstract
The application discloses a phase-locked loop two-point modulation circuit with gain correction, a transmitter and a correction method, and belongs to the technical field of wireless communication. The circuit includes: the output end of the loop filter is respectively connected with the input end of the pre-amplifying unit, the output end of the pre-amplifying unit is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the digital module, the signal input end of the comparator is connected with the second input end of the digital module, and the output end of the digital module is connected with the input end of the second gain unit. According to the method and the device, the two paths of gains based on the phase-locked loop two-point modulation transmitter are adjusted through the preamplifier, the comparator and the digital module, and the problem of gain mismatch of the two paths is corrected, so that the output frequency of the transmitter is not influenced by the process and environmental factors, and the reliability of the circuit is improved.
Description
Technical Field
The present disclosure relates to the field of wireless communications technologies, and in particular, to a phase-locked loop two-point modulation circuit with gain correction, a transmitter, and a correction method.
Background
In the prior art, in order to obtain a higher transmission rate without deteriorating the EVM index of the transmitter, it is necessary to compensate the filtered useful signal in the VCO voltage-controlled oscillator circuit, that is, to modulate the oscillation frequency of the VCO and the frequency dividing ratio of the frequency divider simultaneously, and this modulation method is called two-point modulation. However, in the conventional two-point modulation, when the gains of the high-pass path and the low-pass path are not matched, the error cannot be eliminated. The two-point modulation transmitter based on the phase-locked loop can achieve the all-pass characteristic, and the phase-locked loop is always in a locked state. In practice, because the phase-locked loop is affected by the operating frequency, process and temperature, the modulation gain between the two modulation paths is not exactly the same, which may cause the mismatch of the synthesized all-pass transfer function, resulting in gain error, thereby deteriorating the EVM index of the transmitter and causing performance degradation.
Disclosure of Invention
Aiming at the problem that in the prior art, a phase-locked loop of a two-point modulation transmitter based on the phase-locked loop is always in a locked state. But actually, because the phase-locked loop is affected by the working frequency, the process and the temperature, the modulation gains between the two modulation paths are not identical, so that the gain mismatch is caused, the EVM index of the transmitter is finally deteriorated, and the performance of the transmitter is affected.
In a technical solution of the present application, a phase-locked loop two-point modulation circuit with gain correction is provided, including a reference clock generator, a phase frequency detector, a charge pump unit, a loop filter, a voltage controlled oscillator, a frequency divider, a digital modulator, and a digital-to-analog conversion module, and further including: the signal input end of the pre-amplification unit is connected with the input end of the first gain unit, the output end of the first gain unit is connected with the first input end of the digital modulator, the output end of the digital modulator is connected with the first input end of the frequency divider, and the output end of the frequency divider is respectively connected with the second input end of the digital modulator and the first input ends of the phase frequency detector and the charge pump unit; the output end of the reference clock generator is connected with the second input ends of the phase frequency detector and the charge pump unit, the output ends of the phase frequency detector and the charge pump unit are connected with the input end of the loop filter, the output end of the loop filter is respectively connected with the input end of the pre-amplification unit and the first input end of the voltage-controlled oscillator, and the output end of the voltage-controlled oscillator is connected with the second input end of the frequency divider and outputs signals; the output end of the pre-amplifying unit is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the digital module, the signal input end is connected with the second input end of the digital module, the output end of the digital module is connected with the input end of the second gain unit, the output end of the second gain unit is connected with the input end of the digital-to-analog conversion module, and the output end of the digital-to-analog conversion module is connected with the second input end of the voltage-controlled oscillator.
Optionally, the pre-amplifying unit amplifies the voltage signal output by the loop filter according to a preset amplification factor.
Optionally, the comparator is a voltage comparator for monitoring a voltage variation trend of the output signal of the pre-amplification unit in real time.
Optionally, the digital module compares a first input voltage at the signal input end with a second input voltage output by the comparator, and adjusts the gain according to the comparison result until a preset gain mismatch standard is met, wherein if the voltage variation trends of the first input voltage and the second input voltage are the same, the gain value of the second gain unit is increased; and if the voltage change trends of the first input voltage and the second input voltage are opposite, reducing the gain value of the second gain unit.
Optionally, if the voltages of the first input voltage and the second input voltage have the same polarity, the gain value of the second gain unit is increased according to a preset gain adjustment threshold; and if the voltages of the first input voltage and the second input voltage have opposite polarities, reducing the gain value of the second gain unit according to a preset gain adjustment threshold value.
In one aspect of the present application, a phase-locked loop-based two-point modulation transmitter is provided, which includes a phase-locked loop two-point modulation circuit with gain correction in the first aspect.
In one aspect of the present application, a method for correcting loop gain is provided, including: pre-amplifying the output voltage of the loop filter according to a preset amplification factor through a pre-amplifying circuit to obtain a pre-amplified filtering voltage; comparing the pre-amplified filtering voltage with the input signal voltage of the signal input end through a comparator, and monitoring the variation trend of the pre-amplified filtering voltage in real time; and comparing the variation trends of the input signal voltage and the pre-amplification filtering voltage through the digital module, and adjusting the gain value of the second gain unit according to the comparison result until the preset gain mismatch standard is met.
Optionally, the comparing, by the digital module, the variation trend of the input signal voltage and the pre-amplification filtering voltage, and adjusting the gain value of the second gain unit according to the comparison result includes: if the polarity of the pre-amplification filtering voltage is the same as that of the input signal voltage, increasing the gain value of the second gain unit according to a preset gain adjustment threshold; and if the polarity of the pre-amplification filtering voltage is opposite to that of the input signal voltage, reducing the gain value of the second gain unit according to a preset gain adjustment threshold value.
The beneficial effect of this application is: according to the method and the device, the two paths of gains based on the phase-locked loop two-point modulation transmitter are adjusted by newly adding the preamplifier, the comparator and the digital module, and the problem of gain mismatch of the two paths is corrected, so that the output frequency of the transmitter cannot be influenced by the process and environmental factors, and the reliability of the circuit is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 shows a schematic diagram of a prior art two-point modulation transmitter circuit based on a phase-locked loop;
FIG. 2 is a circuit diagram illustrating one embodiment of a phase-locked loop two-point modulation circuit with gain correction according to the present application;
fig. 3 is a flow chart illustrating an embodiment of a method for correcting a loop gain according to the present application.
With the above figures, there are shown specific embodiments of the present application, which will be described in more detail below. These drawings and written description are not intended to limit the scope of the inventive concepts in any manner, but rather to illustrate the inventive concepts to those skilled in the art by reference to specific embodiments.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims of the present application and in the above-described drawings (if any) are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of steps or elements is not necessarily limited to those elements explicitly listed, but may include other elements not expressly listed or inherent to such product or apparatus.
In the prior art, in order to obtain a higher transmission rate without deteriorating the EVM index of the transmitter, it is necessary to compensate the filtered useful signal in the VCO voltage-controlled oscillator circuit, that is, to modulate the oscillation frequency of the VCO and the frequency dividing ratio of the frequency divider simultaneously, and this modulation method is called two-point modulation. However, in the conventional two-point modulation, the gains of the high-pass path and the low-pass path are not matched, and errors cannot be eliminated. The two-point modulation transmitter based on the phase-locked loop can achieve the all-pass characteristic, and the phase-locked loop is always in a locked state. In practice, because the phase-locked loop is affected by the operating frequency, process and temperature, the modulation gain between the two modulation paths is not exactly the same, which may cause the synthesized all-pass transfer function to be mismatched, resulting in gain error, thereby deteriorating the EVM index of the transmitter and reducing the performance of the transmitter.
Fig. 1 shows a schematic diagram of a prior art two-point modulation transmitter circuit based on a phase-locked loop.
As shown in FIG. 1, the gain of the first gain unit of the rational valued path (r)
Gain of the second gain unit of sum path-
The high frequency part of path 2 can then exactly compensate for the part of path 1 that is filtered out by the loop filter. It is important that both path 1 and path 2 are affected by the same loop filter, so that when they are applied to the output of the vco, the complete data is recovered, and the recovered data has no relation to the loop bandwidth, and even if the loop bandwidth changes due to process and temperature, the recovered data information is not affected. By adjusting the gain and phase of path (i) and path (ii), the bandwidth of the modulated signal can far exceed the bandwidth of the loop filter.
Theoretically, a two-point modulation transmitter based on a phase-locked loop can achieve the all-pass characteristic, and the phase-locked loop is always in a locked state. In practice, however, since the phase-locked loop is affected by the operating frequency, process and temperature, the modulation gain between the two modulation paths is not exactly the same, which may result in a mismatch of the resulting all-pass transfer function. When the high and low pass path gains do not match, the frequency offset generated by the conversion of the baseband signal into the voltage-modulated voltage-controlled oscillator VCO by the digital-to-analog converter DAC is no longer identical to the frequency offset caused by the change of the division ratio by the digital modulator DSM. The data rate of the path II is higher than the loop bandwidth, the phase-locked loop does not have enough time to respond correspondingly, and the gain error cannot be eliminated through the loop, so that the EVM index of the transmitter is deteriorated.
In view of the above problems, the present application provides a phase-locked loop two-point modulation circuit with gain correction, a transmitter, and a correction method. The phase frequency detector comprises a reference clock generator, a phase frequency detector, a charge pump unit, a loop filter, a voltage-controlled oscillator, a frequency divider, a digital modulator, a digital-to-analog conversion module, a pre-amplification unit, a comparator and a digital module, wherein a signal input end is connected with an input end of a first gain unit, an output end of the first gain unit is connected with a first input end of the digital modulator, an output end of the digital modulator is connected with a first input end of the frequency divider, and an output end of the frequency divider is respectively connected with a second input end of the digital modulator and a first input end of the phase frequency detector and the charge pump unit; the output end of the reference clock generator is connected with the second input ends of the phase frequency detector and the charge pump unit, the output ends of the phase frequency detector and the charge pump unit are connected with the input end of the loop filter, the output end of the loop filter is respectively connected with the input end of the pre-amplification unit and the first input end of the voltage-controlled oscillator, and the output end of the voltage-controlled oscillator is connected with the second input end of the frequency divider and outputs signals; the output end of the pre-amplifying unit is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the digital module, the signal input end is connected with the second input end of the digital module, the output end of the digital module is connected with the input end of the second gain unit, the output end of the second gain unit is connected with the input end of the digital-to-analog conversion module, and the output end of the digital-to-analog conversion module is connected with the second input end of the voltage-controlled oscillator.
This application is through the output voltage of preamplification unit to loop filter in advance, and compare the output voltage of preamplification unit and input signal's voltage through the comparator, obtain the trend of change of preamplification unit output voltage, and judge the polarity of preamplification unit output voltage and input signal's polarity through digital module, according to judged result and trend of change, through second gain unit adjustment second gain numerical value, thereby avoid the gain mismatch of two loops, reduce the mismatch error, the stability of improvement circuit.
The following describes the technical solutions of the present application and how to solve the above technical problems with specific embodiments. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.
Fig. 2 shows an embodiment of a phase-locked loop two-point modulation circuit with gain correction according to the present application.
In the embodiment shown in fig. 2, the phase-locked loop two-point modulation circuit with gain correction according to the present application includes a reference clock generator, a phase frequency detector, a charge pump unit, a loop filter, a voltage controlled oscillator, a frequency divider, a digital modulator, and a digital-to-analog conversion module, and further includes: a pre-amplifying unit, a comparator, a digital module, wherein,
the signal input end is connected with the input end of the first gain unit, the output end of the first gain unit is connected with the first input end of the digital modulator, the output end of the digital modulator is connected with the first input end of the frequency divider, and the output end of the frequency divider is respectively connected with the second input end of the digital modulator and the first input ends of the phase frequency detector and the charge pump unit.
The output end of the reference clock generator is connected with the second input ends of the phase frequency detector and the charge pump unit, the output ends of the phase frequency detector and the charge pump unit are connected with the input end of the loop filter, the output end of the loop filter is respectively connected with the input end of the pre-amplification unit and the first input end of the voltage-controlled oscillator, and the output end of the voltage-controlled oscillator is connected with the second input end of the frequency divider and outputs signals at the same time.
The output end of the pre-amplifying unit is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the digital module, the signal input end is connected with the second input end of the digital module, the output end of the digital module is connected with the input end of the second gain unit, the output end of the second gain unit is connected with the input end of the digital-to-analog conversion module, and the output end of the digital-to-analog conversion module is connected with the second input end of the voltage-controlled oscillator.
The two-point modulation circuit of the phase-locked loop with gain correction according to the present application is specifically described below with reference to fig. 2.
The signal input end inputs signals
Input is carried out by means of the derivation unit d
The input signal is processed to obtain an instantaneous frequency signal as a signal value required for two-point modulation. The signals of the rows in the path (r) are the values of the required modulation signals. E.g. 250K of 2.4G +250K, the signal value is passed through a first gain unit
Then processed and input to a DSM digital modulator. The signal of the path II is the value of the input voltage changing along with the frequency, and is represented by a symbol as V/Hz.
The signal processed by the digital modulator is processed by the frequency divider, the processed signal is input into the phase frequency detector and the charge pump unit through the first input end of the phase frequency detector and the charge pump unit, and simultaneously the processed signal is fed back into the digital modulator through the second input end of the digital modulator.
And a clock signal output by the reference clock generator is input into the phase frequency detector and the charge pump unit through a second input end of the phase frequency detector and the charge pump unit. The phase frequency detector processes an input reference clock signal and a signal output by the frequency divider, then performs voltage conversion by the charge pump, and finally inputs the signal after the voltage conversion into a loop filter, for example, a low-pass filter of the present application, and performs filtering processing on the signal. And finally, outputting the filtered signal to a voltage-controlled oscillator for processing and then outputting the processed signal, and meanwhile, inputting the filtered signal to a pre-amplification unit for other processing. The signal processing and the specific process of the above components are the same as the principle of the corresponding components in the prior art, and are not repeated in this application.
The pre-amplifying unit receives the voltage signal processed by the low-pass filter, then pre-amplifies the voltage signal, compares the pre-amplified signal with the comparator, judges the voltage variation trend of the output signal of the pre-amplifying unit relative to the input signal of the signal input end, judges the voltage polarity difference between the output signal of the pre-amplifying unit and the input signal of the signal input end through the digital module, and then inputs the comparison result into the second gain unit to adjust the second gain value.
Optionally, the pre-amplifying unit amplifies the voltage signal output by the loop filter according to a preset amplification factor.
In this alternative embodiment, in the pre-amplifying unit, pre-amplifying refers to amplifying the voltage amplitude of the output signal passing through the loop filter without changing the voltage variation trend, so that the comparator can better compare the output result. The loop filter may select a low pass filter. The pre-amplifying unit can be designed as a simple amplifier, the amplification factor can be reasonably set, and the premise is that the voltage trend is not distorted. Wherein the amplification factor can be reasonably set in combination with the tuning gain of the VCO voltage-controlled oscillator, and the amplification result is 1/3vdd to 2/3vdd as a suitable value, wherein vdd represents the voltage value of the input signal.
Optionally, the comparator is a voltage comparator for monitoring a voltage variation trend of the output signal of the pre-amplification unit in real time.
In this alternative embodiment, the gain mismatch of the transmitter may be detected by detecting the voltage of the loop filter. The relationship between the voltage VL of the loop filter output signal and the input signal voltage VS at the signal input is:
wherein KPD is the transfer function of the phase frequency detector, F (S) is the transfer function of the loop filter, KV1 is the tuning gain of VCO, N is the frequency division number of the frequency divider,
representing the gain value of the first gain cell,
representing the gain value of the second gain unit.
When the frequency of the phase-locked loop and the loop are fixed values, the denominator is fixed, the order of the loop filter only influences the value of the denominator, and the positive-negative relation between the voltage of the loop filter and the voltage ratio of the input signal cannot be changed. Therefore, the voltage waveform of the loop filter is attenuated by a certain ratio in amplitude, similarly to the voltage waveform of the input signal.
The comparator is used for comparing the magnitudes of VL and VS, namely the magnitudes of N x K1-K2, monitoring the voltage variation trend in real time, and transmitting the variation result of the voltage trend to the digital module, so that the gain is adjusted, and the gain mismatch is eliminated.
Optionally, the digital module compares a first input voltage of the signal input terminal with a second input voltage of the comparator, and adjusts the gain according to the comparison result until a preset gain mismatch standard is met, wherein if the voltage variation trends of the first input voltage and the second input voltage are the same, the gain value of the second gain unit is increased; and if the voltage change trends of the first input voltage and the second input voltage are opposite, reducing the gain value of the second gain unit.
Optionally, if the voltages of the first input voltage and the second input voltage have the same polarity, the gain value of the second gain unit is increased according to a preset gain adjustment threshold; and if the voltages of the first input voltage and the second input voltage have opposite polarities, reducing the gain value of the second gain unit according to a preset gain adjustment threshold value.
In an example of the present application, the voltage variation trend is the same, which can be understood as that the voltage variation of the two is the same as rising or the same as falling, specifically, when the output voltage of the loop filter and the voltage of the input signal have the same polarity, it indicates that the gain of the path (ii) is smaller than the gain of the path (i), and therefore the gain of the path (ii) should be increased; conversely, when the polarity of the two signals is reversed, the gain of path (c) should be reduced. In the second path, the gain value of the second gain unit is adjusted according to the preset gain adjustment threshold value
The adjustment is carried out, the preset gain adjustment threshold value can be reasonably set according to the design requirement or the gain adjustment requirement of the circuit, and the method is not particularly limited in the application. When the gain adjustment threshold is large, the iteration speed is high, the gain adjustment can be realized quickly, but the precision is low; when the gain adjustment threshold is smaller, the iteration speed is slower, the adjustment speed is slower, but the adjustment precision is higher. By successive iterations, the second gain unit is continuously changed
The final gain mismatch meets the preset gain mismatch standard, and the stability of the circuit is improved. The preset gain mismatch standard can be reasonably set according to the working performance requirement of the transmitter. The expression of the predetermined gain mismatch criterion may be selected to be that the ratio of the first gain unit to the second gain unit is close to 1, or other expressions.
According to the method and the device, the two paths of gains based on the phase-locked loop two-point modulation transmitter are adjusted by newly adding the preamplifier, the comparator and the digital module, and the problem of gain mismatch of the two paths is corrected, so that the output frequency of the transmitter cannot be influenced by the process and environmental factors, and the reliability of the circuit is improved. The iterative idea of the application eliminates frequency deviation caused by process and environmental factors, solves the problem that the gains of the high-pass path and the low-pass path are not matched, and improves the reliability of the circuit.
Fig. 3 is a flow chart illustrating an embodiment of the loop gain correction method according to the present application.
In the embodiment shown in fig. 3, the loop gain calibration method of the present application includes a process S301, pre-amplifying an output voltage of a loop filter according to a preset amplification factor by a pre-amplifying circuit to obtain a pre-amplified filtering voltage; the process S302 is that the pre-amplification filtering voltage is compared with the input signal voltage of the signal input end through a comparator, and the variation trend of the pre-amplification filtering voltage is monitored in real time; and a process S303, comparing the variation trends of the input signal voltage and the pre-amplification filtering voltage through the digital module, and adjusting the gain value of the second gain unit according to the comparison result until the preset gain mismatch standard is met.
Optionally, the comparing, by the digital module, the variation trend of the pre-amplified filtering voltage, and adjusting the gain value of the second gain unit according to the comparison result includes: if the polarity of the pre-amplification filtering voltage is the same as that of the input signal voltage, increasing the gain value of the second gain unit according to a preset gain adjustment threshold; and if the polarity of the pre-amplification filtering voltage is opposite to that of the input signal voltage, reducing the gain value of the second gain unit according to a preset gain adjustment threshold value.
In one embodiment of the present application, the present application provides a phase-locked loop based two-point modulation transmitter, which includes the phase-locked loop two-point modulation circuit with gain correction described in any of the above embodiments.
In a particular embodiment of the present application, a computer-readable storage medium stores computer instructions, wherein the computer instructions are operable to perform the method of correcting loop gain described in any of the embodiments. Wherein the storage medium may be directly in hardware, in a software module executed by a processor, or in a combination of the two.
A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium.
The Processor may be a Central Processing Unit (CPU), other general-purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), other Programmable logic devices, discrete Gate or transistor logic, discrete hardware components, or any combination thereof. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one embodiment of the present application, a computer device includes a processor and a memory, the memory storing computer instructions, wherein: the processor operates the computer instructions to perform the method of correcting the loop gain described in any of the embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
The above embodiments are merely examples, which are not intended to limit the scope of the present disclosure, and all equivalent structural changes made by using the contents of the specification and the drawings, or any other related technical fields, are also included in the scope of the present disclosure.
Claims (10)
1. The utility model provides a two modulation circuit of phase-locked loop with gain correction, includes reference clock generator, phase frequency detector and charge pump unit, loop filter, voltage controlled oscillator, frequency divider, digital modulator, digital-to-analog conversion module, its characterized in that still includes:
a pre-amplifying unit, a comparator, a digital module, wherein,
the output end of the frequency divider is respectively connected with the second input end of the digital modulator and the first input ends of the phase frequency detector and the charge pump unit;
the output end of the reference clock generator is connected with the second input ends of the phase frequency detector and the charge pump unit, the output ends of the phase frequency detector and the charge pump unit are connected with the input end of the loop filter, the output end of the loop filter is respectively connected with the input end of the pre-amplification unit and the first input end of the voltage-controlled oscillator, and the output end of the voltage-controlled oscillator is connected with the second input end of the frequency divider and outputs signals at the same time;
the output end of the pre-amplifying unit is connected with the input end of the comparator, the output end of the comparator is connected with the first input end of the digital module, the signal input end is connected with the second input end of the digital module, the output end of the digital module is connected with the input end of the second gain unit, the output end of the second gain unit is connected with the input end of the digital-to-analog conversion module, and the output end of the digital-to-analog conversion module is connected with the second input end of the voltage-controlled oscillator.
2. The phase-locked loop two-point modulation circuit with gain correction of claim 1,
and the pre-amplification unit amplifies the voltage signal output by the loop filter according to a preset amplification factor.
3. The phase-locked loop two-point modulation circuit with gain correction of claim 1,
the comparator is a voltage comparator and is used for monitoring the voltage variation trend of the output signal of the pre-amplification unit in real time.
4. The phase-locked loop two-point modulation circuit with gain correction of claim 1,
the digital module compares a first input voltage of the signal input end with a second input voltage output by the comparator, and adjusts the gain according to the comparison result until a preset gain mismatch standard is met, wherein,
if the voltage change trends of the first input voltage and the second input voltage are the same, increasing the gain value of the second gain unit;
and if the voltage change trends of the first input voltage and the second input voltage are opposite, reducing the gain value of the second gain unit.
5. The phase-locked loop two-point modulation circuit with gain correction of claim 4,
if the voltages of the first input voltage and the second input voltage have the same polarity, increasing the gain value of the second gain unit according to a preset gain adjustment threshold value;
and if the voltages of the first input voltage and the second input voltage have opposite polarities, reducing the gain value of the second gain unit according to the preset gain adjustment threshold value.
6. A phase locked loop based two point modulation transmitter comprising a phase locked loop two point modulation circuit with gain correction as claimed in any one of claims 1 to 5.
7. A method of correcting loop gain, comprising:
pre-amplifying the output voltage of the loop filter according to a preset amplification factor through a pre-amplifying circuit to obtain a pre-amplified filtering voltage;
comparing the pre-amplified filtering voltage with the input signal voltage of a signal input end through a comparator, and monitoring the variation trend of the pre-amplified filtering voltage in real time;
and comparing the variation trends of the input signal voltage and the pre-amplification filtering voltage through a digital module, and adjusting the gain value of the second gain unit according to the comparison result until the preset gain mismatch standard is met.
8. The method for correcting the loop gain according to claim 7, wherein the comparing the variation trend of the input signal voltage and the pre-amplified filtering voltage by the digital module, and adjusting the gain value of the second gain unit according to the comparison result comprises:
if the polarity of the pre-amplification filtering voltage is the same as that of the input signal voltage, increasing the gain value of the second gain unit according to a preset gain adjustment threshold value;
and if the polarity of the pre-amplification filtering voltage is opposite to that of the input signal voltage, reducing the gain value of the second gain unit according to the preset gain adjustment threshold value.
9. A computer-readable storage medium having stored thereon computer instructions operable to perform the method of any one of claims 7-8.
10. A computer device comprising a processor and a memory, the memory storing computer instructions, wherein: the processor operates the computer instructions to perform the method of any one of claims 7-8.
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