CN113808067B - Circuit board detection method, visual detection equipment and device with storage function - Google Patents
Circuit board detection method, visual detection equipment and device with storage function Download PDFInfo
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- CN113808067B CN113808067B CN202010531315.4A CN202010531315A CN113808067B CN 113808067 B CN113808067 B CN 113808067B CN 202010531315 A CN202010531315 A CN 202010531315A CN 113808067 B CN113808067 B CN 113808067B
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- G06T7/0004—Industrial image inspection
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Abstract
The application discloses a circuit board detection method, visual detection equipment and a device with a storage function, wherein the circuit board detection method comprises the following steps: acquiring an image to be measured, wherein the image to be measured comprises a circuit board to be measured, and at least one mounting area for mounting components to be measured is arranged on the circuit board to be measured; extracting a characteristic image of the installation area from the image to be detected; and predicting whether the mounting area is provided with the component to be tested or not based on the characteristic image by using a pre-trained recognition model. The circuit board detection method provided by the application can judge whether components are installed in the installation area on the circuit board.
Description
Technical Field
The present application relates to the field of circuit boards, and in particular, to a circuit board detection method, a visual detection device, and a device with a storage function.
Background
In recent years, with the continuous development of electronic technology, a circuit board has been rapidly developed as an important component of the electronic technology, wherein the correctness of the mounting of components on the circuit board is one of the important factors for determining the quality of the circuit board.
The inventor of the application discovers that in the process of installing components on a circuit board, due to the diversity of circuit board formats, the difference of supplied materials of different components and errors of operators, the phenomenon of missing the components on the circuit board can occur, thereby leading to the rise of the defective rate of the circuit board and bringing serious influence to enterprises and factories.
Disclosure of Invention
The application mainly solves the technical problem of providing a circuit board detection method, visual detection equipment and a device with a storage function, and can judge whether components are installed in an installation area on a circuit board.
In order to solve the technical problems, the application adopts a technical scheme that: there is provided a circuit board inspection method, the method including: acquiring an image to be tested, wherein the image to be tested comprises a circuit board to be tested, and at least one mounting area for mounting components to be tested is arranged on the circuit board to be tested; extracting a characteristic image of the installation area from the image to be detected; and predicting whether the mounting area is provided with the component to be tested or not based on the characteristic image by a pre-trained recognition model.
In order to solve the technical problems, the application adopts another technical scheme that: there is provided a visual inspection apparatus comprising a processor, a memory and communication circuitry, the processor being coupled to the memory and to the communication circuitry respectively, the processor implementing the steps of the above method by executing program data within the memory.
In order to solve the technical problems, the application adopts another technical scheme that: there is provided an apparatus having a storage function, storing program data executable by a processor to implement the steps in the above method.
The beneficial effects of the application are as follows: the circuit board detection method of the application predicts whether the to-be-detected component is installed in the installation area on the circuit board to be detected based on the obvious difference between the characteristic image of the installation area with the to-be-detected component and the characteristic image of the installation area without the to-be-detected component by utilizing the pre-trained identification model, and can detect whether the to-be-detected component is neglected to be installed in the circuit board to be detected.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. Wherein:
FIG. 1 is a schematic flow chart of an embodiment of a circuit board inspection method according to the present application;
FIG. 2 is a schematic flow chart of another embodiment of the method for inspecting a circuit board according to the present application;
FIG. 3 is a schematic diagram of a configuration file;
FIG. 4 is a schematic flow chart of another embodiment of the method for inspecting a circuit board according to the present application;
FIG. 5 is a schematic diagram of a variation flow of an image to be measured in an embodiment;
FIG. 6 is a schematic flow chart of a circuit board inspection method according to another embodiment of the present application;
FIG. 7 is a flow diagram of recognition model training in one embodiment;
FIG. 8 is a schematic view of the subsequent flow of FIG. 7;
FIG. 9 is a schematic diagram of a visual inspection apparatus according to an embodiment of the present application;
fig. 10 is a schematic structural diagram of an embodiment of a device with memory function according to the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1, fig. 1 is a flow chart of an embodiment of a circuit board detection method according to the present application, the detection method includes:
s110: and obtaining an image to be tested, wherein the image to be tested comprises a circuit board to be tested, and at least one mounting area for mounting components to be tested is arranged on the circuit board to be tested.
In an application scenario, the visual inspection apparatus obtains an image to be inspected by photographing a circuit board to be inspected, for example, a camera is mounted on the visual inspection apparatus, the circuit board to be inspected is photographed by the camera, or in order to improve the definition of the image to be inspected, a visual inspection system composed of hardware including an industrial camera, a lens, a coaxial light source, a photoelectric sensor, etc. is mounted on the visual inspection apparatus, and the image to be inspected is obtained by photographing the circuit board to be inspected by the visual inspection system. In another application scenario, the visual detection device does not shoot the circuit board to be detected, but directly receives the image to be detected sent by other devices.
The circuit board to be tested in the image to be tested can be either the whole circuit board to be tested or part of the circuit board to be tested, for example, when only detecting whether the mounting area of the local area on the circuit board to be tested is provided with the component to be tested, the acquired image to be tested can only comprise the local area corresponding to the circuit board to be tested.
At least one mounting area on the circuit board to be tested can be a mounting area for mounting the same component to be tested, and can also be a mounting area for mounting different components to be tested.
S120: and extracting the characteristic image of the installation area from the image to be detected.
A feature image is extracted from the image to be measured, using, for example, an image extraction technique, the feature image including features of the mounting region.
The extracted feature image may include features of a plurality of installation regions at the same time, or may include features of only a single installation region.
S130: and predicting whether the mounting area is provided with the component to be tested or not based on the characteristic image by using a pre-trained recognition model.
The feature images of the installation area where the components to be tested are installed are obviously different from the feature images of the installation area where the components to be tested are not installed, so that whether the components to be tested are installed in the installation area is predicted by using the recognition model based on the difference between the feature images of the installation area and the feature images of the installation area where the components to be tested are not installed.
When the extracted feature image only comprises the features of a single installation area, the extracted at least one feature image can be sequentially input into the recognition model, and the recognition model can sequentially predict whether all installation areas are provided with the components to be tested.
As can be seen from the above, the present embodiment predicts whether the component to be tested is mounted in the mounting area on the circuit board to be tested based on the obvious difference between the feature image of the mounting area where the component to be tested is mounted and the feature image of the mounting area where the component to be tested is not mounted by using the pre-trained recognition model, and can detect whether the component to be tested is neglected to be mounted on the circuit board to be tested.
Referring to fig. 2, fig. 2 is a flow chart of another embodiment of the circuit board detection method of the present application. The circuit board detection method comprises the following steps:
S210: and obtaining an image to be tested, wherein the image to be tested comprises a circuit board to be tested, and at least one mounting area for mounting components to be tested is arranged on the circuit board to be tested, and is used for mounting single components to be tested.
Unlike the above embodiment, at most one component to be tested can be mounted in the mounting area.
In other embodiments, the mounting area may simultaneously mount a plurality of components to be tested, which is not limited herein.
S220: and carrying out segmentation processing on the image to be detected to obtain a sub-image to be detected containing a single installation area.
S230: and extracting the image in the appointed area in the sub-image to be detected to obtain a characteristic image corresponding to the installation area in the sub-image to be detected.
Specifically, the designated area in the sub-image to be measured is a partial area designated in advance in the sub-image to be measured, and the features in the partial area can reflect the overall features of the sub-image to be measured.
S240: and predicting whether the mounting area is provided with the component to be tested or not based on the characteristic image by using a pre-trained recognition model.
According to the method, the characteristic image of the installation area is not directly extracted from the image to be detected, the image to be detected is firstly subjected to segmentation processing to obtain the sub-image to be detected which only comprises a single installation area, then the image in the appointed area is extracted from the sub-image to be detected to obtain the characteristic image corresponding to the installation area, namely the sub-image to be detected is directly processed to obtain the characteristic image corresponding to the installation area in the sub-image to be detected, and compared with the characteristic image obtained by directly processing the image to be detected, the method can avoid the defect that extraction errors occur due to excessive and complicated processing object data.
In an application scenario, when an image to be detected is segmented, a high-precision positioning vision technology is used for segmentation.
Specifically, during the segmentation, each installation area in the image to be detected is positioned with high precision, then the image is segmented, for example, a configuration file corresponding to the circuit board to be detected is generated in advance, the position (for example, the coordinate range of each installation area) of each installation area on the circuit board to be detected is stored in the configuration file, then each installation area is positioned with high precision according to the configuration file, and then the image is segmented.
In an application scenario, extracting an image in a designated area in the sub-image to be detected in step S230 specifically includes: and extracting the image at the appointed jack in the sub-images to be detected.
Specifically, in order to mount the component to be tested, the mounting area is provided with a plurality of jacks, which may be one, two or more, wherein a plurality of jacks on the mounting area are preset as designated jacks, and the designated jacks may be all jacks in the mounting area or some jacks in the mounting area.
When the to-be-detected components are not installed in the installation area, obvious jacks exist in the sub-to-be-detected images, and when the to-be-detected components are installed in the installation area, the jacks cannot exist in the sub-to-be-detected images due to the coverage of the to-be-detected components, so that in order to ensure accurate prediction of a subsequent recognition model, images at the designated jacks in the sub-to-be-detected images are extracted to obtain feature images corresponding to the installation area in the sub-to-be-detected images, namely, the subsequent recognition model predicts by using the general features of the jacks.
In the application scene, the step of extracting the image at the designated jack in the sub-image to be detected to obtain the characteristic image corresponding to the installation area in the sub-image to be detected comprises the following steps:
A: and obtaining the pre-stored center coordinates and the radius of the designated jack.
B: and setting an external rectangular frame capable of framing the appointed jack on the sub-image to be detected according to the circle center coordinates and the radius of the appointed jack.
C: and extracting the image in the circumscribed rectangular frame.
D: and splicing the images in the circumscribed rectangular frames to obtain the characteristic images.
Specifically, the circle center coordinates and the radius of a designated jack in the designated sub-images to be detected are acquired, then the circumscribed rectangular frame of the designated jack is determined, then the images in the circumscribed rectangular frame are extracted, wherein one designated jack corresponds to one circumscribed rectangular frame, and when the number of the designated jacks is more than two, the number of the circumscribed rectangular frames is also more than two, so that the images in the circumscribed rectangular frames are spliced, and further the characteristic images corresponding to the installation areas in the sub-images to be detected are obtained.
In other application scenarios, the extracted image may also be an image within an circumscribed circular frame covering the designated jack, which is not limited herein.
In this embodiment, the center coordinates and the radius of the designated jack are stored in a preset configuration file. That is, the center coordinates and the radius of the designated jack corresponding to each installation area are set and stored in the visual inspection apparatus.
Meanwhile, the step A specifically comprises the following steps: searching corresponding circle center coordinates and radius from the configuration file according to the names of components to be installed of the components to be installed in the installation area in advance.
Referring to fig. 3, the configuration file stores the names of the components to be mounted in each mounting area and the center coordinates and the radius of the designated jack in the mounting area, and after the feature image is obtained, the corresponding center coordinates and radius are searched from the configuration file according to the component names of the components to be mounted corresponding to each mounting area.
For example, in the application scenario of fig. 3, "RY3" is the name of the component to be tested, "Hole1" is the first designated jack in the mounting area corresponding to the component to be tested, and "Hole2" is the second designated jack in the mounting area corresponding to the component to be tested. That is, in the application scenario of fig. 3, images at two designated jacks in the sub-images to be detected are extracted respectively to obtain corresponding feature images.
In other application scenes, the corresponding center coordinates and the corresponding radius can be searched in the configuration file according to the positions of the installation areas.
Specifically, in addition to the center coordinates and the radius of the designated jack, the configuration file stores the positions of each installation area on the circuit board to be tested (for example, the coordinate positions of the centers of the installation areas), then in the obtained feature image, the positions of the installation areas corresponding to the feature image on the circuit board to be tested are obtained by using a high-precision positioning technology, and then the corresponding center coordinates and the radius are searched in the configuration file according to the positions.
Referring to fig. 4, fig. 4 is a flow chart of another embodiment of the circuit board detection method of the present application. The circuit board detection method comprises the following steps:
S310: and obtaining an image to be tested, wherein the image to be tested comprises a circuit board to be tested, and at least one mounting area for mounting components to be tested is arranged on the circuit board to be tested, and is used for mounting single components to be tested.
S320: and carrying out segmentation processing on the image to be detected to obtain a sub-image to be detected containing a single installation area.
S330: and extracting images at the positions of the two jacks farthest from the sub-images to be detected.
S340: and splicing the images at the two jacks which are farthest apart to obtain a characteristic image.
S350: and predicting whether the mounting area is provided with the component to be tested or not based on the characteristic image by using a pre-trained recognition model.
Referring to fig. 5, at least one mounting area 101 where a component 111 to be tested is required to be mounted is disposed on a circuit board to be tested in the image to be tested 100, each mounting area 101 can only mount one component 111 to be tested, in the application scenario of fig. 5, a part of the mounting areas 101 are mounted with components 111 to be tested, and a part of the mounting areas 101 are not mounted with components 111 to be tested, wherein the mounting areas 101 where the components 111 to be tested are mounted are represented by dotted lines, and the mounting areas 101 where the components 111 to be tested are not mounted are represented by solid lines.
After the image to be measured 100 is obtained, the image to be measured 100 is segmented to obtain a plurality of sub-images to be measured 110, then the image at the first jack 102 and the image at the second jack 103 in the sub-images to be measured 110 are respectively extracted, then the two images are spliced to obtain a characteristic image 120, and finally whether the mounting area 101 is provided with the component to be measured 111 is predicted based on the characteristic image 120.
Of course, in other embodiments, the images at other jacks in the sub-images to be measured may be extracted to obtain the feature image, for example, the images of the jacks located at the center of the installation area in the sub-images to be measured may be extracted to obtain the feature image, and in summary, the application is not limited to extracting the images at the specific jacks in the sub-images to be measured to obtain the feature image.
Referring to fig. 6, fig. 6 is a schematic view of a part of a flow chart of another embodiment of the circuit board detection method of the present application. In this embodiment, before the step of predicting whether the mounting area has the component to be tested mounted based on the feature image by the pre-trained recognition model, the method further includes:
s410: a first sample image is acquired, wherein the first sample image includes a sample circuit board, and a sample component is mounted within a mounting area of the sample circuit board.
S420: a second sample image is acquired, wherein the second sample image includes a sample circuit board, and no sample component is mounted within a mounting area of the sample circuit board.
S430: and training the recognition model by taking one of the first sample image and the second sample image as a positive sample and the other of the first sample image and the second sample image as a negative sample, wherein at least one mounting area is arranged on the sample circuit board.
The method for acquiring the first sample image and the second sample image is the same as the method for acquiring the sample image to be measured in the above embodiment, and will not be described herein.
The types of the sample circuit board and the circuit board to be tested can be the same or different, and the types of the sample components and the components to be tested can be the same or different.
And one or more than two mounting areas are arranged on the sample circuit board.
In an application scene, when training the recognition model, after a first sample image is acquired, the first sample image is used as a positive sample and marked as '1', after a second sample image is acquired, the second sample image is used as a negative sample and marked as '0', then the positive and negative samples are subjected to classification training by using an algorithm to obtain the recognition model, and in an application scene, the positive and negative samples are subjected to classification training by using an algorithm of resnet basic network to obtain the recognition model.
Specifically, in the training process, the recognition model is obtained based on the difference between the first sample image and the second sample image.
In an application scenario, each mounting area is used for mounting a single sample component, and before step S430, the first sample image is subjected to segmentation processing to obtain a first sub-to-be-tested image including the single mounting area, and the second sample image is subjected to segmentation processing to obtain a second sub-to-be-tested image including the single mounting area, where step S430 specifically includes: one of the first sub-test image and the second sub-test image is used as a positive sample, and the other of the first sub-test image and the second sub-test images is used as a negative sample to train the recognition model.
In the application scene, the first sample image and the second sample image are respectively segmented, the segmented first sub-image to be detected is used as a positive sample, and the second sub-image to be detected is used as a negative sample to be trained to obtain the identification model, so that the complexity of data processing can be reduced, the difficulty of generating the identification model is further reduced, and the accuracy of trained classification can be ensured.
In the application scene, before training of the identification model, images in a designated area in a first sub-image to be detected are extracted to obtain a first characteristic image, images in a designated area in a second sub-image to be detected are extracted to obtain a second characteristic image, and then training is carried out by taking the first characteristic image as a positive sample and the second characteristic image as a negative sample to obtain the identification model.
Specifically, the designated area in the first sub-image to be measured is a pre-designated partial area in the first sub-image to be measured, the features in the partial area can reflect the overall features of the first sub-image to be measured, the designated area in the second sub-image to be measured is a pre-designated partial area in the second sub-image to be measured, and the features in the partial area can reflect the overall features of the second sub-image to be measured.
The method comprises the steps of extracting images at appointed jacks in a first sub-image to be detected when extracting a first characteristic image corresponding to the first sub-image to be detected, for example, images at two jacks which are farthest from each other in the first sub-image to be detected, and extracting images at appointed jacks in a second sub-image to be detected when extracting a second characteristic image corresponding to the second sub-image to be detected, for example, images at two jacks which are farthest from each other in the second sub-image to be detected.
Specifically, the process of extracting the image at the designated jack in the first sub-image to be measured and the process of extracting the image at the designated jack in the second sub-image to be measured are the same as the process of extracting the image at the designated jack in the sub-image to be measured in the above step S230, and specific reference may be made to the above embodiment, and details are not repeated here.
When the jack images are extracted, the circumscribed rectangular images of the jacks are extracted, and the circumscribed rectangular images are spliced.
Specifically, the step of extracting an image at a designated jack in the first sub-image to be detected to obtain a first feature image includes: acquiring center coordinates and radii of designated jacks in a first sub-image to be detected, which is stored in advance; setting an external rectangular frame capable of framing the appointed jack on the first sub-image to be tested according to the circle center coordinates and the radius of the appointed jack; extracting images in the external rectangular frame; splicing the images in the external rectangular frame to obtain a first characteristic image; the step of extracting the image at the designated jack in the second sub-image to be detected to obtain the second characteristic image includes: acquiring center coordinates and radii of designated jacks in a pre-stored second sub-image to be detected; setting an external rectangular frame capable of framing the appointed jack on the second sub-image to be tested according to the circle center coordinates and the radius of the appointed jack; extracting images in the external rectangular frame; and splicing the images in the circumscribed rectangular frame to obtain a second characteristic image.
How to extract the external rectangular image of the jack can be referred to the relevant parts, and will not be described herein.
For a better understanding of the training process of the recognition model, a specific description is given below with reference to fig. 8 and 9.
After the first sample image 200 is acquired, the first sample image 200 is divided into a plurality of first sub-images to be measured 210, then images at the two jacks 202 and 203 farthest from each other in the first sub-images to be measured 210 are extracted, and the images at the two jacks 202 and 203 are spliced to obtain a first characteristic image 220 corresponding to the installation area in the first sub-images to be measured 210; after the second sample image 300 is acquired, the second sample image 300 is divided into a plurality of second sub-images to be measured 310, then images at the two jacks 302 and 303 which are farthest apart in the second sub-images to be measured 310 are extracted, and the images at the two jacks 302 and 303 are spliced to obtain a second characteristic image 320 corresponding to the installation area in the second sub-images to be measured 310.
And then labeling the first feature image 220 as '1', labeling the second feature image 320 as '0', and training by taking the first feature image 220 as a positive sample and the second feature image 320 as a negative sample to obtain the identification model.
When the identification model predicts the feature image extracted from the image to be detected, outputting 0 or 1, when the output is 0, the identification model indicates that no component to be detected is installed in the installation area, when the output is 1, the identification model indicates that the component to be detected is installed in the installation area, and in an application scene, the identification model outputs 0 or 1 and also outputs corresponding probabilities, for example, the output result of the identification model is 0 and 98%, and the probability that the component to be detected is not installed in the installation area is 98%.
It can be understood that when training the recognition model, if the positive sample is marked as yes and the negative sample is marked as no, the recognition model outputs the result of yes or no during prediction.
In other application scenarios, the first sample image is used as a negative sample and the second sample image is used as a positive sample to train to obtain the recognition model, correspondingly, the first sub-image to be detected is used as a negative sample and the second sub-image to be detected is used as a positive sample to train to obtain the recognition model, and the first characteristic image is used as a negative sample and the second characteristic image is used as a positive sample to train to obtain the recognition model.
In the embodiment, the training process of the whole recognition model is irrelevant to the types of the installation area and the sample components, so that the trained recognition model can predict whether the components are installed in the installation areas of various types, the universality of the recognition model is realized, the recognition model is not required to be retrained no matter how the components to be tested on the circuit board to be tested are updated later, the development workload is reduced, the difficulty of the whole detection method is reduced, an independent model is not required to be established for each type of components to be tested, and the calculation amount and the cost of a processor are reduced.
In any of the above embodiments, in order to prompt an operator when it is determined that no component to be tested is mounted in the mounting area, the circuit board detection method further includes: when the fact that the to-be-tested components are not mounted in the mounting area of the to-be-tested circuit board is predicted, prompt information is sent out, wherein the prompt information can be sound prompt information, light prompt information or a combination of the sound prompt information and the light prompt information, and the method is not limited.
Meanwhile, when the fact that the to-be-tested components are not mounted in the mounting area of the to-be-tested circuit board is predicted, in order to enable operators to determine which mounting area is specifically not mounted with the to-be-tested components, the sent information also carries identification information of the mounting area where the to-be-tested components are not mounted, and the identification information can be the component names of the corresponding to-be-tested components or the positions of the corresponding to-be-tested components on the to-be-tested circuit board.
Referring to fig. 9, fig. 9 is a schematic structural diagram of an embodiment of a visual inspection apparatus according to the present application. The visual inspection apparatus 800 includes a processor 810, a memory 820 and a communication circuit 830, wherein the processor 810 is coupled to the memory 820 and the communication circuit 830, respectively, and the processor 810 implements the steps of any of the above methods by executing program data in the memory 820, wherein the detailed method can be referred to the above embodiments, and will not be repeated herein.
The visual inspection device 800 may perform inspection on each circuit board to be inspected in the actual operation process, or perform spot inspection on the circuit boards to be inspected at a certain time interval, or perform inspection on a specific circuit board to be inspected after receiving an instruction sent by a user.
Referring to fig. 10, fig. 10 is a device with a storage function of the present application, where the device 900 with a storage function stores program data 910, and the program data 910 can be executed by a processor to implement steps in any of the above methods, and detailed methods can be referred to the above embodiments and are not repeated herein.
The device 900 with a storage function may be a server, a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk.
In summary, the circuit board detection method provided by the application can automatically judge whether the to-be-detected components are installed in the installation area of the to-be-detected circuit board, is simple, and can achieve the purposes of reducing the cost and improving the pushability.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application or directly or indirectly applied to other related technical fields are included in the scope of the present application.
Claims (10)
1. A method for inspecting a circuit board, the method comprising:
Acquiring an image to be tested, wherein the image to be tested comprises a circuit board to be tested, and at least one mounting area for mounting components to be tested is arranged on the circuit board to be tested, and the mounting area is used for mounting a single component to be tested;
Extracting a characteristic image of the installation area from the image to be detected;
Predicting whether the mounting area is provided with the component to be tested or not based on the characteristic image by a pre-trained recognition model;
The step of extracting the characteristic image of the installation area from the image to be detected comprises the following steps: dividing the image to be detected to obtain a sub-image to be detected containing a single installation area; extracting an image in a designated area in the sub-image to be detected to obtain the characteristic image corresponding to an installation area in the sub-image to be detected; acquiring a pre-stored circle center coordinate and a pre-stored radius of a designated jack; setting an external rectangular frame capable of framing the appointed jack on the sub-image to be detected according to the circle center coordinates and the radius of the appointed jack; extracting an image in the circumscribed rectangular frame; and splicing the images in the circumscribed rectangular frame to obtain the characteristic image.
2. The method of claim 1, wherein the center coordinates and radius of the designated jack are stored in a preset configuration file;
the step of obtaining the pre-stored circle center coordinates and radius of the designated jack comprises the following steps:
searching the corresponding center coordinates and radius from the configuration file according to the component names of the components to be tested, which are pre-allocated to the components to be tested in the installation area.
3. The method according to claim 1, wherein before the step of predicting whether the mounting area is mounted with the component under test based on the feature image by the pre-trained recognition model, further comprising:
Acquiring a first sample image, wherein the first sample image comprises a sample circuit board, and a sample component is arranged in a mounting area of the sample circuit board;
Acquiring a second sample image, wherein the second sample image comprises the sample circuit board, and the sample components are not mounted in a mounting area of the sample circuit board;
Training the recognition model with one of the first sample image and the second sample image as a positive sample and the other of the first sample image and the second sample image as a negative sample;
Wherein, be provided with at least one on the sample circuit board the installation district.
4. The method of claim 3, wherein said mounting area is for mounting a single said sample component,
Before the step of training the recognition model with one of the first sample image and the second sample image as a positive sample and the other of the first sample image and the second sample image as a negative sample, the method further comprises:
Dividing the first sample image to obtain a first sub-image to be detected containing a single installation area;
Dividing the second sample image to obtain a second sub-image to be detected containing a single installation area;
The step of training the recognition model with one of the first sample image and the second sample image as a positive sample and the other of the first sample image and the second sample image as a negative sample includes:
and training the identification model by taking one of the first sub-image to be tested and the second sub-image to be tested as a positive sample and the other of the plurality of first sub-images to be tested and the plurality of second sub-images to be tested as a negative sample.
5. The method of claim 4, wherein the training the recognition model with one of the first sub-test image and the second sub-test image as positive samples and the other of the plurality of first sub-test images and the plurality of second sub-test images as negative samples comprises:
extracting an image in a designated area in the first sub-image to be detected to obtain a first characteristic image;
Extracting an image in a designated area in the second sub-image to be detected to obtain a second characteristic image;
And training the identification model by taking the first characteristic image as a positive sample and the second characteristic image as a negative sample.
6. The method of claim 5, wherein the step of determining the position of the probe is performed,
The step of extracting the image in the designated area in the first sub-image to be detected to obtain a first characteristic image includes:
extracting an image at a designated jack in the first sub-image to be detected to obtain the first characteristic image;
The step of extracting the image in the appointed area in the second sub-image to be detected to obtain a second characteristic image comprises the following steps:
And extracting an image at a designated jack in the second sub-image to be detected to obtain the second characteristic image.
7. The method of claim 6, wherein the step of providing the first layer comprises,
The step of extracting the image at the designated jack in the first sub-image to be detected to obtain the first characteristic image includes:
extracting images at the positions of the two jacks farthest from each other in the first sub-image to be detected;
splicing images at the positions of the two jacks farthest from each other in the first sub-image to be detected to obtain the first characteristic image;
the step of extracting the image at the designated jack in the second sub-image to be detected to obtain the second characteristic image includes:
extracting images at the positions of the two jacks farthest from each other in the second sub-image to be detected;
And splicing images at the positions of the two jacks which are farthest from each other in the second sub-image to be detected to obtain the second characteristic image.
8. The method of claim 6, wherein the step of providing the first layer comprises,
The step of extracting the image at the designated jack in the first sub-image to be detected to obtain the first characteristic image includes:
acquiring the circle center coordinates and the radius of the appointed jack in the pre-stored first sub-image to be detected;
Setting an external rectangular frame capable of framing the appointed jack on the first sub-image to be detected according to the circle center coordinates and the radius of the appointed jack;
extracting an image in the circumscribed rectangular frame;
Splicing the images in the circumscribed rectangular frame to obtain the first characteristic image;
the step of extracting the image at the designated jack in the second sub-image to be detected to obtain the second characteristic image includes:
acquiring the circle center coordinates and the radius of the appointed jack in the pre-stored second sub-image to be detected;
setting an external rectangular frame capable of framing the appointed jack on the second sub-image to be detected according to the circle center coordinates and the radius of the appointed jack;
extracting an image in the circumscribed rectangular frame;
and splicing the images in the circumscribed rectangular frame to obtain the second characteristic image.
9. A visual inspection apparatus comprising a processor, a memory and communication circuitry, the processor being coupled to the memory and the communication circuitry, respectively, the processor implementing the steps of the method of any of claims 1-8 by executing program data within the memory.
10. An apparatus having a storage function, characterized in that program data are stored, which program data are executable by a processor to carry out the steps of the method according to any one of claims 1-8.
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