CN113629024B - Manufacturing method of micro-flow refrigerating channel and chip - Google Patents
Manufacturing method of micro-flow refrigerating channel and chip Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 239000000463 material Substances 0.000 claims abstract description 48
- 238000005057 refrigeration Methods 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 22
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 238000000059 patterning Methods 0.000 claims abstract description 9
- 238000013461 design Methods 0.000 claims abstract description 8
- 238000012545 processing Methods 0.000 claims abstract description 8
- 238000001816 cooling Methods 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 6
- 239000004642 Polyimide Substances 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 239000001301 oxygen Substances 0.000 claims description 6
- 229920001721 polyimide Polymers 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 2
- 238000005260 corrosion Methods 0.000 claims 1
- 230000007797 corrosion Effects 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 12
- 230000000694 effects Effects 0.000 abstract description 9
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 238000005265 energy consumption Methods 0.000 abstract description 3
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 230000005611 electricity Effects 0.000 abstract description 2
- 230000008021 deposition Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000017525 heat dissipation Effects 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
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Abstract
The invention relates to a manufacturing method of a micro-flow refrigeration channel, which comprises the following steps: forming a sacrificial layer on a substrate to be refrigerated; patterning the sacrificial layer according to the design shape of the microfluidic refrigeration channel; depositing a capping layer over the sacrificial layer; releasing the sacrificial layer, wherein the cover layer stands on the substrate to be refrigerated and forms a micro-flow refrigeration channel with the substrate to be refrigerated. And in addition, the chip integrated with the micro-flow refrigeration channel based on the method is also related. The micro-flow refrigerating channel is integrated on the substrate to be refrigerated by adopting the MEMS micro-processing technology, the technology is simple and easy to realize, is suitable for being compatible with the traditional semiconductor technology, does not generate internal stress, adhesion force and the like between the chip and the channel material, does not influence electricity and the like of the chip, and keeps the normal functions and performances of the chip. The manufactured micro-flow refrigerating channel is closer to the heating source, can realize targeted refrigerating design, has reliable refrigerating effect and low energy consumption, requires smaller space, and can better meet the refrigerating requirement of chips.
Description
Technical Field
The invention belongs to the technical field of chip refrigeration, and particularly relates to a manufacturing method of a micro-flow refrigeration channel and a chip integrated with the micro-flow refrigeration channel based on the method.
Background
With the rapid development of semiconductor technology, high integration miniaturization has become one of the most important development directions of electronic products. Nowadays, in electronic products, transistors for controlling current and storing information are smaller and smaller, the number of transistors integrated in a unit chip area is larger and larger, and the application of the chip is limited by the high heat generated by the transistors, and although a low-power consumption and low-heat mode is a serious problem in the chip miniaturization research process, the heat generated by the chip in the continuous working process of the chip is not small enough, so how to control the heat generated by the chip is one of the important problems in the application of the high-integration miniaturized chip.
In order to prevent the electronic products, i.e. the chips, from overheating and to maintain the high efficiency and long service life of the chips, conventional chips generally use a heat dissipation method such as liquid cooling or air cooling, for example, a circulating water cooling device or a fan air cooling device used in a large-scale host system or a computer. However, conventional liquid cooling and air cooling techniques have their own drawbacks: the liquid cooling technology needs to consume a large amount of water resources; the air cooling technology is difficult to obtain a reliable refrigeration effect, and can generate noise and consume extra power; at the same time, the cooling devices occupy larger volume space, which is a great disadvantage for highly integrated and miniaturized products.
Chinese patent CN109524373a discloses a three-dimensional active heat dissipation packaging structure of embedded micro-fluidic channel and its manufacturing process, which integrates micro-fluidic channel structure with a size of micrometer level on the back of functional chip, introduces coolant to take away the heat generated by the active area of the chip, and can improve the heat dissipation effect of the chip; the micro-channel structure is directly formed by etching the back of the chip, and then the micro-channel cover plate is bonded on the back of the chip, so that the mode needs thicker chip thickness on one hand, correspondingly increases the production cost, and on the other hand, the problems of high operation cost, high operation difficulty and the like exist in the chip etching, and the bonding connection reliability between the micro-channel cover plate and the chip is difficult to ensure.
Disclosure of Invention
The invention relates to a manufacturing method of a micro-flow refrigeration channel and a chip integrated with the micro-flow refrigeration channel based on the method, which at least can solve part of defects in the prior art.
The invention relates to a manufacturing method of a micro-flow refrigeration channel, which comprises the following steps:
s1, forming a sacrificial layer on a substrate to be refrigerated;
s2, patterning the sacrificial layer according to the design shape of the micro-flow refrigerating channel;
s3, depositing a cover layer on the sacrificial layer;
s4, releasing the sacrificial layer, wherein the cover layer stands on the substrate to be refrigerated and forms a micro-flow refrigeration channel with the substrate to be refrigerated in a surrounding manner.
As one embodiment, the capping layer is formed using a silicon nitride, silicon carbide, or silicon oxynitride deposition.
As one embodiment, the sacrificial layer is made of a silicon-based sacrificial material, a carbon-based sacrificial material, or a polyimide-based sacrificial material.
In the step S4, when the sacrificial layer is made of a silicon-based sacrificial material, an acid etching method is used to release the sacrificial layer;
when the sacrificial layer is made of carbon-based sacrificial materials or polyimide sacrificial materials, in S4, oxygen high-temperature reaction or oxygen microwave mode is adopted to release the sacrificial layer.
In an embodiment, in S2, after patterning the sacrificial layer, the photoresist and the etching residues are removed by cleaning.
As one embodiment, the thickness of the sacrificial layer is 6 to 20 μm.
As one embodiment, the substrate to be cooled is a chip wafer.
The invention also relates to a chip, which comprises a chip wafer, wherein the micro-flow refrigerating channel is integrated on the chip wafer by adopting the manufacturing method of the micro-flow refrigerating channel.
The invention has at least the following beneficial effects:
The micro-flow refrigerating channel is integrated on the substrate to be refrigerated by adopting the MEMS micro-processing technology, the technology is simple and easy to realize, is suitable for being compatible with the traditional semiconductor technology, does not generate internal stress, adhesion force and the like between the chip and the channel material, does not influence electricity and the like of the chip, and keeps the normal functions and performances of the chip. The manufactured micro-flow refrigerating channel is closer to the heating source, can realize targeted refrigerating design, has reliable refrigerating effect and low energy consumption, requires smaller space, and can better meet the refrigerating requirement of chips.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 to fig. 4 are schematic views of a manufacturing process of a micro-flow refrigeration channel according to an embodiment of the present invention; wherein, fig. 1 is a schematic diagram of step S1, fig. 2 is a schematic diagram of step S2, fig. 3 is a schematic diagram of step S3, and fig. 4 is a schematic diagram of step S4;
FIG. 5 is a schematic diagram of a microfluidic refrigeration channel according to an embodiment of the present invention;
fig. 6 to fig. 9 are schematic views illustrating a manufacturing process of another microfluidic refrigeration channel (a microfluidic refrigeration channel is formed on a substrate) according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1 to fig. 4, an embodiment of the present invention provides a method for manufacturing a micro-flow refrigeration channel, including:
s1, forming a sacrificial layer 2 on a substrate 1 to be refrigerated;
S2, patterning the sacrificial layer 2 according to the design shape of the micro-flow refrigeration channel 4;
s3, depositing a cover layer 3 on the sacrificial layer 2;
s4, releasing the sacrificial layer 2, wherein the cover layer 3 stands on the substrate 1 to be refrigerated and forms a micro-flow refrigeration channel 4 with the substrate 1 to be refrigerated in a surrounding manner.
In this embodiment, one of the purposes is to integrate the microfluidic refrigeration channel 4 on the chip, and then the substrate 1 to be refrigerated is optionally a chip wafer; of course, the material of the substrate 1 is not limited to this one, and the microfluidic refrigeration channel 4 manufactured by the above method is obviously also suitable for cooling other devices, which is not exemplified here.
When the substrate 1 to be cooled adopts a chip wafer, the fabrication of the microfluidic cooling channel 4 can be performed after the functional processing of the base is completed by the chip wafer, so as to avoid damage to the cover layer 3 and the like when the microfluidic cooling channel 4 is integrated first and then the base functional processing is performed.
Preferably, in S1, the sacrificial layer 2 is made of a silicon-based sacrificial material, a carbon-based sacrificial material or a polyimide-based sacrificial material, which have a mature sacrificial release technique. Preferably, when the sacrificial layer 2 is made of a silicon-based sacrificial material, in S4, an acid etching method is used to release the sacrificial layer 2; when the sacrificial layer 2 is made of a carbon-based sacrificial material or a polyimide sacrificial material, in S4, oxygen high-temperature reaction or oxygen microwave mode is adopted to release the sacrificial layer 2.
For the disposition of the sacrificial layer 2, a manner of coating the material of the sacrificial layer 2 on the substrate 1 may be adopted. The thickness of the sacrificial layer 2 may be determined according to factors such as the design depth of the microfluidic refrigeration channel 4, and in this embodiment, the thickness of the sacrificial layer 2 may be between 6 and 20 μm, and more preferably controlled between 10 and 20 μm.
Further optimizing the above method, in S2, the patterning of the sacrificial layer 2 is performed as a conventional technique, and in one embodiment, the patterning of the sacrificial layer 2 is performed using a semiconductor etching technique. Specifically, as shown in fig. 2 and 3, the patterned sacrificial layer 2 includes a bump structure and a sink structure; the shape of the protruding structure is the same as the shape of the micro-flow refrigerating channel 4 (the number and the layout of the protruding blocks are the same as the number and the layout of the micro-flow channels of the micro-flow refrigerating channel 4, the height of the protruding blocks is the same as the depth of the micro-flow channels, the width of the single protruding block is the same as the width of the micro-flow channels), when the cover layer 3 is deposited, the protruding structure plays a role in supporting and shaping, and when the protruding structure is released, the supported cover material can be enclosed with the base material 1 to form the micro-flow channels; the depth of the sink structure is preferably the same as the height of the sacrificial layer 2, that is, the etching depth is the same as the height of the sacrificial layer 2 when the sacrificial layer 2 is patterned, when the capping layer 3 is deposited, the capping material can be directly deposited on the substrate 1 at the sink structure, so that on one hand, the capping layer 3 can be supported stably on the substrate 1, and on the other hand, the non-set series flow between adjacent micro channels can be avoided.
In one embodiment, as shown in fig. 5, the micro-fluidic cooling channel 4 has a serpentine shape, and the sacrificial layer 2 is patterned correspondingly.
The cover layer 3 has the requirement of standing on the base material 1 after the sacrificial layer 2 is released, and meanwhile, the cover layer 3 needs to be enclosed with the base material 1 to form a micro-flow refrigerating channel 4, so that the micro-flow refrigerating channel 4 is preferably ensured to allow the flow to meet the chip refrigerating capacity requirement, and therefore, the material of the cover layer 3 is preferably a material with relatively stable performance and structure; in one embodiment, the capping layer 3 is formed by deposition of silicon nitride, silicon carbide, or silicon oxynitride.
The deposition of the cover layer 3 is a conventional technique, and the thickness of the cover layer 3 may be defined according to the specific situation, and in one embodiment, the thickness of the cover layer 3 is in the range of 8-10 μm, so that the structural strength and the operational reliability of the cover layer 3 can be ensured.
Further preferably, in S2, after patterning the sacrificial layer 2, the photoresist and the etching residues are cleaned and removed, so as to ensure the deposition effect and the operation reliability of the capping layer 3.
Preferably, when the substrate 1 is a chip wafer, the cover layer 3 is packaged together during packaging of the chip wafer, so that the cover layer 3 can be well protected, and the operation reliability of the micro-flow refrigeration channel 4 can be improved.
As a preferable scheme, as shown in fig. 6-9, on the basis of forming the above-mentioned micro-flow refrigerating channel 4, a micro-flow refrigerating channel 11 is further formed on the base material 1 (for example, by adopting an etching processing mode), the micro-flow refrigerating channel 11 and the micro-flow refrigerating channel 4 are arranged in a staggered manner, after the micro-flow refrigerating channel 4 is formed, the micro-flow refrigerating channel 11 is connected with the micro-flow refrigerating channel 4 in an end-to-end manner, for example, the micro-flow refrigerating channel 11 penetrates through one side wall of the base material 1 to form a medium inlet, the outlet end of the micro-flow refrigerating channel 11 is communicated with the inlet end of the micro-flow refrigerating channel 4, and the outlet pipe of the micro-flow refrigerating channel 4 is formed to be a medium outlet; with the above structure, the circulation length and cooling area of the micro-flow refrigeration medium can be remarkably increased, so that the cooling effect on the substrate 1 is remarkably improved, and the cooling process is more reliable. Before the micro-flow refrigerating channel 4 is manufactured, the micro-flow refrigerating channel 11 is formed on the base material 1 by etching in advance, then, when the sacrificial layer 2 is formed, the sacrificial material is filled into the micro-flow refrigerating channel 11, and when the sacrificial layer 2 is released, the sacrificial material in the micro-flow refrigerating channel 11 is released, so that a structure that the micro-flow refrigerating channel 4 is communicated with the micro-flow refrigerating channel 11 in a connecting way is formed, the manufacturing is convenient, and the integration of a refrigerating channel formed by the micro-flow refrigerating channel 4 and the micro-flow refrigerating channel 11 in a connecting and conducting way can be ensured. As shown in fig. 7-9, in order to ensure the support of the cover layer 3 to be stable, the micro-groove width of the micro-flow refrigerating groove 11 is smaller than the sink width of the sink structure; meanwhile, as shown in fig. 8 and 9, the micro-flow refrigerating channel 11 can be closed by the cover layer 3 deposited in the sink structure, a cover plate is not required to be additionally arranged, the operation is convenient, the material consumption can be saved, the manufacturing process can be reduced, and the closing reliability is high.
The manufacturing method of the micro-flow refrigeration channel provided by the embodiment adopts the MEMS micro-processing technology to integrate the micro-flow refrigeration channel 4 on the substrate 1 to be refrigerated, has simple technology and easy realization, is suitable for being compatible with the traditional semiconductor technology, does not generate internal stress, adhesion force and the like between the chip and the channel material, does not cause electrical influence on the chip and the like, and keeps the normal functions and performances of the chip. The manufactured micro-flow refrigerating channel 4 is closer to a heating source, can realize targeted refrigerating design, has reliable refrigerating effect and low energy consumption, requires smaller space, and can better meet the refrigerating requirement of chips.
Example two
The embodiment of the invention provides a chip, which comprises a chip wafer, wherein the micro-flow refrigerating channel 4 is integrated on the chip wafer by adopting the manufacturing method of the micro-flow refrigerating channel provided by the first embodiment. The structure of the micro-fluid cooling channel 4 is described in the first embodiment, and specifically includes:
As shown in fig. 4, the micro-flow cooling channel 4 is formed by enclosing a substrate 1 to be cooled and a cover layer 3 deposited on the substrate 1 to be cooled, the cover layer 3 comprises a cover platform deposited on the surface of the substrate 1 to be cooled and a plurality of inverted U-shaped stacking tables protruding from the cover platform and sequentially connected in series, the cover platform is correspondingly formed with a notch so that each inverted U-shaped stacking table can form micro-flow channels with the surface of the substrate 1 to be cooled, and as each inverted U-shaped stacking table is sequentially connected in series, each micro-flow channel is sequentially connected in series to form the micro-flow cooling channel 4. The cover platform and inverted U-shaped stack are obviously formed by patterning the sacrificial layer.
In one embodiment, as shown in fig. 5, the micro-flow refrigeration channels 4 are distributed in a serpentine shape, so as to prolong the residence time of the working medium and increase the heat exchange area, thereby improving the refrigeration efficiency and effect.
The cover layer 3 needs to be suitable for standing on the base material 1, and meanwhile, the cover layer needs to be enclosed with the base material 1 to form a micro-flow refrigerating channel 4, so that the micro-flow refrigerating channel 4 is preferably ensured to allow the flow to meet the chip refrigerating capacity requirement, and therefore, the material of the cover layer 3 is preferably a material with relatively stable performance and structure; in one embodiment, the capping layer 3 is formed by deposition of silicon nitride, silicon carbide, or silicon oxynitride.
The thickness of the cover layer 3 may be defined according to the specific circumstances, and in one embodiment, the thickness of the cover layer 3 is in the range of 8 to 10 μm, so that the structural strength and the operational reliability of the cover layer 3 can be ensured.
As a preferable scheme, as shown in fig. 6-9, on the basis of forming the above-mentioned micro-flow refrigerating channel 4, a micro-flow refrigerating channel 11 is further formed on the base material 1 (for example, by adopting an etching processing mode), the micro-flow refrigerating channel 11 and the micro-flow refrigerating channel 4 are arranged in a staggered manner, after the micro-flow refrigerating channel 4 is formed, the micro-flow refrigerating channel 11 is connected with the micro-flow refrigerating channel 4 in an end-to-end manner, for example, the micro-flow refrigerating channel 11 penetrates through one side wall of the base material 1 to form a medium inlet, the outlet end of the micro-flow refrigerating channel 11 is communicated with the inlet end of the micro-flow refrigerating channel 4, and the outlet pipe of the micro-flow refrigerating channel 4 is formed to be a medium outlet; with the above structure, the circulation length and cooling area of the micro-flow refrigeration medium can be remarkably increased, so that the cooling effect on the substrate 1 is remarkably improved, and the cooling process is more reliable. As shown in fig. 7-9, in order to ensure the support of the cover layer 3 to be stable, the micro-groove width of the micro-flow refrigerating groove 11 is smaller than the sink width of the sink structure; meanwhile, as shown in fig. 8 and 9, the micro-flow refrigerating channel 11 can be closed by the cover layer 3 (i.e. the cover surface platform) deposited in the sink structure, a cover plate is not needed to be additionally arranged, the operation is convenient, the material consumption can be saved, the manufacturing process can be reduced, and the closing reliability is high.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, alternatives, and improvements that fall within the spirit and scope of the invention.
Claims (8)
1. A method of making a microfluidic refrigeration channel, comprising:
s0, processing a substrate to be refrigerated in advance to form a micro-flow refrigeration channel;
S1, forming a sacrificial layer on a substrate to be refrigerated, wherein the sacrificial material fills the micro-flow refrigerating channel;
S2, patterning the sacrificial layer according to the design shape of the micro-flow refrigerating channel; the patterned sacrificial layer comprises a convex structure and a sinking groove structure;
s3, depositing a cover layer on the sacrificial layer;
S4, releasing the sacrificial layer, wherein the cover layer stands on the substrate to be refrigerated and forms a micro-flow refrigeration channel with the substrate to be refrigerated in a surrounding manner;
the micro-flow refrigerating channel and the micro-flow refrigerating channel are arranged in a staggered mode, and the micro-flow refrigerating channel are connected end to end; in S4, the cover surface material supported at the protruding structure and the base material to be refrigerated are enclosed to form a micro-flow refrigeration channel, the sacrificial material in the micro-flow refrigeration channel is released together, and the micro-flow refrigeration channel is closed by the cover surface material deposited in the sink structure.
2. The method for manufacturing the micro-fluidic cooling channel according to claim 1, wherein: the capping layer is formed by depositing silicon nitride, silicon carbide or silicon oxynitride.
3. The method for manufacturing the micro-fluidic cooling channel according to claim 1, wherein: the sacrificial layer is made of a silicon-based sacrificial material, a carbon-based sacrificial material or a polyimide sacrificial material.
4. A method of making a microfluidic refrigeration channel as claimed in claim 3 wherein:
when the sacrificial layer is made of a silicon-based sacrificial material, in S4, releasing the sacrificial layer by adopting an acid corrosion method;
when the sacrificial layer is made of carbon-based sacrificial materials or polyimide sacrificial materials, in S4, oxygen high-temperature reaction or oxygen microwave mode is adopted to release the sacrificial layer.
5. The method for manufacturing the micro-fluidic cooling channel according to claim 1, wherein: and S2, after the sacrificial layer is patterned, cleaning and removing the photoresist and etching residues.
6. The method for manufacturing the micro-fluidic cooling channel according to claim 1, wherein: the thickness of the sacrificial layer is 6-20 mu m.
7. The method for manufacturing the micro-fluidic cooling channel according to claim 1, wherein: the substrate to be refrigerated is a chip wafer.
8. A chip comprising a chip wafer, characterized in that: a microfluidic refrigeration channel is integrated on a chip wafer using the method of manufacturing a microfluidic refrigeration channel as claimed in any one of claims 1 to 6.
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| US20060001039A1 (en) * | 2004-06-30 | 2006-01-05 | Stmicroelectronics, Inc. | Method of forming buried channels and microfluidic devices having the same |
| US7855123B2 (en) * | 2009-03-31 | 2010-12-21 | Tokyo Electron Limited | Method of integrating an air gap structure with a substrate |
| KR101675028B1 (en) * | 2010-07-07 | 2016-11-10 | 할루크 쿨라 | Cmos compatible microchannel heat sink for electronic cooling and its fabrication |
| FR3088109A1 (en) * | 2018-11-07 | 2020-05-08 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | METHOD FOR MANUFACTURING A COOLING CIRCUIT |
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