CN113515469B - Method for creating and deleting namespace and solid-state storage device - Google Patents
Method for creating and deleting namespace and solid-state storage device Download PDFInfo
- Publication number
- CN113515469B CN113515469B CN202110485960.1A CN202110485960A CN113515469B CN 113515469 B CN113515469 B CN 113515469B CN 202110485960 A CN202110485960 A CN 202110485960A CN 113515469 B CN113515469 B CN 113515469B
- Authority
- CN
- China
- Prior art keywords
- namespace
- unit
- logical address
- command
- entry
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Stored Programmes (AREA)
Abstract
Methods and solid state storage devices for creating and deleting namespaces are provided. The name space creation method comprises the steps of receiving a command for creating the name space, wherein the command indicates the size of the name space to be created, allocating a name space identifier for the name space to be created, and adding an entry in an NS unit mapping table to record the name space identifier.
Description
Technical Field
The present invention relates to solid state storage devices, and in particular, to providing multiple namespaces in a solid state storage device.
Background
Taking a solid state storage device (Solid Storage Device, SSD) as an example, a block diagram of the storage device is shown in FIG. 1. The solid state storage device 102 is coupled to a host for providing storage capability for the host. The host and solid state storage device 102 may be coupled in a variety of ways including, but not limited to, by, for example, SATA (SERIAL ADVANCED Technology Attachment ), SCSI (Small Computer System interface), SAS (SERIAL ATTACHED SCSI ), IDE (INTEGRATED DRIVE Electronics, integrated drive Electronics), and, USB (Universal Serial Bus ), PCIE (PERIPHERAL COMPONENT INTERCONNECT EXPRESS, PCIE, peripheral component interconnect Express), NVMe (NVM Express, nonvolatile storage at high speed), ethernet, fibre channel, wireless communication network, etc. connect the host and the solid-state storage device 102. The host may be an information processing device capable of communicating with the storage device in the manner described above, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, or the like. The Memory device 102 includes an interface 103, a control unit 104, one or more NVM (Non-Volatile Memory) chips 105, and a DRAM (Dynamic Random Access Memory) 110.NAND flash memory, phase change memory, feRAM, MRAM, etc. are common NVM. The interface 103 may be adapted to exchange data with a host by means of, for example SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc. The control unit 104 is used to control data transfer among the interface 103, NVM chip 105, and DRAM 110, and also for memory management, host logical address to flash physical address mapping, erase balancing, bad block management, etc. The control component 104 can be implemented in a variety of ways, either in software, hardware, firmware, or a combination thereof. The control component 104 may be in the form of an FPGA (Field-programmable gate array), an ASIC (Application SPECIFIC INTEGRATED Circuit), or a combination thereof. the control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process IO commands. Control unit 104 is also coupled to DRAM 110 and may access data of DRAM 110. FTL tables and/or cached data of IO commands may be stored in the DRAM.
The control unit 104 includes a flash interface controller (or referred to as a flash channel controller). The flash interface controller is coupled to the NVM chip 105 and issues commands to the NVM chip 105 in a manner that follows the interface protocol of the NVM chip 105 to operate the NVM chip 105 and receive command execution results output from the NVM chip 105. The interface protocols of NVM chip 105 include well-known interface protocols or standards such as "Toggle", "ONFI".
The memory Target (Target) is one or more Logic units (Logic units) of a shared Chip Enable (CE) signal within the NAND flash package. Each logical unit has a logical unit number (LUN, logic Unit Number). One or more dies (Die) may be included within the NAND flash package. Typically, the logic unit corresponds to a single die. The logic cell may include multiple planes (planes). Multiple planes within a logic unit may be accessed in parallel, while multiple logic units within a NAND flash memory chip may execute commands and report status independently of each other. In "Open NAND FLASH INTERFACE Specification (Revision 3.0)" available from http:// www.micron.com// media/Documents/Products/other%20Documents/ON FI3—0gold. Ashx, meanings regarding target, logical unit, LUN, plane are provided, which are part of the prior art.
Data is typically stored and read on a storage medium on a page basis. While data is erased in blocks. A block contains a plurality of pages. Pages on a storage medium (called physical pages) have a fixed size, e.g., 17664 bytes. The physical pages may also have other sizes.
In a solid state storage device, FTL (Flash Translation Layer ) is utilized to maintain mapping information from logical addresses to physical addresses. The logical addresses constitute the storage space of the solid state storage device as perceived by upper level software such as the operating system. The physical address is an address for accessing a physical storage unit of the solid state storage device. Address mapping can also be implemented in the prior art using an intermediate address modality. For example, logical addresses are mapped to intermediate addresses, which in turn are further mapped to physical addresses.
The table structure storing mapping information from logical addresses to physical addresses is called FTL table. FTL tables are important metadata in solid state storage devices. Typically, the data items of the FTL table record address mapping relationships in units of data pages in the solid-state storage device.
FTL tables include a plurality of FTL table entries (or entries). In one embodiment, a correspondence of one logical page address to one physical page is recorded in each FTL table entry. In another example, correspondence between consecutive logical page addresses and consecutive physical pages is recorded in each FTL table entry. In yet another embodiment, a correspondence of logical block addresses to physical block addresses is recorded in each FTL table entry. In still another embodiment, the FTL table records a mapping relationship between a logical block address and a physical block address, and/or a mapping relationship between a logical page address and a physical page address.
A Namespace (NS) is also defined in the NVMe protocol. A namespace of size n is a collection of logical blocks with logical block addresses from 0 to n-1. Namespaces can be uniquely identified by namespace IDs (NAMESPACE ID, NSID). The namespace can be at the host
Shared between/NVMe controllers. The host can access different namespaces through a single NVMe controller. Different hosts can also access the same namespace through multiple NVMe controllers. The logical blocks may be addressed and accessed. Each FTL table entry may correspond to one or more logical blocks, or a plurality of FTL table entries may collectively correspond to one logical block.
Disclosure of Invention
The solid state storage device needs a namespace that implements NVMe protocol and supports creation, deletion, and access to the solid state storage device per namespace of the namespace.
According to a first aspect of the present application there is provided a method of first processing an IO command according to the first aspect of the present application, the IO command having a namespace identifier and a namespace logical address indicated therein, the method comprising mapping the namespace identifier and the namespace logical address to a physical address, accessing the physical address in response to the IO command.
According to a first aspect of the present application, there is provided a method of processing an IO command according to the second aspect of the present application, further comprising obtaining one or more namespace units corresponding to the namespace identifier, wherein a namespace unit indicates a continuous global logical address space, selecting a first namespace unit from the one or more namespace units according to the namespace logical address, wherein the global logical address space indicated by the first namespace unit provides a global logical address accessed by the IO command, deriving the global logical address accessed by the IO command according to an offset of the namespace logical address within the global logical address space indicated by the first namespace unit, and converting the global logical address accessed by the IO command into the physical address.
According to a second method for processing IO command in the first aspect of the application, a third method for processing IO command in the first aspect of the application is provided, and the method further comprises selecting a second namespace unit from the one or more namespace units according to the length of the namespace logical address of the IO command, wherein the global logical address space indicated by the second namespace unit provides the global logical address accessed by the IO command, and obtaining the second global logical address accessed by the IO command according to the part of the length of the namespace logical address of the IO command in the global logical address space indicated by the second namespace unit.
The method for processing IO commands according to the first aspect of the application provides a method for processing IO commands according to the fourth aspect of the application, and further comprises the steps of obtaining a base address of an NS unit mapping table entry according to the name space identifier, wherein the NS unit mapping table entry takes the name space identifier as an index, takes a head address of an FTL table entry of a global logic address space indicated by one or more name space units corresponding to the name space identifier as content, calculating an offset value in the obtained NS unit mapping table entry according to the name space logic address, obtaining the head address of the FTL table entry at the offset value in the obtained NS unit mapping table entry, obtaining the FTL table entry according to the head address of the FTL table entry and the offset value of the FTL table entry calculated according to the name space logic address, and obtaining the physical address from the FTL table entry.
According to a fourth method for processing IO command in the first aspect of the application, there is provided a fifth method for processing IO command in the first aspect of the application, further comprising obtaining a head address of a next FTL table entry after the head address of the obtained FTL table entry in the obtained NS unit mapping table entry according to the name space logical address and name space logical address length of the IO command, obtaining a second FTL table entry according to the head address of the next FTL table entry and the name space logical address length calculated FTL table entry offset value, and obtaining the physical address from the second FTL table entry.
According to a second aspect of the present application, there is provided an apparatus for processing an IO command according to the first aspect of the present application, the IO command indicating therein a namespace identifier and a namespace logical address, the apparatus comprising an address mapping module for mapping the namespace identifier and the namespace logical address to a physical address, and an access module for accessing the physical address in response to the IO command.
According to a third aspect of the present application there is provided a first namespace creation method according to the third aspect of the present application comprising receiving a command to create a namespace, the command indicating a size of a namespace to be created, allocating one or more namespace units depending on the size of the namespace to be created, wherein the namespace units indicate a continuous global logical address space, allocating a namespace identifier for the namespace to be created, adding an entry in an NS unit mapping table to record the namespace identifier and the allocated one or more namespace units.
According to a first namespace creation method of a third aspect of the present application, there is provided a second namespace creation method according to the third aspect of the present application, wherein available namespace units are obtained from an NS unit allocation table and allocated to namespaces to be created, wherein an entry of the NS unit allocation table records whether a namespace unit is allocated to a namespace.
According to the first or second namespace creation method of the third aspect of the present application, there is provided the third namespace creation method according to the third aspect of the present application, further comprising recording the NS unit mapping table or an update of the NS unit mapping table to the NVM chip.
According to a second namespace creation method of the third aspect of the present application, there is provided a fourth namespace creation method according to the third aspect of the present application, further comprising recording an NS unit allocation table or an update of the NS unit allocation table to the NVM chip.
According to one of the first to fourth processing namespaces creation methods of the third aspect of the present application, there is provided a fifth namespaces creation method according to the third aspect of the present application, wherein one or more namespace units in the NS unit map table entry are ordered, a location of the NS unit in the NS unit map table entry indicating a location of the NS unit in the global logical address space.
According to a fourth aspect of the present application, there is provided a first namespace creation apparatus according to the fourth aspect of the present application, comprising a command receiving module for receiving a command to create a namespace, the command indicating a size of the namespace to be created, a namespace unit allocation module for allocating one or more namespace units according to the size of the namespace to be created, wherein the namespace units indicate a continuous global logical address space, an identifier allocation module for allocating a namespace identifier for the namespace to be created, and an NS unit mapping table module for adding an entry in an NS unit mapping table to record the namespace identifier and the allocated one or more namespace units.
According to a fifth aspect of the present application, there is provided a first namespace deletion method according to the fifth aspect of the present application, comprising receiving a command to delete a namespace, the command indicating a namespace identifier of the namespace to be deleted, deleting an entry indexed by the namespace identifier from an NS unit mapping table, wherein the NS unit mapping table entry is indexed by the namespace identifier and the first address of FTL table entry of the continuous global logical address space indicated by the namespace unit to which the namespace identifier corresponds is content, and retrieving the namespace identifier.
According to a first namespace deletion method of a fifth aspect of the present application, there is provided a second namespace deletion method of the fifth aspect of the present application, further comprising marking in the NS unit allocation table a namespace unit recorded in an entry of the NS unit mapping table deleted as unallocated, wherein the entry of the NS unit allocation table records whether the namespace unit is allocated to the namespace.
According to the first or second namespace deletion method of the fifth aspect of the present application, there is provided a third namespace deletion method according to the fifth aspect of the present application, further comprising moving all entries subsequent to the deleted entry in the NS unit mapping table to fill the storage space occupied by the deleted entry.
According to one of the first to third namespaces deletion methods of the fifth aspect of the present application, there is provided a fourth namespaces deletion method according to the fifth aspect of the present application, further comprising recording the NS unit mapping table or an update of the NS unit mapping table to the NVM chip.
According to a second namespace deletion method of the fifth aspect of the present application, there is provided a fifth namespace deletion method according to the fifth aspect of the present application, further comprising recording the NS unit allocation table or an update of the NS unit allocation table to the NVM chip.
According to one of the first to fifth namespace deletion methods of the fifth aspect of the present application, there is provided a sixth namespace deletion method according to the fifth aspect of the present application, wherein the recovered namespace identifier can be assigned to a new namespace.
According to a sixth aspect of the present application, there is provided a first namespace deleting apparatus according to the sixth aspect of the present application, comprising a command receiving module configured to receive a command for deleting a namespace, the command indicating a namespace identifier of the namespace to be deleted, an NS unit mapping table module configured to delete an entry indexed by the namespace identifier from an NS unit mapping table, wherein the NS unit mapping table entry is indexed by the namespace identifier and a first address of FTL table entry of a consecutive global logical address space indicated by a namespace unit corresponding to the namespace identifier is content, and an identifier retrieving module configured to retrieve the namespace identifier.
According to a seventh aspect of the present application, there is provided a first namespace creation method according to the seventh aspect of the present application, comprising receiving a command to create a namespace, the command indicating a size of the namespace to be created, assigning a namespace identifier to the namespace to be created, and adding an entry in an NS unit mapping table to record the namespace identifier.
According to a seventh aspect of the present application, there is provided a second namespace creation method according to the seventh aspect of the present application, further comprising receiving an IO command, wherein a namespace identifier and a namespace logical address are indicated in the IO command, assigning namespace units to the namespace logical addresses, wherein a namespace unit indicates a continuous global logical address space, recording the assigned namespace units in entries indexed by the namespace identifier in an NS unit mapping table, mapping to physical addresses according to the assigned namespace units and the namespace logical address indicated by the IO command, and accessing the physical addresses in response to the IO command.
According to a seventh aspect of the present application, there is provided the third namespace creation method according to the seventh aspect of the present application, further comprising, if a namespace unit has been allocated for the namespace logical address, mapping to a physical address based on the allocated namespace unit and the namespace logical address indicated by the IO command without re-allocating the namespace unit, wherein the namespace unit indicates a continuous global logical address space.
According to one of the first to third namespace creation methods of the seventh aspect of the present application, there is provided the fourth namespace creation method according to the seventh aspect of the present application, wherein one or more namespace units are allocated depending on the namespace logical address and the namespace logical address length of the IO command.
According to one of the second to fourth namespaces creation methods of the seventh aspect of the present application, there is provided the fifth namespace creation method of the seventh aspect of the present application, further comprising obtaining a global logical address accessed by the IO command according to an offset of the namespace logical address within a global logical address space indicated by the namespace unit, and converting the global logical address accessed by the IO command into the physical address.
According to one of the second to fourth namespaces creation methods of the seventh aspect of the present application, there is provided a sixth namespace creation method according to the seventh aspect of the present application, further comprising retrieving a head address of an FTL table entry according to the namespaces unit, deriving an FTL table entry according to an offset of the head address of the FTL table entry from a logical address of the namespaces within a global logical address space indicated by the namespaces unit, and deriving the physical address from the FTL table entry.
According to one of the second to sixth namespace creation methods of the seventh aspect of the present application, there is provided the seventh namespace creation method of the seventh aspect of the present application, wherein the allocated namespace unit is recorded in a first location in an entry indexed by the namespace identifier in an NS unit mapping table, wherein the first location corresponds to a location of a namespace logical address of the IO command in a namespace logical address space accessed by the IO command.
According to one of the second to seventh namespaces creation methods of the seventh aspect of the present application, there is provided the eighth namespaces creation method according to the seventh aspect of the present application, wherein the allocated namespaces units are available namespaces units obtained from an NS unit allocation table, wherein an entry of the NS unit allocation table records whether a namespaces unit is allocated to the namespaces.
According to one of the second to eighth namespaces creation methods of the seventh aspect of the present application, there is provided a ninth namespaces creation method according to the seventh aspect of the present application, further comprising recording the NS unit mapping table or an update of the NS unit mapping table to the NVM chip.
According to a ninth namespace creation method of the seventh aspect of the present application, there is provided a tenth namespace creation method according to the seventh aspect of the present application, further comprising recording the NS unit allocation table or an update of the NS unit allocation table to the NVM chip.
According to an eighth aspect of the present application, there is provided the first namespace creation apparatus according to the eighth aspect of the present application, comprising a command receiving module for receiving a command to create a namespace, the command indicating a size of the namespace to be created, an identifier assigning module for assigning a namespace identifier to the namespace to be created, and an NS unit mapping table module for adding an entry in an NS unit mapping table to record the namespace identifier.
According to a ninth aspect of the present application, there is provided a first IO command processing method according to the ninth aspect of the present application, comprising receiving an IO command, wherein a namespace identifier and a namespace logical address are indicated in the IO command, assigning namespace units to the namespace logical addresses, wherein a namespace unit indicates a continuous global logical address space, recording the assigned namespace units in entries indexed by the namespace identifier in an NS unit mapping table, mapping to a physical address according to the assigned namespace units and the namespace logical address indicated by the IO command, and accessing the physical address in response to the IO command.
According to a first IO command processing method of a ninth aspect of the present application, there is provided a second IO command processing method of the ninth aspect of the present application, further comprising, if a namespace unit has been allocated for the namespace logical address, mapping to a physical address according to the allocated namespace unit and the namespace logical address indicated by the IO command without re-allocating the namespace unit, wherein the namespace unit indicates a continuous global logical address space.
According to a first or second IO command processing method of the ninth aspect of the present application, there is provided a third IO command processing method according to the ninth aspect of the present application, wherein one or more namespace units are allocated according to a namespace logical address and a namespace logical address length of the IO command.
According to one of the first to third IO command processing methods of the ninth aspect of the present application, there is provided the fourth IO command processing method of the ninth aspect of the present application, wherein a global logical address accessed by the IO command is obtained in accordance with an offset of the namespace logical address in a global logical address space indicated by the namespace unit, and the global logical address accessed by the IO command is converted into the physical address.
According to one of the first to fourth IO command processing methods of the ninth aspect of the present application, there is provided the fifth IO command processing method of the ninth aspect of the present application, wherein a head address of an FTL table entry is obtained from the namespace unit, an FTL table entry is obtained from an offset of the head address of the FTL table entry and a global logical address space indicated by the namespace unit, and the physical address is obtained from the FTL table entry.
According to one of the first to fifth IO command processing methods of the ninth aspect of the present application, there is provided the sixth IO command processing method according to the ninth aspect of the present application, wherein the allocated namespace unit is recorded in a first location in an entry indexed by the namespace identifier in an NS unit mapping table, wherein the first location corresponds to a location of a namespace logical address of the IO command in a namespace logical address space accessed by the IO command.
According to one of the first to sixth IO command processing methods of the ninth aspect of the present application, there is provided the seventh IO command processing method according to the ninth aspect of the present application, wherein the allocating the namespace unit is obtaining an available namespace unit from an NS unit allocation table, wherein an entry of the NS unit allocation table records whether the namespace unit is allocated to the namespace.
According to a tenth aspect of the present application, there is provided a first IO command processing apparatus according to the tenth aspect of the present application, including a command receiving module configured to receive an IO command, wherein a namespace identifier and a namespace logical address are indicated in the IO command, a namespace unit allocating module configured to allocate a namespace unit for the namespace logical address, wherein the namespace unit indicates a continuous global logical address space, an NS unit mapping table module configured to record the allocated namespace unit in an entry indexed by the namespace identifier in the NS unit mapping table, an address mapping module configured to map a physical address according to the allocated namespace unit and the namespace logical address indicated by the IO command, and an access module configured to access the physical address in response to the IO command.
According to an eleventh aspect of the present application, there is provided a first solid-state storage device according to the eleventh aspect of the present application, comprising a controller and a non-volatile memory, wherein a processor in the controller executes a method according to any one of the first, third, fifth, seventh and ninth aspects of the present application by running a program.
Drawings
The invention, as well as a preferred mode of use and further objectives and advantages thereof, will best be understood by reference to the following detailed description of illustrative embodiments when read in conjunction with the accompanying drawings, wherein:
FIG. 1 illustrates a block diagram of a solid state storage device;
FIG. 2 is a schematic diagram of an FTL table and NS unit according to an embodiment of the present application;
FIG. 3A is an NS unit mapping table according to an embodiment of the application;
FIG. 3B is an NS unit allocation table according to an embodiment of the application;
FIG. 4 illustrates a flow chart for mapping a namespace logical address to a global logical address;
FIG. 5 is a flow chart of creating a namespace in accordance with an embodiment of the present application;
FIG. 6A is an NS unit mapping table prior to creation of a namespace in accordance with an embodiment of the application;
FIG. 6B is an NS unit allocation table prior to creation of a namespace in accordance with an embodiment of the application;
FIG. 7A is an NS unit mapping table after creation of a namespace according to an embodiment of the application;
FIG. 7B is an NS unit allocation table after creation of a namespace in accordance with an embodiment of the application;
FIG. 8 is a flow diagram of deleting namespaces according to an embodiment of the present application;
FIG. 9A is an NS unit mapping table prior to deleting a namespace in accordance with an embodiment of the application;
FIG. 9B is a table of NS unit allocations prior to deleting a namespace in accordance with an embodiment of the application;
FIG. 10A is an NS unit mapping table after deleting a namespace in accordance with an embodiment of the application;
FIG. 10B is an NS unit allocation table after deleting a namespace in accordance with an embodiment of the application, and
FIGS. 11A and 11B are flowcharts of creating namespaces and processing IO commands according to yet another embodiment of the present application.
Detailed Description
FIG. 2 is a schematic diagram of an FTL table and NS unit (namespace unit) according to an embodiment of the present application.
FTL table 21 includes FTL table entries (e.g., FTL table entries 210, 212). FTL table entries record the mapping relationship of logical addresses and physical addresses. FTL table 21 is maintained in memory. It will be appreciated that the logical address of FTL table entries need not be stored in memory, but rather the logical address is indicated by the address of the memory and the physical address is indicated by the stored value. FTL tables can also be recorded using other means known to those skilled in the art.
According to an embodiment of the present application, an NS unit (in fig. 2, the NS unit is indicated by each of NSUN1, NSUN2, NSUN 3) for providing storage capability for namespaces is provided. Each NS cell indicates a contiguous logical address space. For example, NSUN1 indicates logical address space 0~M-1, NSUN2 indicates logical address space M-2M-1, NSUN3 indicates logical address space 2M-
1-3M, NSUN k indicates the logical address space (k-1) M to (kM-1). The logical address space of each NS cell is much larger than the logical address space indicated by FTL table entries. For example, the logical address space of one NS unit is indicated by 1000 FTL table entries whose logical addresses are consecutive.
The logical address space indicated by FTL table 21 is referred to as global logical address space, and the logical address therein is referred to as global logical address. The NS units are ordered, with the NS unit's sequence number k indicating the NS unit's position in the global logical address space. Optionally, the NS element is indicated with the first address of the FTL table entry corresponding to the NS element. For example, referring to fig. 2, NSUN1 is identified with the head address of FTL table entry 210.
Fig. 3A is an NS unit mapping table according to an embodiment of the present application, and fig. 3B is an NS unit allocation table according to an embodiment of the present application.
Referring to fig. 3a, each entry of the NS unit mapping table records one of the namespaces identified by the NSID with one or more NS units assigned to that namespace. NSID is also known as a namespace identifier, which identifies a namespace. In fig. 3A, entry 310 of the NS unit mapping table records that a namespace with NSID 1 (abbreviated NS 1) is allocated 3 NS units (NSUN 1, NSUN9, and NSUN 12). One or more NS units recorded in an entry of the NS unit mapping table are ordered. The 3 NS units assigned to NS1 provide logical address space for NS1 in sequence. For example, the logical address space of NS1 is 0 to (3M-1), where NSUN1 provides the logical address space 0~M-1 of NS1, NSUN9 provides the logical address space M-2M-1 of NS1, and NSUN12 provides the logical address space 2M-3M-1 of NS 1.
As yet another example, the logical address space of NS1 is 0 to (3M-n) (where M is an integer and n is an integer less than M), where NSUN1 provides the logical address space 0~M-1 of NS1, NSUN9 provides the logical address space M-2M-1 of NS1, and NSUN12 provides the logical address space 2M-3M-n of NS 1. In this example, the logical address space provided by NSUN12 to NS1 is only a portion of the logical address space of NSUN 12. Even though the namespace NS1 requires only 1 logical block, it is allocated 1 complete N is a unit.
For clarity purposes, a logical address space that belongs to one namespace is referred to as a namespace logical address space, where the logical addresses are referred to as namespace logical addresses. It will be appreciated that in the logical address space of NS1 NSUN9 provides the M-2M-1 range of the namespace logical address space, while in solid state storage NSUN9 provides the 8M-9M-1 range of the global logical address space. It will still be appreciated that the translation between the global logical address space and the namespace logical address space is enabled by the NS unit (its sequence number or the head address of the FTL table entry). Thus, a plurality of NS units recorded in the entries of the NS unit mapping table provide a continuous address space (namespace logical address space) for each namespace, and, for any address of the namespace logical address space, can be mapped into the global logical address space by providing the NS unit of that address.
Referring to FIG. 3B, an NS unit allocation table records whether an NS unit of a solid-state storage device is allocated to a namespace. Since NSUN1, NSUN9, and NSUN12 are assigned to NS1 in fig. 3A. Accordingly, in fig. 3B, the entries of the NS unit allocation tables corresponding to NSUN1, NSUN9 and NSUN12 record that these NS units have been allocated. In fig. 3B it is also recorded that other NS units are not assigned to namespaces. Alternatively, only NS units that are not assigned to a namespace are recorded in the NS unit allocation table, so that the NS unit allocation table becomes an NS unit resource pool that provides all available NS units.
In the example of fig. 3B, the NS unit sequence numbers (e.g., NSUN 1, NSUN 2) and the NS unit allocation are recorded in the entry of the NS unit allocation table. In another embodiment, since each entry of the NS unit allocation table records the allocation of NS units with consecutive sequence numbers, the sequence numbers of NS units may be omitted from the NS unit allocation table, and the sequence numbers of corresponding NS units may be determined according to the addresses of the entries of the NS unit allocation table. As another example, the NS unit is identified by replacing its sequence number with the first place of the FTL table entry corresponding to the global logical address space indicated by the NS unit.
FIG. 4 illustrates a flow chart for mapping a namespace logical address to a global logical address.
The IO command received by the solid state storage device indicates the NSID and the namespace logical address. To access the solid state storage device according to the IO command, the namespace logical address of the IO command is converted to a global logical address of the solid state storage device.
In response to receiving the IO command, an NSID indicated by the IO command is obtained, and an NS unit mapping table (see FIG. 3A) is accessed according to the NSID, resulting in an NS unit assigned to a namespace having the NSID (410). And dividing the namespace logical address indicated by the IO command by the size of the NS unit to obtain a quotient and remainder (420). The NS unit is obtained from the NS unit assigned to the namespace having the NSID using the quotient as an ordinal number and the remainder is used as an offset value within the obtained NS unit. The location of the NS unit in the global logical address space is obtained based on the obtained sequence number of the NS unit, and an offset value is added to obtain the global logical address accessed by the IO command (430). The physical address is accessed in response to the IO command in accordance with translating the global logical address to the physical address through the FTL table.
For example, the IO command indicates 4 consecutive logical blocks beginning at logical address 2358 of access namespace NS 1. The NS unit mapping table (fig. 3A) is queried according to NS1 to obtain NS units NSUN1, NSUN9 and NSUN12. And dividing the namespace logical address 2358 by the size M of the logical address space of the NS unit (e.g., M equals 2000) to obtain the quotient (q) and remainder (r). Using the quotient (q) as an ordinal number, the (q+1) th NS unit (for example, NSUN 9) belonging to NS1 obtained from the NS unit mapping table (numbered from 1) is selected, and the global logical address M (9-1) of NSUN9 is obtained by the sequence number "9" of NSUN9, plus the remainder (r) as an offset value. The global logical address of logical address 2358 of NS1 is M x (9-1) +r. And the IO command is to access 4 logical blocks in the global logical address space starting from logical address M (9-1) +r.
As another example, if an IO command indicates that access to consecutive 4 logical blocks of logical address 2358 of namespace NS1, the length from the beginning of offset value (r) to the end of the logical address space in logical address space of NSUN9 is less than 4 logical blocks, meaning that the logical address space accessed by the IO command is commonly provided by two NS units. A first portion of the logical address space for the IO command access is provided starting from the logical address space of NSUN9 from the offset value (r) to the end of the logical address space (denoted r 1), while a second portion of the logical address space for the IO command access is provided starting from the logical address space starting position of the (q+2) th NS unit (NSUN 12) belonging to NS1 (denoted r 2), and r1+r2=4 (logical address length for the IO command access).
As yet another example, the IO command indicates 4 consecutive logical blocks beginning at logical address 2358 of access namespace NS 1. And dividing the namespace logical address 2358 by the size M of the logical address space of the NS unit to obtain the quotient (q) and remainder (r). In the entries of the NS unit mapping table, addresses indicating the first FTL table entry of the global logical address space to which each NS unit corresponds are sequentially recorded. The entry of the NS unit mapping table is obtained from NS1, and the address of the starting FTL table entry corresponding to the global logical address space of the (q+1) th NS unit (e.g., NSUN 9) belonging to NS1 is obtained at the position where the offset value of the mapping table entry is quotient (q). The FTL table entry address of the global logical address corresponding to logical address 2358 of NS1 is obtained by adding the remainder (r) as an offset value according to the address of the starting FTL table entry (optionally, a suitable adjustment is made according to the logical address space size corresponding to FTL table entries, for example, the logical address space indicated by each FTL table entry accommodates 4 logical blocks).
The global logical address of the NS cell may be obtained in other ways. For example, an NS unit address mapping table is provided that records the starting address of each NS unit in the global logical address space. In this way, each NS unit may have a different size of logical address space, thereby improving the utilization of the NS units. As yet another example, the NS unit is selected using the remainder (r) as ordinal number and the quotient (q) as offset value in the logical address space to which the NS unit corresponds.
To process the IO command, the NSID and the namespace logical address are indicated by the IO command to obtain a global logical address, the global logical address FTL table is used to obtain a physical address, and the physical address is accessed to obtain data to be accessed by the IO command.
FIG. 5 is a flow chart of creating a namespace in accordance with an embodiment of the present application.
To create a namespace in a solid state storage device, a host sends a command to the solid state storage device to create the namespace, the command indicating the size of the namespace that it is desired to create.
In response to receiving a command to create a namespace (510), an NS unit is allocated (520) according to the size of the namespace to be created. The result of dividing the size of the namespace to be created by the size of the NS units is rounded up to get the number of NS units to be allocated. For example, to create a namespace of size 100GB, each NS unit is 10GB in size, then 10 NS units are allocated. To create a namespace of 101GB, each NS unit is 10GB in size, then 11 NS units need to be allocated to accommodate the created namespace.
The newly created namespaces are assigned NSIDs that have not been used (530). For example, there are already two namespaces for NS1 and NS2 in the solid state storage device, and NS3 may be assigned as its NSID for the newly created namespaces.
The mapping of the newly allocated NSID to the NS unit is recorded in the NS unit mapping table (550). And also record in the NS unit allocation table that the NS unit has been allocated.
Optionally, metadata indexed by NSID is also created for the namespace (570), in which the size of the namespace, the logical block size, and/or the starting address of the NS cell map table entry corresponding to the NSID are recorded. Thus, upon receipt of an IO command accessing a namespace having the NSID, metadata is obtained with the NSID as an index, and an NS unit (the sequence number of the NS unit, or the head address of the FTL table indicating the global logical address space corresponding to the NS unit) for responding to the IO command is obtained from the start address of the NS unit mapping table entry corresponding to the NSID at an offset value position obtained by dividing the namespace logical address of the IO command by the size of the NS unit.
Still optionally, the NS unit mapping table, NS unit allocation table, and/or namespace metadata, or updates thereof, are also recorded to the NVM chip of the solid-state storage device. To record the updates of the NS unit mapping table and the NS unit allocation table, each allocated NS unit sequence number and corresponding NSID may be recorded in pairs. Thus, the updated unit mapping table and the updated NS unit allocation table can be reconstructed according to the initial values and all updates of the NS unit mapping table and the NS unit allocation table. Upon powering up the solid state storage device, the unit mapping table and the NS unit allocation table are reconstructed.
And the solid state storage provides a response to the host indicating that the namespace creation is complete. NSID of the created namespace is also indicated in the response.
Fig. 6A is an NS unit mapping table before a namespace is created according to an embodiment of the present application, and fig. 6B is an NS unit allocation table before a namespace is created according to an embodiment of the present application, fig. 7A is an NS unit mapping table after a namespace is created according to an embodiment of the present application, and fig. 7B is an NS unit allocation table after a namespace is created according to an embodiment of the present application.
Referring to fig. 6a, each entry of the NS unit mapping table records one of the namespaces identified by the NSID with one or more NS units assigned to that namespace. In fig. 6A, entry 610 of NS unit mapping table records that 3 NS units (NSUN 1, NSUN9, and NSUN 12) are allocated for the namespace of NS1 (abbreviated NS 1). Entry 620 of NS element map records that 4 NS elements (NSUN 4-7) are assigned to the namespace of NS2 (abbreviated NS 2) by NSID.
Referring to FIG. 6B, an NS unit allocation table records whether an NS unit of a solid-state storage device is allocated to a namespace. Since NSUN1, NSUN4-7, NSUN9 and NSUN12 are assigned to namespaces in FIG. 6A. Accordingly, in fig. 6B, the entries of the NS unit allocation table corresponding to NSUN1, NSUN4-7, NSUN9 and NSUN12 record that these NS units have been allocated. In fig. 6B it is also recorded that other NS units are not assigned to namespaces.
By way of example, a command from a host to create a namespace of 15GB size is received. The total size of the allocated NS units should not be smaller than the size of the namespaces to be created. By way of example, each NS unit is 10GB in size, requiring allocation of two NS units. Two NS units that have not been allocated (e.g., NS units numbered 2 and 8, respectively, as NSUN2 and NSUN 8) are obtained from the NS unit allocation table shown in fig. 6B. The namespaces to be created are assigned NSID NS3. An entry is added in the NS unit mapping table and NS3 is recorded corresponding to NSUN2 and NSUN8 (see fig. 7A). The NS unit allocation table records that NSUN2 and NSUN8 have been allocated (see fig. 7B). Optionally, metadata is also created for NS3, recording the name space NS3 with a size of 15GB and/or the starting address of the NS unit mapping table entry corresponding to NS3.
After attaching (Attach) the created namespace NS3 to the NVMe controller, NS3 may respond to the host's IO command. Upon receiving an IO command to access NS3, retrieving the NS unit belonging to NS3 from the NS unit mapping table or (if present) the namespace metadata indexed by NS3, according to the NSID (NS 3) of the IO command, and converting the namespace logical address accessed by the IO command to a global logical address, and accessing the global logical address to respond to the IO command.
FIG. 8 is a flow chart for deleting namespaces according to an embodiment of the present application.
To delete a namespace in a solid state storage device, the host sends a command to delete the namespace to the solid state storage device, where the command indicates the NSID of the namespace that it is desired to delete.
In response to receiving a command to delete a namespace (810), an NSID of the namespace to be deleted is obtained. The NS element mapping table is accessed and the entry corresponding to the NSID is deleted (820). Optionally, all entries in the NS element mapping table following the entry corresponding to the NSID are also moved to fill the space occupied by the deleted entry, so that the size of the NS element mapping table does not become excessively large due to the occurrence of a hole in the table. And updating the starting address of the NS unit mapping table entry corresponding to the NSID in the metadata of the name space indexed by the NSID according to the address of the moved entry. When an entry corresponding to an NSID is deleted in the NS unit mapping table or the starting address of the NS unit mapping table entry corresponding to an NSID is deleted in the metadata (if any) of the namespace indexed by NSID, the namespace cannot be accessed any more because the mapping of the namespace logical address to the global logical address cannot be completed.
The NS units indicated in the deleted NS unit map table entry are also returned to the NS unit allocation table where they are recorded in the unassigned state (830). NS units in the unassigned state may again be assigned to other namespaces.
Optionally, updates to the NS unit mapping table, NS unit allocation table, and/or namespace metadata are also recorded to the NVM chip of the solid-state storage device.
And the solid state storage provides a response to the host indicating that the namespace deletion is complete.
Fig. 9A is an NS unit mapping table before deleting a namespace according to an embodiment of the present application, and fig. 9B is an NS unit allocation table before deleting a namespace according to an embodiment of the present application, fig. 10A is an NS unit mapping table after deleting a namespace according to an embodiment of the present application, and fig. 10B is an NS unit allocation table after deleting a namespace according to an embodiment of the present application.
Referring to fig. 9a, each entry of the NS unit mapping table records one of the namespaces identified by the NSID with one or more NS units assigned to that namespace. In fig. 9A, entry 910 of NS unit mapping table records that 3 NS units (NSUN 1, NSUN9, and NSUN 12) are allocated for the namespace of NS1 (abbreviated as NS 1). Entry 920 of the NS unit mapping table records that 4 NS units (NSUN 4-7) are allocated for the namespace of NS2 (abbreviated NS 2) with NSID. Entry 930 of NS element map records that the namespace of NSID NS 3 (abbreviated NS 2) is assigned 2 NS elements (NSUN 2 and NSUN 8).
Referring to FIG. 9B, an NS unit allocation table records whether an NS unit of a solid-state storage device is allocated to a namespace. Since NSUN1, NSUN2, NSUN4-9 and NSUN12 are assigned to namespaces in FIG. 9A. Accordingly, in fig. 9B, entries of NS unit allocation tables corresponding to NSUN1, NSUN2, NSUN4-9 and NSUN12 record that these NS units have been allocated. In fig. 9B it is also recorded that other NS units are not assigned to namespaces.
By way of example, a command from the host is received to delete the namespace having an NSID of NS 2. And accessing the NS unit mapping table according to the NSID, and deleting the entry with the NSID of NS 2. Optionally, all entries in the NS unit mapping table following the entry with NSID NS2 are also moved to fill the memory space left after the deletion of the entry with NSID NS 2. Referring to fig. 10a, nsid is the entry for NS 3 advanced. It will be appreciated that the size of each entry of the NS element map may be different due to the different number of NS elements occupied by the namespaces. Optionally, metadata of namespaces indexed by NSID is also maintained in the solid-state storage device, and when the namespaces with NSID NS2 are deleted, the metadata is deleted together. The NS units (NSUN 4-7) recorded in the NS unit map table that were originally assigned to the namespace of NSID NS2 are also marked as unassigned in the NS unit allocation table (FIG. 10B). So that these NS units (NSUN 4-7) can be reassigned to other namespaces, and NSID "NS 2" can be reassigned to other namespaces as well. Optionally, updates to the NS unit mapping table, NS unit allocation table, and/or namespace metadata are also recorded to the NVM chip of the solid-state storage device. And the solid state storage provides a response to the host indicating that the namespace deletion is complete.
FIGS. 11A and 11B are flowcharts of creating namespaces according to yet another embodiment of the present application.
In response to receiving a command to create a namespace (1110), an NSID is assigned to the newly created namespace that has not been used (1130). For example, there are already two namespaces for NS1 and NS2 in the solid state storage device, and NS3 may be assigned as its NSID for the newly created namespaces.
The newly allocated NSID is recorded in the NS unit mapping table entry (1150). At this time, the NS unit has not been allocated for the namespace NS3, and thus only the newly allocated NSID is recorded in the mapping table entry of the NS unit without including the NS unit. And no update of NS unit allocation tables is necessary. Sufficient space is reserved in the NS unit mapping table entry to accommodate the one or more NS units required for the namespace. For example, if the namespace requires 3 NS units, then a memory space is reserved in the NS unit allocation table that holds 3 NSIDs or corresponding 3 FTL entry head addresses.
Optionally, metadata indexed by NSID is also created for the namespace, in which the size of the namespace, the logical block size, and/or the starting address of the NS unit mapping table entry corresponding to NSID (and marking that NS units have not been allocated) are recorded. Optionally, updates to the NS unit mapping table, NS unit allocation table, and/or namespace metadata are also recorded to the NVM chip of the solid-state storage device. Still alternatively, the NS units needed to record the created namespaces, although these NS units may not have been assigned to namespaces. In one embodiment, the difference between the total number of NS units of the solid-state storage device and the NS units required for the created namespaces is the number of NS units that can be used to create other namespaces. In another embodiment, because the host (user) will not use most of the storage capacity of the namespace, NS units in the solid state storage that have not been allocated can be used to create other namespaces, so that the number of NS units that are needed for the created namespaces may be greater than the number of all NS units in the solid state storage to increase the usage of NS units.
And the solid state storage provides a response to the host indicating that the namespace creation is complete. NSID of the created namespace is also indicated in the response.
In the embodiment according to fig. 11B, the NS unit is actually allocated for the namespace when an IO command to access the namespace is received. Referring to FIG. 11B, in response to receiving the IO command (1160), the IO command indicates the NSID of the accessed namespace and the namespace logical address. It is checked by the NS unit mapping table or namespace metadata whether an NS unit has been allocated for the namespace logical address to be accessed (1170). If an NS unit has been allocated for the namespace logical address to be accessed by the IO command, a global logical address and/or a corresponding physical address is obtained based on the NS unit and the physical address is accessed in response to the IO command (1175). If no NS unit has been allocated for the namespace logical address to be accessed by the IO command, an unallocated NS unit is obtained (e.g., by accessing the NS unit allocation table), and the obtained NS unit number or the starting address of the FTL entry corresponding to the NS unit (the starting address and the NS unit number are in a linear relationship) is filled into an entry corresponding to the NSID accessed by the IO command in the NS unit mapping table (1180).
And determining the position of the allocated NS unit in the NS unit mapping table entry according to the namespace logical address of the IO command. For example, the namespace occupies 3 NS units, and the namespace logical address of the IO command indicates access to the 2 nd NS unit, then the NS unit allocated in step 1180 is placed into the 2 nd storage location of the NS unit map table entry. As another example, where the namespace logical address of the IO command indicates access to the 2 nd and 3 rd NS units, the 2 nd NS units allocated in step 1180 are placed into the 2 nd and 3 rd storage locations of the NS unit map table entry. And for the allocated NS units, updating the NS unit allocation table to record the allocated NS units.
The global logical address and/or physical address corresponding to the namespace logical address is obtained from the allocated NS unit and the physical address is accessed in response to the IO command (1190).
In the embodiment shown in fig. 11A and 11B, the NS unit is allocated to the namespace only when used, thereby improving the usage of the NS unit.
For example, to create namespaces of 100GB in size, each NS unit of 10GB in size, the number of NS units allocated to namespaces by the recording solid state storage device is increased by 10, but the NS units are not actually allocated to the created namespaces. An NSID (NS 4) is assigned to the namespace. The NS4 is recorded in an entry of the NS unit mapping table, but the namespace has no NS unit yet, and 10 storage locations are reserved in the NS unit mapping table entry indexed by NS4 to accommodate the sequence number of the NS unit or the FTL entry start address corresponding to the NS unit. And indicates to the host that the namespace creation was successful.
In response to receiving an IO command issued by the host, for example, the namespace logical address A of NS4 is accessed. It is checked whether an NS unit has been allocated for the namespace logical address a of NS 4. For example, if an NS unit is allocated, the accessed NS unit should be the A/M+1th NS unit allocated to the NS4, where M is the size of the NS unit's logical address space. By accessing the NS unit map table entry with the NS4 index, it is known whether the A/M+1th NS unit has been allocated. If the NS unit is allocated, a global logical address corresponding to the namespace logical address a of the NS4 (or an FTL table entry address corresponding to the global logical address or a physical address corresponding to the global logical address) is obtained according to the sequence number of the NS unit or the start address of the FTL table entry corresponding to the NS unit. If the NS unit is not allocated, accessing the NS unit allocation table to obtain an unallocated NS unit, filling the A/M+1st position of the NS unit mapping table entry of the NS4 index, and recording that the NS unit is allocated in the NS unit allocation table. And obtaining a global logical address corresponding to the name space logical address A of the NS4 (or the FTL table entry address corresponding to the global logical address or the physical address corresponding to the global logical address) according to the serial number of the NS unit or the starting address of the corresponding FTL table entry. And to access the physical address in response to the IO command.
The embodiments of the present invention also provide a program comprising program code which, when loaded into and executed in a host CPU, causes the CPU to perform the above method performed by the host.
The present invention also provides a program comprising program code which, when loaded into and executed on a storage device, causes a processor of the storage device to perform one of the methods performed by the device above.
It will be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by various means including computer program instructions. These computer program instructions may be loaded onto a general purpose computer, special purpose computer, or other programmable data control apparatus to produce a machine, such that the instructions which execute on the computer or other programmable data control apparatus create means for implementing the functions specified in the flowchart block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data control apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including computer-readable instructions for implementing the function specified in the flowchart block or blocks. The computer program instructions may also be loaded onto a computer or other programmable data control apparatus to cause a series of operational operations to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide operations for implementing the functions specified in the flowchart block or blocks.
Accordingly, blocks of the block diagrams and flowchart illustrations support combinations of means for performing the specified functions, combinations of operations for performing the specified functions and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by special purpose hardware-based computer systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.
Although the present invention has been described with reference to examples, which are intended for purposes of illustration only and not to be limiting of the invention, variations, additions and/or deletions to the embodiments may be made without departing from the scope of the invention.
Many modifications and other embodiments of the inventions set forth herein will come to mind to one skilled in the art to which these embodiments pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the inventions are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.
Claims (18)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110485960.1A CN113515469B (en) | 2017-03-22 | 2017-03-22 | Method for creating and deleting namespace and solid-state storage device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710173447.2A CN108628762B (en) | 2017-03-22 | 2017-03-22 | A solid-state storage device and method for processing IO commands |
CN202110485960.1A CN113515469B (en) | 2017-03-22 | 2017-03-22 | Method for creating and deleting namespace and solid-state storage device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710173447.2A Division CN108628762B (en) | 2017-03-22 | 2017-03-22 | A solid-state storage device and method for processing IO commands |
Publications (2)
Publication Number | Publication Date |
---|---|
CN113515469A CN113515469A (en) | 2021-10-19 |
CN113515469B true CN113515469B (en) | 2025-02-11 |
Family
ID=63706625
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110485960.1A Active CN113515469B (en) | 2017-03-22 | 2017-03-22 | Method for creating and deleting namespace and solid-state storage device |
CN201710173447.2A Active CN108628762B (en) | 2017-03-22 | 2017-03-22 | A solid-state storage device and method for processing IO commands |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710173447.2A Active CN108628762B (en) | 2017-03-22 | 2017-03-22 | A solid-state storage device and method for processing IO commands |
Country Status (1)
Country | Link |
---|---|
CN (2) | CN113515469B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI749516B (en) * | 2018-11-16 | 2021-12-11 | 慧榮科技股份有限公司 | Method for performing storage space management, and associated data storage device and controller thereof |
TWI693517B (en) | 2018-11-16 | 2020-05-11 | 慧榮科技股份有限公司 | Method for performing storage space management, and associated data storage device and controller thereof |
KR102837303B1 (en) * | 2018-12-12 | 2025-07-24 | 삼성전자주식회사 | Storage device and operating method thereof |
CN113051189A (en) * | 2019-12-26 | 2021-06-29 | 成都忆芯科技有限公司 | Method and storage device for providing different data protection levels for multiple namespaces |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102598019B (en) * | 2009-09-09 | 2015-08-19 | 才智知识产权控股公司(2) | For equipment, the system and method for memory allocated |
US9003071B2 (en) * | 2013-03-13 | 2015-04-07 | Futurewei Technologies, Inc. | Namespace access control in NVM express PCIe NVM with SR-IOV |
US10102144B2 (en) * | 2013-04-16 | 2018-10-16 | Sandisk Technologies Llc | Systems, methods and interfaces for data virtualization |
US9245140B2 (en) * | 2013-11-15 | 2016-01-26 | Kabushiki Kaisha Toshiba | Secure data encryption in shared storage using namespaces |
CN106030552A (en) * | 2014-04-21 | 2016-10-12 | 株式会社日立制作所 | computer system |
US9977734B2 (en) * | 2014-12-11 | 2018-05-22 | Toshiba Memory Corporation | Information processing device, non-transitory computer readable recording medium, and information processing system |
US20160342463A1 (en) * | 2015-05-20 | 2016-11-24 | Kabushiki Kaisha Toshiba | Data protection in a namespace |
US10235097B2 (en) * | 2015-07-21 | 2019-03-19 | Samsung Electronics Co., Ltd. | Area and performance optimized namespace sharing method in virtualized PCIE based SSD controller |
JP6403162B2 (en) * | 2015-07-23 | 2018-10-10 | 東芝メモリ株式会社 | Memory system |
CN108702374A (en) * | 2015-09-02 | 2018-10-23 | 科内克斯实验室公司 | NVM Express controller for remote access of memory and I/O over Ethernet type networks |
CN105892955B (en) * | 2016-04-29 | 2019-10-18 | 华为技术有限公司 | Method and device for managing a storage system |
-
2017
- 2017-03-22 CN CN202110485960.1A patent/CN113515469B/en active Active
- 2017-03-22 CN CN201710173447.2A patent/CN108628762B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN108628762B (en) | 2021-05-28 |
CN113515469A (en) | 2021-10-19 |
CN108628762A (en) | 2018-10-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102042643B1 (en) | Managing multiple namespaces in a non-volatile memory (nvm) | |
CN106354615B (en) | Solid-state disk log generation method and device | |
TWI679537B (en) | Data moving method and storage controller | |
US11029873B2 (en) | Storage device with expandable logical address space and operating method thereof | |
CN108614668B (en) | KV model-based data access method and solid-state storage device | |
CN111061655B (en) | Address translation method and device for storage device | |
CN110554833B (en) | Parallel processing IO commands in a memory device | |
CN107797934B (en) | Method for processing de-allocation command and storage device | |
CN113515469B (en) | Method for creating and deleting namespace and solid-state storage device | |
CN108614671B (en) | Key-data access method based on namespace and solid-state storage device | |
CN112835820B (en) | Method and storage device for quickly accessing HMB | |
CN110968527B (en) | FTL provided caching | |
CN110865945B (en) | Extended address space for memory devices | |
CN109840219B (en) | Address translation system and method for mass solid state storage device | |
CN110096452B (en) | Nonvolatile random access memory and method for providing the same | |
CN109960667B (en) | Address translation method and device for large-capacity solid-state storage device | |
CN112148645B (en) | De-allocation command processing method and storage device thereof | |
CN112115065B (en) | Unified address space for storage devices | |
CN110968525B (en) | FTL provided cache, optimization method and storage device thereof | |
CN108614669B (en) | Key-data access method for solving hash collision and solid-state storage device | |
CN110968520B (en) | Multi-stream storage device based on unified cache architecture | |
CN110688056B (en) | Storage medium replacement for NVM group | |
CN111367825B (en) | Virtual check data caching for storage devices | |
CN110580228A (en) | De-allocation command processing method and storage device thereof | |
CN110968528B (en) | Assembling data for nonvolatile storage medium by using unified cache architecture |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |