Detailed Description
In order to make those skilled in the art better understand the technical solutions in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments obtained by a person skilled in the art based on the embodiments of the present invention shall fall within the scope of the protection of the embodiments of the present invention.
The following further describes specific implementation of the embodiments of the present invention with reference to the drawings.
Example one
For convenience of understanding, an application scenario of the memory smart card provided in the first embodiment of the present application is described, and referring to fig. 1, fig. 1 is a schematic view of a memory pooling scenario provided in the first embodiment of the present application. Fig. 1 illustrates a memory pool as an example, a scene illustrated in fig. 1 includes a memory smart card 11 and a processor 12, it should be noted that fig. 1 illustrates a plurality of memory smart cards 11 and a plurality of processors 12, and these memory smart cards 11 and processors 12 may belong to the same device or different devices, which is not limited in this application. In fig. 1, the memories of the memory smart cards 11 form a memory pool 13, and the memory is allocated to each processor 12 from the memory pool 13.
In fig. 1, 3 processors 12 are shown and respectively denoted by a, B, and C, of course, fig. 1 is only an exemplary illustration and does not represent that the present application is limited thereto, and correspondingly, in the memory pool, memories corresponding to the 3 processors 12 are respectively denoted by a, B, and C, and memories a, B, and C allocated to the processors a, B, and C in the memory pool can be dynamically adjusted, so that the utilization rate of the memories is higher, and the operation efficiency is improved.
In order to implement mutual communication between the memory smart cards 11 in combination with the memory pooling scenario shown in fig. 1, with reference to fig. 2, fig. 2 is a structural diagram of a memory smart card according to an embodiment of the present application, and a structure of the memory smart card 11 according to the embodiment of the present application is described in detail. The memory smart card 11 includes: a processing module 111 and a memory interconnect interface 112;
the memory smart card 11 is provided with at least one memory slot 113 for inserting a memory bank;
the processing module 111 is configured to read first data from the memory bank or write second data into the memory bank through the memory slot 113;
the memory interconnect interface 112 is configured to encapsulate the first data according to a memory interconnect protocol and transmit the first data to another memory smart card, or receive second data transmitted by another memory smart card and decapsulate the second data. The first data and the second data may be the same or different, and the application is not limited thereto.
It should be noted that, in the present application, the Processing module 111 and the memory interconnection interface 112 may be implemented by a Field Programmable Gate Array (FPGA) with a memory media controller, or may be implemented by a Central Processing Unit (CPU) executing a program, which is not limited in this application.
Alternatively, the memory interconnect interface 112 may be an interface supporting a memory interconnect protocol. The memory interconnect interface 112 may be a high-speed Serializer/Deserializer (SERDES) interface. Of course, this is merely an example. The Memory interconnect protocol is a protocol for data transmission between the Memory smart cards 112, for example, the Memory interconnect protocol may be a lightweight Remote Direct Memory Access (RDMA) protocol, or the Memory interconnect protocol may be a Z-th Generation (GenZ) protocol. The lightweight RDMA protocol refers to a part used for memory communication in the RDMA protocol, and this is only an exemplary description, and the memory interconnect protocol is a protocol supporting memory communication, and is simpler and more efficient in data transmission compared with a common ethernet interconnect protocol.
It should be noted that, the present application is not limited to the type of the Memory banks inserted into the Memory slots, and for example, the Memory banks may include a Storage Class Memory (english: Storage Class Memory) and may also include a Double Data Rate Memory (english: Double Data Rate), which is, of course, only exemplified here and is not meant to limit the present application.
The memory smart card 11 can also communicate with the processor 12, and can also implement data processing inside the memory smart card 11, and two application scenarios are described separately here.
Optionally, in a first application scenario, based on the structure of the memory smart card 11 shown in fig. 2, as shown in fig. 3, fig. 3 is a structure diagram of another memory smart card provided in the first embodiment of the present application, where the memory smart card 11 further includes a consistency interconnection interface 114, and the consistency interconnection interface 114 is in communication connection with the processing module 111; and the coherent interconnection interface 111 is configured to encapsulate the third data according to a protocol of the coherent interconnection interface and transmit the encapsulated third data to the processor, or receive the fourth data transmitted by the processor and decapsulate the fourth data. The third data and the fourth data may be the same or different, and the first data, the second data, the third data and the fourth data may be the same or different, and are only for illustrating different functions and are not limited to the data.
Because the bit number occupied by the description information of the data in the protocol of the consistency interconnection interface is less, the data transmission efficiency between the processor and the memory smart card 11 through the consistency interconnection interface 114 is higher. Of course, this is merely an example and does not represent a limitation of the present application.
Optionally, the processing module 111 is further configured to read first data from the memory bank, and decompress the first data; or compressing the second data and writing the compressed second data into the memory bank. The processing module 111 compresses the data before writing the data into the memory bank, so that the storage space occupied by the data can be reduced, and the utilization rate of the storage space of the memory smart card 11 can be further improved.
Optionally, in the second application scenario, the processing module 111 may also implement more data processing, for example, the processing module 111 is further configured to lock accessed data when the data is accessed. If the data is being accessed by the processor A, after the accessed data is locked, other processors except the processor A cannot access the data, so that the data error caused by the simultaneous access of the two processors is avoided; for another example, the processing module 111 is further configured to send broadcast information to other memory smart cards through the memory interconnect interface after the data is modified, where the broadcast information is used to indicate that the data is modified. If the processor a modifies the data, the memory smart card 11 sends broadcast information to other memory smart cards, so that the processor can obtain the latest data through the memory smart cards.
Based on the second application scenario, as shown in fig. 4 by way of example, fig. 4 is a structural diagram of another Memory smart card provided in this embodiment of the present application, and the Memory smart card 11 shown in fig. 4 further illustrates a structure of the processing module 111 based on the structural diagram of the Memory smart card 11 shown in fig. 2, where the processing module 111 may include a Near Memory Computing (Near Memory Computing) unit 1111 and a Memory media Controller (Memory Controller) unit 1112. The near memory computing unit 1111 is configured to compress or decompress data, and may compress the data before transmitting the data through the memory interconnect interface 112, so as to reduce the data amount during the transmission process, and similarly, decompress the data after receiving the data through the memory interconnect interface 112. A memory medium control unit 1112, configured to read data from or write data to the memory bank through the memory slot 113; and also for locking accessed data when the data is accessed; and the memory interconnection interface is also used for sending broadcast information to other memory smart cards through the memory interconnection interface after the data is modified. Of course, the structure of the processing module 111 is only illustrated here by way of example, and the present application is not limited thereto.
According to the memory smart card provided by the embodiment of the invention, because the memory interconnection interface is arranged in the memory smart card, the memory interconnection interface can encapsulate or decapsulate data according to a memory interconnection protocol, and the memory smart cards can directly transmit data through the memory interconnection interface, so that the communication between the memory smart cards is realized, the data transmission does not need to be carried out through a processor and a network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
Example two
Based on the memory smart card described in the first embodiment, a second embodiment of the present application provides an electronic device, where the electronic device may be a server or a cabinet including a plurality of servers, and the present application does not limit a specific form of the electronic device, as shown in fig. 5, fig. 5 is a structural diagram of an electronic device provided in the second embodiment of the present application, where the electronic device 20 includes at least one processor 201, a first memory interconnect switch 202, and at least one memory smart card 11 described in the first embodiment;
the processor 201 is in communication connection with the corresponding memory smart card 11; at least one memory smart card 11 is respectively in communication connection with the first memory interconnection switch 202 through a memory interconnection interface 112, and communicates with each other through the first memory interconnection switch 202;
the memory interconnection interface 112 of the memory smart card 11 is configured to encapsulate data to be transmitted according to a memory interconnection protocol, and transmit the encapsulated data to be transmitted to the first memory interconnection switch 202; and is further configured to decapsulate, according to the memory interconnect protocol, the to-be-processed data received from the first memory interconnect switch 202.
It should be noted that the first memory interconnection switch 202 is a switch including a plurality of memory interconnection interfaces supporting a memory interconnection protocol, and the memory smart card 11 directly performs data transmission with the first memory interconnection switch 202 through the memory interconnection interface 112, so as to implement communication between the plurality of memory smart cards 11, without passing through a processor and a network card, and the data transmission rate is faster and the efficiency is higher.
Optionally, the processor 201 is communicatively connected to the corresponding memory smart card 11 through the coherent interconnection interface 114, and the coherent interconnection interface 114 is described in detail in the first embodiment and is not described herein again.
Optionally, the electronic device 20 may display a target image on the display screen when the memory smart card 11 directly performs data transmission with another memory smart card 11 through the memory interconnect interface 112, where the target image is used to indicate that data is transmitted between at least two memory smart cards 11 through the memory interconnect interface 112. Optionally, the target image may include a first image and a second image, the first image is used to indicate that the memory smart card 11 transmits target transmission data to another memory smart card 11 through the memory interconnect interface 112, the second image is used to indicate that the memory smart card 11 receives the target transmission data transmitted by another memory smart card 11 through the memory interconnect interface 112, the first image and the second image may be the same or different, and the first image and the second image may be a static image or a dynamic image, or may be a flag. The electronic device 20 may further display a third image on the display screen when the memory smart card 11 performs data transmission with the processor 201 through the coherent interconnection interface 114, where the third image is used to indicate that the memory smart card 11 performs data transmission with the processor 201 through the coherent interconnection interface 114. It should be noted that the display screen may be a display screen of another device, the electronic device 20 controls the display of the display screen, and the display screen may also be a part of the electronic device 20.
Optionally, as shown in fig. 6, fig. 6 is a structural diagram of another electronic device provided in the second embodiment of the present application, where the electronic device 20 further includes: at least one network card 203 corresponding to the at least one processor 201, and an ethernet switch 204; the processor 201 is in communication connection with the corresponding network card 203; at least one network card 203 is connected to the ethernet switch 204 through a network interface and communicates with each other through the ethernet switch 204.
The memory smart cards 11 are interconnected through the memory interconnection interface 112, but cannot realize network communication, and the network card 203 can realize ordinary network interconnection through the ethernet switch 204 and can also access the network through the ethernet switch 204. It should be noted that, in the present application, the Network includes a Local Area Network (LAN), a Wide Area Network (WAN), and a mobile communication Network; such as the World Wide Web (WWW), Long Term Evolution (LTE) networks, 2G networks (2 th Generation Mobile Network), 3G networks (3 th Generation Mobile Network), 5G networks (5 th Generation Mobile Network), etc. Of course, this is merely an example and does not represent a limitation of the present application.
With reference to the structures of the electronic devices shown in fig. 5 and fig. 6, here, taking cloud processing as an example, another form of the electronic device is exemplarily described, as shown in fig. 7, fig. 7 is a schematic view of a cloud scene of an electronic device according to a second embodiment of the present application. Fig. 7 shows at least one processor 201, a first memory interconnect switch 202, and at least one memory smart card 11 according to the first embodiment, where the at least one processor 201 is communicatively connected to the at least one memory smart card 11, and the at least one memory-only card directly performs data transmission with the first memory interconnect switch 202 through the memory interconnect interface 112, so as to implement communication between the plurality of memory smart cards 11, without going through a processor and a network card, and the data transmission rate is faster and the efficiency is higher. In the cloud scenario shown in fig. 7, the processor 201 and the memory smart card 11 are far apart in physical space, data transmission is performed between the processor 201 and the memory smart card 11 through a network, and if the memory smart card 11 communicates with each other through the processor 201, the round-trip transmission of data consumes a large amount of computation power and bandwidth, so that the memory smart card 11 directly communicates with each other through the memory interconnect interface 112, which can reduce the consumption of computation power and bandwidth, and further improve the data transmission efficiency.
According to the electronic equipment provided by the embodiment of the invention, the memory interconnection interface is arranged in the memory intelligent card of the electronic equipment, the memory interconnection interface can be used for encapsulating or de-encapsulating data according to the memory interconnection protocol, the memory intelligent cards can directly transmit data through the memory interconnection interface, the communication between the memory intelligent cards is realized, the data transmission does not need to be carried out through the processor and the network card, the data transmission speed is improved, and the performance overhead of the processor is also reduced.
EXAMPLE III
Based on the memory smart card described in the first embodiment and the electronic device described in the second embodiment, a third embodiment of the present application provides a memory interconnect network, as shown in fig. 8, where fig. 8 is a structural diagram of the memory interconnect network provided in the third embodiment of the present application, and the memory interconnect network 30 includes: at least one electronic device 20 as described in embodiment two.
Optionally, as shown in fig. 9, the memory interconnection network 30 further includes a second memory interconnection switch 301, and the first memory interconnection switch 202 in the electronic device 20 is connected to the second memory interconnection switch 301 through a memory interconnection interface, so as to implement memory interconnection between different electronic devices 20, that is, the memory smart cards 11 in different electronic devices 20 may communicate through the first memory interconnection switch 202 and the second memory interconnection switch 301. With reference to fig. 9, the memory smart cards 11 in the electronic devices 20 form a memory pool 31, and compared with the memory pool 13 in the memory pooling scenario shown in fig. 1, the memory pool 31 shown in fig. 9 has a larger storage space, so that the utilization rate of the memory smart cards 11 in the electronic devices is further improved.
Optionally, based on the memory interconnect network 30 shown in fig. 9, as shown in fig. 10, the memory interconnect network is further described, where the memory interconnect network 30 shown in fig. 10 includes not only the second memory interconnect switch 301 but also a storage device 302;
the storage device 302 includes at least one memory module 3021, at least one system on chip 3022, and a third memory interconnect switch 3023, where the at least one system on chip 3022 is communicatively connected to the third memory interconnect switch 3023, and communicates with each other through the third memory interconnect switch 3023;
the third memory interconnect switch 3023 and the first memory interconnect switch 202 are both communicatively connected to the second memory interconnect switch 301, and the electronic device 20 and the storage device 302 communicate with each other through the second memory interconnect switch 301.
It should be noted that the storage device 302 and the third memory interconnect switch 3023 may be connected through the memory interconnect interface 112, and the third memory interconnect switch, the first memory interconnect switch 202, and the second memory interconnect switch 301 may also be connected through the memory interconnect interface 112, so that the electronic device 20 and the memory of the storage device 302 form a memory pool 32, the memory space is larger, the memory utilization rate is higher, and different memory requirements of more devices can be met.
In the memory interconnection network provided by the embodiment of the invention, because the memory interconnection interface is arranged in the memory intelligent card of the electronic equipment, the memory interconnection interface can encapsulate or decapsulate data according to the memory interconnection protocol, and the memory intelligent cards can directly transmit data through the memory interconnection interface, the communication between the memory intelligent cards is realized, the data transmission does not need to be carried out through a processor and a network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
Example four
With reference to the memory smart card described in the first embodiment, a data transmission method provided in the fourth embodiment of the present application may be applied to the memory smart card described in the first embodiment, or may also be applied to the electronic device described in the second embodiment and the memory interconnect network described in the third embodiment, which, of course, is only an exemplary illustration and is not meant to limit the present application, as shown in fig. 11, fig. 11 is a flowchart of a data transmission method provided in the fourth embodiment of the present application, and the method includes the following steps:
step 401, obtaining first target data.
It should be noted that, in the present application, "first", "second", "third", "target", and the like are used only for distinguishing and are not limited in any way, for example, target data is used for representing data to be processed, and first target data and second target data are used for representing two different data. The first target data may be any data, which is not limited in this application.
Optionally, the first target data may be acquired according to an instruction, for example, acquiring the first target data includes: receiving a transmission instruction through a memory interconnection interface, and decapsulating the transmission instruction according to a memory interconnection protocol, wherein the transmission instruction is used for indicating transmission of first target data; and acquiring the first target data according to the decapsulated transmission instruction. The transmission instruction may be sent to the memory smart card by the processor, or may be sent by other memory smart cards, which is not limited in this application.
It should be noted that, with reference to the structure of the memory smart card described in the first embodiment, the first target data may be obtained by the memory smart card from the memory bank through the memory slot; or the data transmitted by the processor and received by the consistency interconnection interface; data transmitted by other memory smart cards can also be received through the memory interconnect interface, and here, three examples are respectively listed for description:
optionally, in the first example, the first target data may be obtained by the memory smart card from the memory bank through the memory slot, for example, obtaining the first target data includes: and reading the third target data from the memory bank, and decompressing the third target data to obtain the first target data.
Optionally, in a second example, the first target data may be transmitted by a processor received through a coherent interconnection interface, and the obtaining of the first target data includes:
receiving second target data transmitted by the processor through a consistency interconnection interface, wherein the consistency interconnection interface is used for transmitting data between the processor and the memory smart card; and de-encapsulating the second target data according to the protocol of the consistent interconnection interface to obtain the first target data.
Optionally, the protocol of the coherent interconnect interface includes a Compute Express Link (CLX) protocol or a cache coherent interconnect for accelerators: cache Coherent Interconnect for Accelerators, CCIX). Of course, this is merely an example and does not represent a limitation of the present application. The description information of the data in the protocol of the consistency interconnection interface is less, so that more data can be transmitted, and the data transmission efficiency between the memory smart card and the processor is improved.
Optionally, in a third example, the receiving, through the memory interconnect interface, the first target data transmitted by another memory smart card, and acquiring the first target data includes: receiving target transmission data transmitted by other memory smart cards through a memory interconnection interface; and de-encapsulating the target transmission data according to the memory interconnection protocol to obtain first target data.
Step 402, packaging the first target data according to a memory interconnection protocol to obtain target transmission data.
The memory interconnect protocol is used for indicating a protocol for transmitting data between the memory smart cards. Illustratively, the memory interconnect protocol may include a Z-th generation protocol or a lightweight remote direct data access protocol.
And step 403, transmitting target transmission data to other memory smart cards through the memory interconnection interface supporting the memory interconnection protocol.
Optionally, when target transmission data is transmitted to another memory smart card through a memory interconnect interface supporting a memory interconnect protocol, the method further includes: and displaying a first image through the display screen, wherein the first image is used for indicating that the memory smart card transmits target transmission data to other memory smart cards through the memory interconnection interface. The first image may be a static image or a dynamic image, or may be a logo, as shown in fig. 12, through the first image, a user may visually see the state of data transmission between the memory smart cards in the device.
According to the data transmission method provided by the embodiment of the invention, the memory interconnection interface is arranged in the memory smart card, the memory interconnection interface can be used for encapsulating or de-encapsulating data according to the memory interconnection protocol, and the memory smart cards can directly transmit data through the memory interconnection interface, so that the communication between the memory smart cards is realized, the data transmission is not required to be carried out through the processor and the network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
EXAMPLE five
With reference to the memory smart card described in the first embodiment, a fifth embodiment of the present application provides a data transmission method, which may be applied to the memory smart card described in the first embodiment, and may also be applied to the electronic device described in the second embodiment and the memory interconnect network described in the third embodiment, which are only exemplary illustrations and do not represent that the present application is limited thereto, and as shown in fig. 13, fig. 13 is a flowchart of a data transmission method provided in the fifth embodiment of the present application, where the method includes the following steps:
and step 501, receiving target transmission data transmitted by other memory smart cards through a memory interconnection interface.
Step 502, decapsulating the target transmission data according to a memory interconnect protocol to obtain first target data.
It should be noted that the first target data may be further encapsulated according to a memory interconnection protocol through a memory interconnection interface and then transmitted to other memory smart cards, that is, the data transmission method described in the fourth embodiment of the present application, which is not described herein again; the first target data may also be transmitted to the processor or written to a memory bank, which is illustrated by two examples.
Optionally, in the first example, the method further comprises: packaging the first target data according to a protocol of a consistent interconnection interface to obtain second target data; and transmitting the second target data to the processor through a consistency interconnection interface, wherein the consistency interconnection interface is used for transmitting data between the processor and the memory smart card.
Optionally, in a second example, the method further comprises: and writing the first target data into the memory bank through the memory slot. Alternatively, the method further comprises: compressing the first target data to obtain third target data; and writing the third target data into the memory bank.
Optionally, when target transmission data transmitted by another memory smart card is received through the memory interconnect interface, the method further includes: and displaying a second image through the display screen, wherein the second image is used for showing that the memory smart card receives target transmission data transmitted by other memory smart cards through the memory interconnection interface. The second image may be a static image or a dynamic image, or may be a logo, and the second image may be the same as or different from the first image, as shown in fig. 14, and through the second image, a user may visually see the state of data transmission between the memory smart cards in the device.
According to the data transmission method provided by the embodiment of the invention, the memory interconnection interface is arranged in the memory smart card, the memory interconnection interface can be used for encapsulating or de-encapsulating data according to the memory interconnection protocol, and the memory smart cards can directly transmit data through the memory interconnection interface, so that the communication between the memory smart cards is realized, the data transmission is not required to be carried out through the processor and the network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
EXAMPLE six
Based on the data transmission method described in the fourth embodiment, a sixth embodiment of the present application provides a memory smart card, which can execute the data transmission method described in the fourth embodiment, and of course, this is only an exemplary illustration and does not represent that the present application is limited thereto, as shown in fig. 15, fig. 15 is a structural diagram of a memory smart card provided in the sixth embodiment of the present application, and the memory smart card 60 includes: a processing module 601 and a transmission module 602;
the processing module 601 is configured to obtain first target data; packaging the first target data according to a memory interconnection protocol to obtain target transmission data, wherein the memory interconnection protocol is used for indicating a protocol for transmitting data between memory smart cards;
the transmission module 602 is configured to transmit target transmission data to another memory smart card through a memory interconnect interface supporting a memory interconnect protocol.
Optionally, the processing module 601 is configured to receive a transmission instruction through the memory interconnect interface, and decapsulate the transmission instruction according to the memory interconnect protocol, where the transmission instruction is used to instruct to transmit the first target data; and acquiring the first target data according to the decapsulated transmission instruction.
Optionally, the processing module 601 is configured to receive second target data transmitted by the processor through a consistent interconnection interface, where the consistent interconnection interface is used for transmitting data between the processor and the memory smart card; and decapsulating the second target data according to a protocol of the coherent interconnection interface to obtain first target data, wherein the protocol of the coherent interconnection interface is consistent with a data protocol in the processor cache.
Optionally, the protocol of the coherent interconnect interface includes a compute quick link protocol or a cache coherent interconnect protocol for accelerators.
Optionally, the processing module 601 is configured to read third target data from the memory bank, and decompress the third target data to obtain the first target data.
Optionally, the memory interconnect protocol comprises a GenZ protocol or a lightweight remote direct data access protocol.
Optionally, the processing module 601 is further configured to display a first image through a display screen, where the first image is used to indicate that the memory smart card transmits the target transmission data to another memory smart card through the memory interconnection interface.
According to the data transmission method provided by the embodiment of the invention, the memory interconnection interface is arranged in the memory smart card, the memory interconnection interface can be used for encapsulating or de-encapsulating data according to the memory interconnection protocol, and the memory smart cards can directly transmit data through the memory interconnection interface, so that the communication between the memory smart cards is realized, the data transmission is not required to be carried out through the processor and the network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
EXAMPLE seven
Based on the data transmission method described in the fifth embodiment, a seventh embodiment of the present application provides a memory smart card, which can execute the data transmission method described in the fifth embodiment, and of course, this is only an exemplary illustration and does not represent that the present application is limited thereto, as shown in fig. 16, fig. 16 is a structural diagram of the memory smart card provided in the seventh embodiment of the present application, and the memory smart card 70 includes: a transmission module 701 and a processing module 702;
the transmission module 701 is configured to receive target transmission data transmitted by another memory smart card through a memory interconnection interface;
the processing module 702 is configured to decapsulate the target transmission data according to the memory interconnect protocol to obtain first target data.
Optionally, the transmission module 701 is further configured to encapsulate the first target data according to a protocol of a coherent interconnection interface, so as to obtain second target data, where the protocol of the coherent interconnection interface is consistent with a data protocol in a processor cache; and transmitting the second target data to the processor through a consistency interconnection interface, wherein the consistency interconnection interface is used for transmitting data between the processor and the memory smart card.
Optionally, the processing module 702 is further configured to compress the first target data to obtain third target data, and write the third target data into a memory bank.
Optionally, the processing module 702 is further configured to display a second image through a display screen, where the second image is used to indicate that the memory smart card receives the target transmission data transmitted by another memory smart card through the memory interconnect interface.
According to the data transmission method provided by the embodiment of the invention, the memory interconnection interface is arranged in the memory smart card, the memory interconnection interface can be used for encapsulating or de-encapsulating data according to the memory interconnection protocol, and the memory smart cards can directly transmit data through the memory interconnection interface, so that the communication between the memory smart cards is realized, the data transmission is not required to be carried out through the processor and the network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
Example eight
Based on the methods described in the fourth to fifth embodiments, an eighth embodiment of the present application provides a computer storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the methods described in the fourth to fifth embodiments.
According to the computer storage medium provided by the embodiment of the invention, the memory interconnection interface is arranged in the memory smart card, the memory interconnection interface can be used for encapsulating or de-encapsulating data according to the memory interconnection protocol, and the memory smart cards can directly transmit data through the memory interconnection interface, so that the communication between the memory smart cards is realized, the data transmission does not need to be carried out through the processor and the network card, the data transmission rate is improved, and the performance overhead of the processor is also reduced.
It should be noted that, according to the implementation requirement, each component/step described in the embodiment of the present invention may be divided into more components/steps, and two or more components/steps or partial operations of the components/steps may also be combined into a new component/step to achieve the purpose of the embodiment of the present invention.
The above-described method according to an embodiment of the present invention may be implemented in hardware, firmware, or as software or computer code storable in a recording medium such as a CD ROM, a RAM, a floppy disk, a hard disk, or a magneto-optical disk, or as computer code originally stored in a remote recording medium or a non-transitory machine-readable medium downloaded through a network and to be stored in a local recording medium, so that the method described herein may be stored in such software processing on a recording medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware such as an ASIC or FPGA. It will be appreciated that the computer, processor, microprocessor controller or programmable hardware includes memory components (e.g., RAM, ROM, flash memory, etc.) that can store or receive software or computer code that, when accessed and executed by the computer, processor or hardware, implements the data transmission methods described herein. Further, when a general-purpose computer accesses code for implementing the data transmission method illustrated herein, execution of the code transforms the general-purpose computer into a special-purpose computer for performing the data transmission method illustrated herein.
Those of ordinary skill in the art will appreciate that the various illustrative elements and method steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present embodiments.
The above embodiments are only for illustrating the embodiments of the present invention and not for limiting the embodiments of the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the present invention, so that all equivalent technical solutions also belong to the scope of the embodiments of the present invention, and the scope of patent protection of the embodiments of the present invention should be defined by the claims.