Disclosure of Invention
It is an object of the present disclosure to provide a power converter to at least partially solve the above-mentioned problems in the prior art.
According to a first aspect of the present disclosure, there is provided a power converter including a T-type three-level rectification circuit and a first switching circuit. The T-type three-level rectifying circuit comprises a three-phase AC port; a first DC terminal and a second DC terminal; a capacitor circuit comprising a first capacitor and a second capacitor, coupled between the first DC terminal and the second DC terminal, and having a first intermediate node; a three-phase rectifier circuit coupled between the three-phase AC port and the capacitor circuit; and a bidirectional switching circuit coupled to the three-phase rectifier circuit. A first switching circuit is coupled between the first and second DC terminals and to the bidirectional switching circuit and the first intermediate node, the first switching circuit configured to be switchable between a first state and a second state, wherein the power converter operates in a three-phase conversion mode when the first switching circuit is in the first state, and wherein the power converter operates in a single-phase conversion mode when the first switching circuit is in the second state.
In some embodiments, the first switching circuit comprises: first and second controllable semiconductor devices coupled in series between the first and second DC terminals and having a second intermediate node coupled to the bidirectional switching circuit; and a first switch coupled between the first intermediate node and the second intermediate node, wherein when the first switching circuit is in the first state, the first switch is closed and the first and second controllable semiconductor devices are off, and wherein when the first switching circuit is in the second state, the first switch is open and the first and second controllable semiconductor devices are alternately on.
In some embodiments, the power converter further comprises: a second switching circuit coupled between the first DC terminal and the second DC terminal and between the first capacitor and the second capacitor, the second switching circuit configured to be switchable between a third state and a fourth state to change a connection state between the first capacitor and the second capacitor, wherein the first capacitor and the second capacitor are coupled in series between the first DC terminal and the second DC terminal when the second switching circuit is in the third state, wherein the first capacitor and the second capacitor are coupled in parallel between the first DC terminal and the second DC terminal when the second switching circuit is in the fourth state, wherein when the first switching circuit is in the first state and the second switching circuit is in the third state, the power converter operates in the three-phase conversion mode, and wherein the single-phase conversion mode includes a first single-phase conversion mode and a second single-phase conversion mode, the power converter operates in the first single-phase conversion mode when the first switching circuit is in the second state and the second switching circuit is in the third state, and the power converter operates in the second single-phase conversion mode when the first switching circuit is in the second state and the second switching circuit is in the fourth state.
In some embodiments, the second switching circuit comprises: a second switch coupled between the first capacitor and the second capacitor, wherein a third node between the first capacitor and the second switch or a fourth node between the second switch and the second capacitor is coupled to the first switch as the first intermediate node; a third switch coupled between the third node and the second DC terminal; and a fourth switch coupled between the first DC terminal and the fourth node, wherein when the second switch circuit is in the third state, the second switch is closed, and the third switch and the fourth switch are open; and wherein when the second switch circuit is in the fourth state, the second switch is open and the third switch and the fourth switch are closed.
In some embodiments, the power converter further comprises: a first DC-DC conversion circuit comprising a first input terminal, a second input terminal, a first output terminal, and a second output terminal, the first input terminal coupled to the first DC terminal; and a second DC-DC conversion circuit comprising a third input terminal, a fourth input terminal, a third output terminal, and a fourth output terminal, the fourth input terminal being coupled to the second DC terminal, wherein the second input terminal is coupled to the third input terminal when the first switch circuit is in the first state and the second switch circuit is in the third state, wherein when the first switching circuit is in the second state and the second switching circuit is in the third state, the second input terminal is coupled to the second DC terminal and the third input terminal is coupled to the first DC terminal, and wherein when the first switching circuit is in the second state and the second switching circuit is in the fourth state, the second input terminal is coupled to the second DC terminal and the third input terminal is coupled to the first DC terminal.
In some embodiments, the second input terminal is coupled to the third node and the third input terminal is coupled to the fourth node.
In some embodiments, the power converter further includes a third switching circuit, the third switching circuit including: a fifth switch coupled between the first DC terminal and the third input terminal; a sixth switch coupled between the second input terminal and the second DC terminal; and a seventh switch coupled between the second input terminal and the third input terminal, wherein the fifth switch and the sixth switch are open and the seventh switch is closed when the first switch circuit is in the first state and the second switch circuit is in the third state, wherein the fifth switch and the sixth switch are closed and the seventh switch is open when the first switch circuit is in the second state and the second switch circuit is in the third state, and wherein the fifth switch and the sixth switch are closed and the seventh switch is open when the first switch circuit is in the second state and the second switch circuit is in the fourth state.
In some embodiments, the third output terminal is coupled to the first output terminal and the second output terminal is coupled to the fourth output terminal.
In some embodiments, the second output terminal is coupled to the third output terminal.
In some embodiments, the power converter further comprises: a fourth switching circuit coupled to the first output terminal, the second output terminal, the third output terminal, and the fourth output terminal, and configured to be switchable between a fifth state and a sixth state, wherein when the fourth switching circuit is in the fifth state, the third output terminal is coupled to the first output terminal and the second output terminal is coupled to the fourth output terminal, and when the fourth switching circuit is in the sixth state, the second output terminal is coupled to the third output terminal.
In some embodiments, the fourth switching circuit comprises: an eighth switch coupled between the second output terminal and the third output terminal; a ninth switch coupled between the second output terminal and the fourth output terminal; and a tenth switch coupled between the first output terminal and the third output terminal, wherein when the fourth switch circuit is in the fifth state, the eighth switch is open and the ninth switch and the tenth switch are closed, and wherein when the fourth switch circuit is in the sixth state, the eighth switch is closed and the ninth switch and the tenth switch are open.
In an embodiment according to the present disclosure, by switching the first switching circuit between the first state and the second state, the power converter can be made compatible with the three-phase conversion mode and the single-phase conversion mode. In addition, all three-phase branches of the T-type three-level rectifying circuit can be connected in a single-phase conversion mode through the first switch circuit, so that the power basically identical to that in the three-phase conversion mode can be output, the output voltage is lower than that in the three-phase conversion mode, the circuit impedance is reduced, and the efficiency of the power converter is improved.
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the disclosure, nor is it intended to be used to limit the scope of the disclosure.
Detailed Description
Preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While the preferred embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
The term "include" and variations thereof as used herein is meant to be inclusive in an open-ended manner, i.e., "including but not limited to". Unless specifically stated otherwise, the term "or" means "and/or". The term "based on" means "based at least in part on". The terms "one example embodiment" and "one embodiment" mean "at least one example embodiment". The term "another embodiment" means "at least one additional embodiment". The terms "first," "second," and the like may refer to different or the same object.
As described above, if the conventional T-type three-level rectifier is operated in the single-phase conversion mode, the full connection of the three-phase branch circuit cannot be realized, and thus the output power is lower than that of the three-phase conversion mode. In addition, the conventional T-type three-level rectifier will output the same high voltage as the three-phase conversion mode in the single-phase conversion mode, and the high voltage causes high impedance, so that the efficiency of the rectifier becomes low. Embodiments of the present disclosure enable a power converter to be compatible with a three-phase conversion mode and a single-phase conversion mode by switching a first switching circuit between a first state and a second state. The principles of the present disclosure will be described in detail below in connection with exemplary embodiments with reference to the drawings.
Fig. 1 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. As shown in fig. 1, in general, the power converter 100 described herein includes a T-type three-level rectifier circuit and a first switch circuit 4. The T-type three-level rectification circuit includes three-phase AC ports L1, L2, L3, first and second DC terminals DC +, a capacitor circuit 1, a three-phase rectifier circuit 2, and a bidirectional switch circuit 3.
The capacitor circuit 1 includes a first capacitor C1 and a second capacitor C2. A first capacitor C1 and a second capacitor C2 are coupled in series between the first DC terminal DC + and the second DC terminal DC-, and have a first intermediate node N1.
The three-phase rectifier circuit 2 is coupled between the three-phase AC ports L1, L2, L3 and the capacitor circuit 1 for converting the input alternating current into direct current. The three-phase rectifier circuit 2 includes three inductors (e.g., inductor L0 for the first phase leg) and a rectifier bridge composed of six transistors (e.g., transistors M3 and M4 for the first phase leg). The individual transistors may be diodes or controllable semiconductor devices such as MOSFETs or IGBTs or the like. With the use of diodes, the power converter 100 can operate unidirectionally, i.e., as a rectifier to achieve ac-to-dc conversion. With the use of controllable semiconductor devices, the power converter 100 can achieve bidirectional operation. That is, the power converter 100 may perform AC-to-DC conversion as a rectifier when the three-phase AC ports L1, L2, L3 are used as inputs and the first DC terminal DC + and the second DC terminal DC-are used as outputs. Conversely, the power converter 100 may implement a direct current to alternating current conversion as an inverter when the first and second DC terminals DC + and DC-are used as inputs and the three-phase AC ports L1, L2, L3 are used as outputs.
The bidirectional switching circuit 3 comprises three branches, each coupled to a respective rectifying branch of the three-phase rectifier circuit 2. For example, the first branch of the bidirectional switch circuit 3 comprises reverse series connected MOSFETs M5 and M6.
The T-type three-level rectifier circuit is a conventional circuit structure, and its specific circuit configuration and operation principle are clear to those skilled in the art, and will not be described in detail herein.
The first switching circuit 4 is coupled between the first DC terminal DC + and the second DC terminal DC-, and is coupled to the bidirectional switching circuit 3 and to the first intermediate node N1. The first switch circuit 4 is switchable between a first state and a second state. With the first switching circuit 4 in the first state, the power converter 100 will operate in a three-phase conversion mode. When the first switching circuit 4 is in the second state, the power converter 100 will operate in the single-phase conversion mode. Therefore, by switching the first switching circuit 4 between the first state and the second state, the power converter 100 can be made compatible with the three-phase conversion mode and the single-phase conversion mode.
In one embodiment, as shown in fig. 1, the first switch circuit 4 comprises a first controllable semiconductor device M1, a second controllable semiconductor device M2, and a first switch S1. The first controllable semiconductor device M1 and the second controllable semiconductor device M2 are coupled in series between the first DC terminal DC + and the second DC terminal DC-. Between the first controllable semiconductor device M1 and the second controllable semiconductor device M2 there is a second intermediate node N2, which is coupled to the bidirectional switch circuit 3. The first switch S1 is coupled between the first intermediate node N1 and the second intermediate node N2.
Fig. 2 shows a configuration of the power converter 100 shown in fig. 1 in a three-phase conversion mode. As shown in fig. 2, when the first switch circuit 4 is in the first state, the first switch S1 is closed and the first and second controllable semiconductor devices M1 and M2 are turned off. At this time, the power converter 100 will operate in a three-phase conversion mode, i.e., as a conventional T-type three-level rectifier, and the detailed operation thereof will not be described herein. In some embodiments, the first controllable semiconductor device M1 and the second controllable semiconductor device M2 may be MOSFETs. In other embodiments, the first controllable semiconductor device M1 and the second controllable semiconductor device M2 may be IGBTs. In other embodiments, the first controllable semiconductor device M1 and the second controllable semiconductor device M2 may also be other types of power switching devices, and the scope of the present disclosure is not limited in this respect.
In some embodiments, power converter 100 also includes N-wires, where power converter 100 is a three-phase four-wire system. In other embodiments, power converter 100 may not have N-wires, in which case power converter 100 is a three-phase, three-wire system.
Fig. 3 shows a configuration of power converter 100 shown in fig. 1 in a single-phase conversion mode. As shown in fig. 3, when the first switch circuit 4 is in the second state, the first switch S1 is open and the first controllable semiconductor device M1 and the second controllable semiconductor device M2 are alternately switched on. At this time, the three-phase AC ports L1, L2, L3 of the power converter 100 will be connected to the same phase L, operating in single-phase conversion mode. The first controllable semiconductor device M1 and the second controllable semiconductor device M2 may be operated at power frequency or at high frequency, so that the three-phase branches of the T-type three-level rectifier circuit are connected in parallel, operating alternately. Therefore, the power converter 100 is able to provide substantially the same power in the single-phase conversion mode as in the three-phase conversion mode, and the DC voltages output at the first DC terminal DC + and the second DC terminal DC-will be much lower than in the three-phase conversion mode. For example, power converter 100 outputs a voltage of 800V in the three-phase conversion mode, and can output a voltage of 400V in the single-phase conversion mode. A lower output voltage results in a lower circuit impedance and thus a higher power conversion efficiency can be achieved.
Fig. 4A-4D illustrate operation of one phase leg of the power converter 100 shown in fig. 1 in a single phase conversion mode, where fig. 4A and 4B illustrate operation during a positive half-cycle of a switching cycle, and fig. 4C and 4D illustrate operation during a negative half-cycle of the switching cycle. As shown in fig. 4A, during the positive half-cycle, the current path first starts from the AC port L, through the inductor L0 and the MOSFETs M5 and M6 to the N-line, thereby storing energy in the inductor L0. Subsequently, as shown in fig. 4B, the current path starts from the AC port L, passes through the inductor L0, the transistor M3, the first capacitor C1, the second capacitor C2, the second controllable semiconductor device M2, and reaches the N line, thereby discharging energy to the inductor L0 and achieving rectification. As shown in fig. 4C, during the negative half-cycle, the current path first starts from the N-line, through MOSFETs M6 and M5 and inductor L0 to the AC port L, thereby storing energy in inductor L0. Subsequently, as shown in fig. 4D, the current path starts from the N line, passes through the first controllable semiconductor device M1, the first capacitor C1, the second capacitor C2, the transistor M4 and the inductor L0 to the AC port L, thereby discharging energy to the inductor L0 and achieving rectification.
The other two-phase branch of the power converter 100 has similar operation to the operation process described in conjunction with fig. 4A to 4D, and will not be described again. In the single-phase conversion mode, the three-phase legs of power converter 100 are connected in parallel and operate in an interleaved manner. Therefore, the power converter 100 is able to provide substantially the same power in the single-phase conversion mode as in the three-phase conversion mode, and the DC voltages output at the first DC terminal DC + and the second DC terminal DC-will be much lower than in the three-phase conversion mode.
It is to be understood that in other embodiments the first switching circuit 4 may also have other configurations, for example may comprise more controllable semiconductor devices and/or more switches. Compatibility of power converter 100 for single-phase and multi-phase conversion modes can also be achieved by switching first switching circuit 4 between a first state and a second state.
Fig. 5 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown in fig. 5 has a similar structure to the power converter 100 shown in fig. 1, except that the power converter 100 shown in fig. 5 further includes a second switching circuit 5. Only the differences will be described in detail herein, and the same parts will not be described again.
The second switch circuit 5 provided herein is intended to achieve control of the connection state between the first capacitor C1 and the second capacitor C2. As shown in fig. 5, the second switching circuit 5 is coupled between the first DC terminal DC + and the second DC terminal DC-and between the first capacitor C1 and the second capacitor C2. The second switch circuit 5 is switchable between the third state and the fourth state to change the connection state between the first capacitor C1 and the second capacitor C2. When the second switch circuit 5 is in the third state, the first capacitor C1 and the second capacitor C2 are coupled in series between the first DC terminal DC + and the second DC terminal DC-. When the second switch circuit 5 is in the fourth state, the first capacitor C1 and the second capacitor C2 are coupled in parallel between the first DC terminal DC + and the second DC terminal DC-.
In one embodiment, as shown in fig. 5, the second switch circuit 5 includes a second switch S2, a third switch S3, and a fourth switch S4. The second switch S2 is coupled between the first capacitor C1 and the second capacitor C2. Between the first capacitor C1 and the second switch S2 is a third node N3, which may be coupled to the first switch S1 as a first intermediate node N1. A fourth node N4 is provided between the second switch S2 and the second capacitor C2. The third switch S3 is coupled between the third node N3 and the second DC terminal DC-. The fourth switch S4 is coupled between the first DC terminal DC + and the fourth node N4. When the second switch circuit 5 is in the third state, the second switch S2 is closed and the third switch S3 and the fourth switch S4 are open such that the first capacitor C1 and the second capacitor C2 are coupled in series. When the second switch circuit 5 is in the fourth state, the second switch S2 is open, and the third switch S3 and the fourth switch S4 are closed, such that the first capacitor C1 and the second capacitor C2 are coupled in parallel.
Similar to power converter 100 shown in fig. 1, power converter 100 shown in fig. 5 is compatible with a three-phase conversion mode and a single-phase conversion mode. This will be described below in conjunction with fig. 6 to 8.
Fig. 6 shows a configuration of the power converter 100 shown in fig. 5 in a three-phase conversion mode. As shown in fig. 6, the first switch circuit 4 is in the first state, i.e. the first switch S1 is closed and the first controllable semiconductor device M1 and the second controllable semiconductor device M2 are turned off; the second switch circuit 5 is in the third state, i.e. the second switch S2 is closed and the third switch S3 and the fourth switch S4 are open. In this case, the power converter 100 will operate in a three-phase conversion mode, i.e., as a conventional T-type three-level rectifier.
Furthermore, due to the provision of the second switching circuit 5, the power converter 100 shown in fig. 5 can be operated in two single-phase transformation modes, i.e., a first single-phase transformation mode and a second single-phase transformation mode. In the first single-phase transformation mode, the first capacitor C1 is coupled in series with the second capacitor C2. In the second single-phase transformation mode, the first capacitor C1 is coupled in parallel with the second capacitor C2.
Fig. 7 shows a configuration of the power converter 100 shown in fig. 5 in a first single-phase conversion mode. As shown in fig. 7, the first switching circuit 4 is in the second state, i.e. the first switch S1 is open and the first controllable semiconductor device M1 and the second controllable semiconductor device M2 are alternately switched on; the second switch circuit 5 is in the third state, i.e. the second switch S2 is closed and the third switch S3 and the fourth switch S4 are open. In this case, the power converter 100 operates in the first single-phase conversion mode, and the operation process thereof is the same as that of the power converter 100 described in conjunction with fig. 3 and fig. 4A to 4D. The power converter 100 is capable of providing substantially the same power as the three-phase conversion mode in the first single-phase conversion mode, and the DC voltage output at the first DC terminal DC + and the second DC terminal DC-will be much lower than the three-phase conversion mode. For example, power converter 100 outputs a voltage of 800V in the three-phase conversion mode, while being capable of outputting a voltage of 400V in the first single-phase conversion mode.
Fig. 8 shows a configuration of the power converter 100 shown in fig. 5 in a second single-phase conversion mode. As shown in fig. 8, the first switch circuit 4 is in the second state, i.e. the first switch S1 is open and the first controllable semiconductor device M1 and the second controllable semiconductor device M2 are alternately switched on; the second switch circuit 5 is in the fourth state, i.e. the second switch S2 is open and the third switch S3 and the fourth switch S4 are closed. In this case, the power converter 100 operates in the second single-phase conversion mode, which is similar to the operation of the power converter 100 described in conjunction with fig. 3 and fig. 4A to 4D, except that since the first capacitor C1 and the second capacitor C2 are coupled in parallel, the capacitance of the capacitor is increased, so that the voltage ripple on the first capacitor C1 and the second capacitor C2 can be reduced.
Fig. 9 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown in fig. 9 has a similar structure to the power converter 100 shown in fig. 5, except that in the power converter 100 shown in fig. 9, the fourth node N4 is coupled to the first switch S1 as a first intermediate node N1. The power converter 100 shown in fig. 9 has similar operation to the power converter 100 shown in fig. 5, and will not be described again.
It should be understood that in other embodiments, the second switching circuit 5 may also have other configurations, for example, may include more switches. By switching the second switch circuit 5 between the third state and the fourth state, it is also possible to control the connection state between the first capacitor C1 and the second capacitor C2.
Fig. 10 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown in fig. 10 has a similar structure to the power converter 100 shown in fig. 5, except that the power converter 100 shown in fig. 10 further includes a first DC-DC conversion circuit DCDC1 and a second DC-DC conversion circuit DCDC 2. Only the differences will be described in detail herein, and the same parts will not be described again.
As shown IN fig. 10, the first DC-DC conversion circuit DCDC1 includes a first input terminal IN1, a second input terminal IN2, a first output terminal OUT1, and a second output terminal OUT 2. The first input terminal IN1 is coupled to the first DC terminal DC +. The second input terminal IN2 is coupled to the third node N3. The second DC-DC conversion circuit DCDC2 includes a third input terminal IN3, a fourth input terminal IN4, a third output terminal OUT3, and a fourth output terminal OUT 4. The third input terminal IN3 is coupled to the fourth node N4. The fourth input terminal IN4 is coupled to the second DC terminal DC-. The output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are connected in parallel, i.e., the third output terminal OUT3 is coupled to the first output terminal OUT1, and the second output terminal OUT2 is coupled to the fourth output terminal OUT 4. The first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are capable of DC-DC converting a voltage between the first DC terminal DC + and the second DC terminal DC-, and providing a converted direct current voltage between the first output terminal OUT1 and the fourth output terminal OUT 4.
As shown IN fig. 10, when the second switch circuit 5 is IN the third state (i.e., the second switch S2 is closed, and the third switch S3 and the fourth switch S4 are open), the second input terminal IN2 is coupled to the third input terminal IN 3. When the second switch circuit 5 is IN the fourth state (i.e., the second switch S2 is open, and the third switch S3 and the fourth switch S4 are closed), the second input terminal IN2 is coupled to the second DC terminal DC-and the third input terminal IN3 is coupled to the first DC terminal DC +.
When the power converter 100 shown in fig. 10 operates in a three-phase conversion mode, it provides a high voltage, for example 800V, between the first DC terminal DC + and the second DC terminal DC-. IN this case, since the second switch S2 is closed and the third switch S3 and the fourth switch S4 are opened, the first capacitor C1 is connected IN series with the second capacitor C2, and the second input terminal IN2 is coupled to the third input terminal IN 3. Accordingly, the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are able to share the 800V voltage between the first DC terminal DC + and the second DC terminal DC-, i.e. the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are 400V, respectively.
When the power converter 100 is operating in the first single-phase conversion mode and the second single-phase mode, it outputs a low voltage, e.g. 400V, between the first DC terminal DC + and the second DC terminal DC-. IN this case, since the second switch S2 is open and the third switch S3 and the fourth switch S4 are closed, the second input terminal IN2 is coupled to the second DC terminal DC-and the third input terminal IN3 is coupled to the first DC terminal DC +. Therefore, the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are both 400V.
In the above manner, the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 can be kept the same, for example, 400V, under the condition that the power converter 100 is in different operation modes.
Fig. 11 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown IN fig. 11 has a similar structure to the power converter 100 shown IN fig. 10, except that IN the power converter 100 shown IN fig. 11, the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are connected IN series, i.e., the second input terminal IN2 is coupled to the third input terminal IN3, thereby providing a higher output voltage. The same parts will not be described herein.
Fig. 12 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown in fig. 12 has a similar structure to the power converter 100 shown in fig. 10, except that the power converter 100 shown in fig. 12 further includes a third switching circuit 6. Only the differences will be described in detail herein, and the same parts will not be described again.
In one embodiment, as shown in fig. 12, the third switch circuit 6 includes a fifth switch S5, a sixth switch S6, and a seventh switch S7. The fifth switch S5 is coupled between the first DC terminal DC + and the third input terminal IN 3. The sixth switch S6 is coupled between the second input terminal IN2 and the second DC terminal DC-. The seventh switch S7 is coupled between the second input terminal IN2 and the third input terminal IN 3. By employing the third switching circuit 6, it can also be achieved that the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are kept the same in the case where the power converter 100 is in different operation modes. This will be described in detail below with reference to fig. 13 to 15.
Fig. 13 shows a configuration of the power converter 100 shown in fig. 12 in a three-phase conversion mode. As shown IN fig. 13, when the first switch circuit 4 is IN the first state and the second switch circuit 5 is IN the third state, the fifth switch S5 and the sixth switch S6 are opened and the seventh switch S7 is closed, so that the second input terminal IN2 is coupled to the third input terminal IN 3. In this case, the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 can share a high voltage (e.g., 800V) between the first DC terminal DC + and the second DC terminal DC-, that is, the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are 400V, respectively.
Fig. 14 shows a configuration of the power converter 100 shown in fig. 12 in the first single-phase conversion mode. As shown IN fig. 14, when the first switch circuit 4 is IN the second state and the second switch circuit 5 is IN the third state, the fifth switch S5 and the sixth switch S6 are closed and the seventh switch S7 is open, such that the second input terminal IN2 is coupled to the second DC terminal DC-and the third input terminal IN3 is coupled to the first DC terminal DC +. In this case, the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are both the same as the voltage between the first DC terminal DC + and the second DC terminal DC-, which is also 400V.
Fig. 15 shows a configuration of the power converter 100 shown in fig. 12 in the second single-phase conversion mode. As shown IN fig. 15, when the first switch circuit 4 is IN the second state and the second switch circuit 5 is IN the fourth state, the fifth switch S5 and the sixth switch S6 are closed and the seventh switch S7 is open, so that the second input terminal IN2 is coupled to the second DC terminal DC-and the third input terminal IN3 is coupled to the first DC terminal DC +. In this case, the input voltages of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are both the same as the voltage between the first DC terminal DC + and the second DC terminal DC-, which is also 400V.
Fig. 16 shows a circuit schematic of the power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown IN fig. 16 has a similar structure to the power converter 100 shown IN fig. 12, except that IN the power converter 100 shown IN fig. 16, the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are connected IN series, i.e., the second input terminal IN2 is coupled to the third input terminal IN3, thereby providing a higher output voltage. The same parts will not be described herein.
It should be understood that in other embodiments, the third switch circuit 6 may also have other configurations, for example, may include more switches. By changing the state of the third switch circuit 6, it is also possible to control the connection state of the input terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC 2.
Fig. 17 shows a circuit schematic of a power converter 100 according to one embodiment of the present disclosure. The power converter 100 shown in fig. 17 has a similar structure to the power converter 100 shown in fig. 12, except that the power converter 100 shown in fig. 17 further includes a fourth switching circuit 7. Only the difference between the two will be described herein.
The fourth switch circuit 7 provided herein is intended to control the connection state between the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC 2. As shown in fig. 17, the fourth switch circuit 7 is coupled to the first output terminal OUT1, the second output terminal OUT2, the third output terminal OUT3, and the fourth output terminal OUT 4. The fourth switching circuit 7 is switchable between a fifth state and a sixth state. When the fourth switching circuit 7 is in the fifth state, the third output terminal OUT3 is coupled to the first output terminal OUT1 and the second output terminal OUT2 is coupled to the fourth output terminal OUT 4. When the fourth switching circuit 7 is in the sixth state, the second output terminal OUT2 is coupled to the third output terminal OUT 3. By adjusting the fourth switching circuit 7, the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 can be connected in series or in parallel, thereby providing different output voltages.
In one embodiment, as shown in fig. 17, the fourth switching circuit 7 includes an eighth switch S8, a ninth switch S9, and a tenth switch S10. The eighth switch S8 is coupled between the second output terminal OUT2 and the third output terminal OUT 3. The ninth switch S9 is coupled between the second output terminal OUT2 and the fourth output terminal OUT 4. The tenth switch S10 is coupled between the first output terminal OUT1 and the third output terminal OUT 3. When the fourth switching circuit 7 is in the fifth state, the eighth switch S8 is opened and the ninth switch S9 and the tenth switch S10 are closed, so that the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are connected in parallel. When the fourth switching circuit 7 is in the sixth state, the eighth switch S8 is closed and the ninth switch S9 and the tenth switch S10 are opened, so that the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 are connected in series.
Fig. 18 shows a circuit schematic of the power converter 10 according to one embodiment of the present disclosure. The power converter 100 shown in fig. 18 has a similar structure to the power converter 100 shown in fig. 10, except that the power converter 100 shown in fig. 18 also includes the fourth switching circuit 7 as described above.
It should be understood that in other embodiments, the fourth switching circuit 7 may also have other structures, for example, may include more switches. By switching the fourth switching circuit 7 between the fifth state and the sixth state, it is also possible to connect the output terminals of the first DC-DC conversion circuit DCDC1 and the second DC-DC conversion circuit DCDC2 in series or in parallel.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.