CN112802896B - Bidirectional thyristor and manufacturing method thereof - Google Patents

Abstract

The invention provides a bidirectional thyristor and a manufacturing method thereof, wherein the bidirectional thyristor comprises: a silicon single crystal divided by an isolation region into a first region and a second region separated by the isolation region; the main thyristor is positioned in the first area and comprises a first cathode, a first gate and a first anode, the first cathode and the first gate are positioned on the upper surface of the first area, and the first anode is positioned on the lower surface of the first area; an integrated BOD thyristor located in the second zone and comprising a second cathode and a second anode, the second anode being located on the upper surface of the second zone and the second cathode being located on the lower surface of the second zone. The main thyristor and the integrated BOD thyristor are integrated on a chip and are separated by an isolation area, wherein the overvoltage protection function is realized by the integrated BOD thyristor, and the turning voltage of the integrated BOD thyristor is controlled by the size of the groove.

Description

A kind of bidirectional thyristor and its manufacturing method

technical field

The present invention relates to the technical field of semiconductor devices, in particular to a method for manufacturing a bidirectional thyristor.

Background technique

In flexible DC transmission projects, in order to protect parallel IGBTs, bypass thyristors with withstand voltage not lower than IGBTs are usually required, as shown in Figure 1. Under the short-circuit fault of the DC pole line of the flexible DC system, the fast recovery diode (FRD) bears the short-circuit current for a long time, and the bypass thyristor is required for shunt protection to avoid overheating and burning of the entire converter valve. Therefore, under this working condition, the bypass thyristor is required to be able to realize fast forward conduction at a lower voltage drop of the FRD tube. In addition, it is clearly stated in the project that the bypass thyristor needs to have the effect of overvoltage breakdown, that is, when the voltage (reverse voltage) at both ends of the thyristor is higher than the withstand voltage of the IGBT, the thyristor can realize self-conduction, avoiding the continuous rise of the voltage at both ends of the line. high, causing IGBT device failure or high voltage shock to the back-end capacitor. After the thyristor is self-conducting, it needs to continue to pass a certain current.

Based on the above requirements, how to provide a manufacturing process of a triac to satisfy the low voltage turn-on function and the reverse overvoltage protection function has become an urgent problem to be solved by those skilled in the art.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a manufacturing method of a triac with both overvoltage protection and bidirectional flow capability.

In order to achieve the above object, the present invention provides a method for manufacturing a triac, comprising the following steps:

S1: selecting an N-type silicon single crystal, and cleaning the upper surface and the lower surface of the silicon single crystal respectively;

S2: respectively performing the first aluminum impurity diffusion on the upper surface and the lower surface of the silicon single crystal;

S3: forming an isolation region in the silicon single crystal, the isolation region penetrating the upper surface and the lower surface, and dividing the silicon single crystal into a first region and a second region;

S4: Remove all aluminum impurities on the upper surface of the silicon single crystal, and perform etching on the lower surface of the silicon single crystal to form a second circular groove, and the second circular groove is located in the second region A circular groove of radius R;

S5: carry out aluminum impurity oxidation advancement on the lower surface to form a P1-region;

S6: performing the second diffusion of aluminum impurities or gallium impurities on the upper surface and the lower surface;

S7: Perform etching in the second region of the lower surface of the silicon single crystal to form a first ring and a second ring, the outer diameter of the first ring is smaller than R, and the second ring has an outer diameter smaller than R. The inner diameter is greater than R;

S8: carry out double-sided aluminum impurity or gallium impurity advancement, form a P2 region on the upper surface, and form a P1 region on the lower surface;

S9: performing selective phosphorus diffusion in the first region of the upper surface and the second region of the lower surface, respectively, to form an N+ region;

S10: performing selective boron diffusion on the upper surface and the lower surface to form a P+ region;

S11: Evaporate metal aluminum on the upper surface and the lower surface and perform photolithography, respectively lead out the first cathode, the first gate, the first anode, the second cathode and the second anode; wherein the first cathode and the The first gate electrode is located in the first region of the upper surface, the second anode is located in the second region of the upper surface, and the second cathode is located in the second region of the lower surface, and the first anode is located in the second region of the lower surface. a first region on the lower surface.

According to the method for manufacturing a triac provided by the present invention, the step of forming an isolation region in the silicon single crystal in the step S3 includes:

forming isolation regions by removing aluminum impurities in corresponding regions of the upper surface and the lower surface; or

Isolation regions are formed by irradiating respective regions of the upper surface and the lower surface.

According to the manufacturing method of the triac provided by the present invention, when the isolation region is formed by removing the aluminum impurities in the corresponding regions of the upper surface and the lower surface, the width of the formed isolation region is 0.3-0.6 mm; When the corresponding regions of the upper surface and the lower surface are irradiated to form an isolation region, the width of the formed isolation region is 3-5mm, the energy of the irradiation is 12MeV, and the dose of the irradiation is 1000- 3000 Gy.

According to the method for manufacturing a triac provided by the present invention, for the step of forming an isolation region by removing aluminum impurities in corresponding regions of the upper surface and the lower surface, the step further comprises: performing boron diffusion in the isolation region, to limit the surface electric field strength.

According to the manufacturing method of the triac provided by the present invention, the first gate electrode is located at the center of the triac.

According to the method for manufacturing a triac provided by the present invention, the depth of the P region formed on the upper surface is smaller than the depth of the P region formed on the lower surface.

According to the manufacturing method of the triac provided by the present invention, the P region formed on the lower surface is formed by the first diffusion of aluminum impurities and the second diffusion of aluminum impurities or gallium impurities, and respectively advancing them; The formed P region is formed by etching the upper surface after the first aluminum impurity diffusion, removing the surface aluminum impurity layer, and advancing and forming after the second aluminum impurity or gallium impurity diffusion; wherein the P formed on the upper surface is The P2-region is not included in the region.

According to the method for manufacturing a triac provided by the present invention, the step S7 further includes adjusting the turning voltage of the thyristor formed in the second region by adjusting the first ring.

According to the manufacturing method of the triac provided by the present invention, the depth of the N+ region formed in the step S9 is 10-20um, and the impurity concentration is (2.0-5.0)ⅹ10 ²⁰ /cm ³ ; the P+ region formed in the step S10 The impurity concentration of (1.0-7.0)ⅹ10 ²⁰ /cm ³ .

According to the manufacturing method of the triac provided by the present invention, the thickness of the aluminum layer of the first gate electrode is 5-10um, and the thickness of the first anode, the first cathode, the second anode and the second cathode is 5-10um. The thickness of the aluminum layer is 20-30um.

According to the manufacturing method of the bidirectional thyristor provided by the present invention, it further comprises the following steps:

S12: perform chip mesa modeling, and the modeling structure is a double positive angle or double negative angle structure, wherein the double positive angle is 20°-50°, and the double negative angle is 10°-20° and 1.5°-2.5° respectively;

S13: perform mesa corrosion, edge passivation and protection on the chip mesa.

To achieve the above purpose, the present invention also provides a bidirectional thyristor, comprising:

a silicon single crystal, the silicon single crystal is divided into a first region and a second region by an isolation region, and the first region and the second region are isolated by an isolation region;

a main thyristor, located in the first region, comprising a first cathode, a first gate and a first anode, the first cathode and the first gate are located on the upper surface of the first region, the first an anode is located on the lower surface of the first region;

An integrated BOD thyristor, located in the second region, includes a second cathode and a second anode, the second anode is located on the upper surface of the second region, and the second cathode is located on the lower surface of the second region.

The bidirectional thyristor and its manufacturing method provided by the present invention integrate a main thyristor and an integrated BOD (break-overdiode) thyristor on a chip, and are separated by an isolation area, wherein the overvoltage protection function is realized by the integrated BOD thyristor, The breakover voltage of the integrated BOD thyristor can be controlled by the slot size.

Description of drawings

1 is a schematic diagram of an existing IGBT parallel protection circuit;

Fig. 2 is the schematic diagram of step S1 in the manufacturing method of the triac of the present invention;

3 is a schematic diagram of step S2 in the method for manufacturing a triac of the present invention;

4 is a schematic diagram of steps S3 and S4 in the manufacturing method of the triac of the present invention;

5 is a schematic diagram of step S5 in the manufacturing method of the triac of the present invention;

6 is a schematic diagram of step S6 in the manufacturing method of the triac of the present invention;

7 is a schematic diagram of step S7 in the method for manufacturing a triac of the present invention;

8 is a schematic diagram of step S8 in the method for manufacturing a triac of the present invention;

9 is a schematic diagram of step S9 in the manufacturing method of the triac of the present invention;

10 is a schematic diagram of step S10 in the manufacturing method of the triac of the present invention;

11 is a schematic diagram of step S11 in the manufacturing method of the triac of the present invention;

FIG. 12A and FIG. 12B are respectively the front structure diagram and the back side structure diagram of the triac of the present invention;

13A and FIG. 13B are respectively the double positive angle structure chip mesa modeling and the double negative angle structure chip mesa modeling of the triac according to the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

Through the manufacturing method of the bidirectional thyristor provided by the present invention, a bidirectional thyristor having not only a bidirectional flow capability but also a reverse overvoltage protection function can be obtained. In the bidirectional thyristor of the present invention, the main thyristor and the integrated BOD thyristor are integrated on a chip, and the two are separated by an isolation area. The reverse overvoltage protection function is realized by integrating the BOD thyristor, and the turning voltage of the integrated BOD thyristor is controlled by the size of the groove. Since the forward withstand voltage of the main thyristor is the conduction voltage drop of the FRD, the present invention makes the withstand voltage of the thyristor into an asymmetrical withstand voltage.

Example 1

Referring to FIG. 1 , this embodiment provides a method for manufacturing a triac, which specifically includes the following steps:

S1: Select an N-type silicon single crystal, and perform cleaning treatment on the upper surface and the lower surface of the silicon single crystal, as shown in FIG. 2 . The present invention selects N-type silicon single crystal with a thickness of 800-1000um, a resistivity of 180-230Ωcm, and a crystal orientation of (100) or (111), and the two sides of the silicon wafer are treated by chemical etching.

S2: Diffusion of aluminum impurities is performed on the upper surface and the lower surface of the silicon single crystal, respectively, and the surface resistance is 40-60 mV/mA, as shown in FIG. 3 .

S3: forming an isolation region in the silicon single crystal, the isolation region penetrating the upper surface and the lower surface, dividing the silicon single crystal into a first sector region and a second sector region, the first sector region The area of one sector is larger than that of the second sector, as shown in FIG. 4 . Specifically, in the present invention, the main thyristor is formed in the first sector area, and the integrated BOD thyristor is formed in the second sector area.

It should be noted that, although the area of the first sector area is larger than the area of the second sector area in the embodiment of FIG. 4 , in practical applications, the present invention does not The area relationship is limited, and the area of the first sector-shaped region may also be equal to or smaller than the area of the second sector-shaped region. Further, the shapes of the first sector area and the second sector area disclosed in the present invention are only used for illustration and are not intended to be limiting. In specific implementation, other regular shapes or irregular shapes other than fan shapes can also be used.

The step of forming an isolation region in the silicon single crystal of the present invention includes: forming an isolation region by removing aluminum impurities in corresponding regions of the upper surface and the lower surface; or by removing the upper surface and the lower surface The corresponding area of is irradiated to form an isolation region.

S4: Remove all aluminum impurities on the upper surface of the silicon single crystal, and perform etching on the lower surface of the silicon single crystal to form a second circular groove to remove the aluminum impurities. The second circular groove is a circular groove with a radius R located in the second sector area, as shown in FIG. 4 .

S5 : oxidizing and advancing aluminum impurities on the lower surface to form a P1-region, as shown in FIG. 5 . The depth of this P1-region is 85-100um, and the impurity concentration is (2.0-8.0)ⅹ10 ¹⁴ /cm ³ .

S6: high-concentration diffusion of aluminum impurities or gallium impurities is performed on the upper surface and the lower surface, and the surface resistance is 8-15mV/mA, as shown in FIG. 6 .

S7: Perform etching in the second sector area of the lower surface of the silicon single crystal to form a first ring with a width of r and a second ring with a width of r', and the outer diameter of the first ring is Less than R, the inner diameter of the second annular ring is greater than R, as shown in FIG. 7 .

S8: Carrying out double-sided aluminum impurity pushing, forming a P2 region on the upper surface, and forming a P1 region on the lower surface, as shown in FIG. 8 . The depth of the P1 region and the P2 region is 30-50um, and the impurity concentration is (2.0-8.0)ⅹ10 ¹⁶ /cm ³ .

S9 : Diffusion of phosphorus is performed on the first fan-shaped region on the upper surface and the second fan-shaped region on the lower surface, respectively, to form N+ regions, as shown in FIG. 9 . The depth of the N+ region is 10-20um, and the impurity concentration is (2.0-5.0)ⅹ10 ²⁰ /cm ³ .

S10: Selective boron diffusion is performed on the upper surface and the lower surface, so that the P1 region of the main thyristor, the P2 region of the integrated BOD thyristor, the N+ layer short-circuit region of the main thyristor, the partial N+ layer short-circuit region of the integrated BOD thyristor, The P+ region is formed after boron expansion in the middle part of the BOD trench and the isolation region, as shown in Figure 10. The surface impurity concentration of the P+ region is (1.0-7.0)ⅹ10 ²⁰ /cm ³ .

S11: Evaporating metal aluminum on the upper surface and the lower surface, respectively leading out a first cathode, a first gate, a first anode, a second cathode and a second anode; wherein the first cathode and the first The gate is located in the first sector of the upper surface, the second anode is located in the second sector of the upper surface, the second cathode is located in the second sector of the lower surface, and the first anode The first sector on the lower surface is shown in FIG. 11 .

Specifically, the first cathode, the first gate, and the first anode are the cathode, gate, and anode of the main thyristor, respectively, and the second cathode and the second anode are the cathode and anode of the integrated BOD thyristor, respectively. Please refer to FIG. 12A and FIG. 12B for schematic diagrams of each electrode of the main thyristor and the integrated BOD thyristor in the present invention.

S12: Chip mesa modeling, the modeling structure is a double positive angle or double negative angle structure, the positive angle is (20-50) degrees, and the negative angle is (10-20) degrees and 1.5-2.5 degrees, as shown in Figure 13A and Figure 13 13B.

S13: The chip mesa is subjected to mesa corrosion, and then edge passivation and protection are performed.

After the above steps, the bidirectional thyristor including the main thyristor and the integrated BOD thyristor according to the present invention can be obtained.

The overvoltage protection function in the bidirectional thyristor of the present invention is realized by integrating the BOD thyristor, wherein the turning voltage of the integrated BOD thyristor can be controlled by the size of the groove. In order to increase the sensitivity of the first-stage amplifying gate, we dig a ring with a width of r' under the first-stage amplifying gate. After the avalanche current is smoothly amplified in multiple stages, it finally provides a large enough trigger current to the cathode. .

The breakover voltage of the integrated BOD thyristor can be controlled by the trench size r after high concentration diffusion. According to experience, when r=100-150um, V _BOD =(90-95)%VR; when _r = _200-250um , V _BOD =(85-90)%VR. Among them, VR is the transition voltage when no BOD is designed.

In the present invention, the main thyristor and the integrated BOD thyristor are isolated by an isolation area, the isolation area is isolated by digging a groove to form PNP isolation, and the isolation between the two thyristors is realized by two opposite PN junctions. In addition to the PNP isolation method, it is also possible to irradiate the isolation area without grooving the isolation area to reduce the minority carrier lifetime, thereby reducing the mutual influence between the two thyristors.

The above-mentioned serial numbers of the embodiments of the present invention are only for description, and do not represent the advantages or disadvantages of the embodiments.

In the description of this specification, reference to the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples", etc., means a specific feature described in connection with the embodiment or example, A structure, material, or feature is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

From the description of the above embodiments, those skilled in the art can clearly understand that the method of the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is better implementation.

The above are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields , are similarly included in the scope of patent protection of the present invention.

Claims (10)

1. A method for manufacturing a bidirectional thyristor, comprising the steps of:

s1: selecting an N-type silicon single crystal, and respectively cleaning the upper surface and the lower surface of the silicon single crystal;

s2: respectively performing first aluminum impurity diffusion on the upper surface and the lower surface of the silicon single crystal;

s3: forming an isolation region in the silicon single crystal, the isolation region penetrating the upper surface and the lower surface to divide the silicon single crystal into a first region and a second region;

s4: removing all aluminum impurities on the upper surface of the silicon single crystal, and etching the lower surface of the silicon single crystal to form a first circular groove, wherein the first circular groove is a circular groove with the radius of R and is positioned in the second region;

s5: the lower surface is subjected to aluminum impurity oxidation promotion to form a P region with a depth of 85-100um and an impurity concentration of 2.0 x 10 ¹⁴ To 8.0 x 10 ¹⁴ /cm ³ ；

S6: performing secondary aluminum impurity or gallium impurity diffusion on the upper surface and the lower surface;

s7: etching the second region of the lower surface of the silicon single crystal to form a first circular ring and a second circular ring, wherein the outer diameter of the first circular ring is smaller than R, and the inner diameter of the second circular ring is larger than R;

s8: performing double-sided aluminum impurity or gallium impurity propulsion, forming P regions on the upper surface and the lower surface, with depth of 30-50um and impurity concentration of 2.0 x 10 ¹⁶ To 8.0 x 10 ¹⁶ /cm ³ ；

S9: selectively diffusing phosphorus in the first region of the upper surface and the second region of the lower surface to form N + regions with a depth of 10-20um and an impurity concentration of 2.0 x 10 ²⁰ To 5.0 x 10 ²⁰ /cm ³ ；

S10: performing selective boron diffusion on the upper surface and the lower surface to form a P + region having a surface impurity concentration of 1.0 x 10 ²⁰ To 7.0 x 10 ²⁰ /cm ³ ；

S11, evaporating aluminum metal on the upper surface and the lower surface, photoetching, and respectively leading out a first cathode, a first gate pole, a first anode, a second cathode and a second anode; wherein said first cathode and said first gate are located on a first region of said upper surface, said second anode is located on a second region of said upper surface and said second cathode is located on a second region of said lower surface, and said first anode is located on said first region of said lower surface.

2. The method of manufacturing a triac as claimed in claim 1 wherein the step of forming isolation regions in said silicon single crystal in step S3 includes:

forming an isolation region by removing aluminum impurities in the respective regions of the upper surface and the lower surface; or by irradiating respective areas of the upper and lower surfaces.

3. The method of manufacturing a triac as claimed in claim 2, wherein when the isolation region is formed by removing aluminum impurities in the respective regions of the upper surface and the lower surface, the width of the isolation region is formed to be 0.3-0.6 mm; when the isolation region is formed by irradiating the corresponding regions of the upper surface and the lower surface, the width of the formed isolation region is 3-5mm, the irradiation energy is 12MeV, and the irradiation dose is 1000-3000 Gray.

4. The method of manufacturing a triac according to claim 2, wherein for the step of forming isolation regions by removing aluminum impurities in respective regions of said upper surface and said lower surface, further comprising: boron diffusion is performed within the isolation region to limit surface electric field strength.

5. The method of claim 1, wherein the first gate is located at a center of the triac.

6. The method of manufacturing a triac as claimed in claim 1 wherein a depth of the P region formed at the upper surface is smaller than a depth of the P region formed at the lower surface.

7. The method of claim 6, wherein the P region formed on the lower surface is formed by first aluminum impurity diffusion and second aluminum impurity or gallium impurity diffusion, and is formed by proceeding separately; and the P area formed on the upper surface is formed by corroding the upper surface after the first aluminum impurity diffusion, removing the surface aluminum impurity layer and pushing after the second aluminum impurity or gallium impurity diffusion.

8. The method of manufacturing a triac as claimed in claim 1 wherein said step S7 further includes adjusting a breakover voltage of the thyristor formed in said second region by adjusting a size of said first ring.

9. A method of manufacturing a triac as claimed in claim 1 or 2 further comprising the steps of:

s12, carrying out table top modeling on the chip, wherein the modeling structure is a double positive angle or double negative angle structure, the angle of the double positive angle is 20-50 degrees, and the angle of the double negative angle is 10-20 degrees and 1.5-2.5 degrees respectively;

s13: and carrying out mesa corrosion, edge passivation and protection on the mesa of the chip.

10. A triac manufactured by the manufacturing method according to claim 1, comprising:

a silicon single crystal divided by an isolation region into a first region and a second region separated by the isolation region;

the main thyristor is positioned in the first area and comprises a first cathode, a first gate and a first anode, the first cathode and the first gate are positioned on the upper surface of the first area, and the first anode is positioned on the lower surface of the first area;

an integrated BOD thyristor located in the second area and comprising a second cathode and a second anode, the second anode being located on the upper surface of the second area, the second cathode being located on the lower surface of the second area;

the lower surface of the silicon single crystal of the integrated BOD thyristor is provided with a first circular groove with the radius of R, a first circular ring and a second circular ring, wherein the first circular groove and the first circular ring and the second circular ring are formed through slotting, the outer diameter of the first circular ring is smaller than R, and the inner diameter of the second circular ring is larger than R.

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