CN112422955B - A kind of ADC inherent noise analysis method for CMOS image sensor - Google Patents

Abstract

The invention discloses an ADC inherent noise analysis method for a CMOS image sensor, which belongs to the field of simulation analysis. A method for analyzing the inherent noise of an ADC for a CMOS image sensor, comprising the following steps: 1) simulating and analyzing the inversion of an ADC comparator to obtain an inversion interval offset; 2) calculating the inversion interval offset distribution in an ADC counter The probability within one clock cycle and the probability of spanning multiple clock cycles, and calculate the noise voltage of the CMOS image sensor caused by it; 3) Multiply the noise voltage of the CMOS image sensor and the corresponding probability to get the inherent value of the ADC Calculated value of noise-induced CMOS image sensor noise. The analysis method of the invention determines the overall noise of the CMOS image sensor caused by the inherent noise of the ADC, which is beneficial to clarify whether the design value meets the design requirements in the design stage, and provides a basis for noise design improvement.

Description

A kind of ADC inherent noise analysis method for CMOS image sensor

technical field

The invention belongs to the field of simulation analysis, in particular to an ADC inherent noise analysis method for a CMOS image sensor.

Background technique

In low-brightness scenes or video applications, noise can seriously affect the quality of captured images or videos. Noise broadly refers to other forms of disturbance other than signals. There are many types of noise in CMOS sensor circuits, which can generally be divided into device electronic noise and "environmental" noise, depending on the cause. The electronic noise of the device is caused by the physical properties of the device itself. In CMOS visible light image sensors, it generally includes thermal noise, shot noise, flicker noise, and dark current; Random interference such as background, or ambient temperature changes, clock jitter, electromagnetic interference, etc. Various kinds of noise are coupled into the sensor array through peripheral circuits to degrade image sensor performance. Among them, "environmental" noise can be well suppressed by circuit design and will not have a significant impact on the performance of the sensor. For example, in the layout design process of the image sensor, a guard ring is added to increase the anti-interference ability of the chip against power fluctuations; the designer can also use a clock with low phase noise to reduce the impact of clock jitter on the performance of the image sensor. At the same time, the inherent noise of the device is difficult to suppress, thus becoming the most fundamental limiting factor for the performance of CMOS visible light image sensors.

The ADC integrated in the CMOS image sensor is used to realize the conversion of photoelectric signals to digital signals. The inherent noise of the ADC device seriously restricts the noise performance of the overall CMOS image sensor. Therefore, analyzing the effect of the inherent noise of the ADC device on the noise of the overall image sensor has Crucial role. Figure 1 shows the structural block diagram and conversion process of the ADC. The ADC includes an ADC comparator 10 and an ADC counter 11. The inputs of the ADC comparator 10 are the analog signal to be converted Vin and the ramp reference Ramp. The first time the comparison inversion signal appears, then The counter starts counting, and the second time the comparator inversion signal appears, the counter ends counting. Due to the ADC comparator noise, under the same conditions, the flip edges are not in the same position, thus causing noise in the CMOS image sensor. The flow chart of the noise analysis method of the traditional ADC is shown in Figure 2. The ADC samples the sinusoidal input signal and uses the fast Fourier transform to calculate the noise floor.

SUMMARY OF THE INVENTION

The purpose of the present invention is to overcome the disadvantage that the inherent noise of an ADC used in a CMOS image sensor cannot be obtained, and to provide a method for analyzing the inherent noise of an ADC used in a CMOS image sensor.

To achieve the above object, the present invention adopts the following technical solutions to realize:

A method for analyzing the inherent noise of an ADC for a CMOS image sensor, comprising the following steps:

1) Simulate and analyze the inversion of the ADC comparator to obtain the inversion interval offset;

2) Calculate the probability that the inversion interval offset is distributed within one clock cycle of the ADC counter and the probability of spanning multiple clock cycles, and calculate the noise voltage of the CMOS image sensor caused thereby;

3) A weighted average of the noise voltage of the CMOS image sensor and the corresponding probability is performed to obtain a calculated value of the noise of the CMOS image sensor caused by the inherent noise of the ADC.

Further, in step 1), according to the noise definition of the CMOS image sensor, a CMOS image sensor noise statistical method is used to simulate and analyze the inversion of the ADC comparator.

Further, in step 2), if the inversion interval offset is distributed within one clock cycle of the ADC counter, no noise will be caused.

Further, in step 2), the noise voltage of the CMOS image sensor caused by this is calculated, specifically:

In the formula: F is the F-th frame image; Voi is the i-th output of the pixel; Vo is the average value of the F-th output of the pixel.

A method for analyzing the inherent noise of an ADC for a CMOS image sensor, comprising the following steps:

1) Determine the analog voltage value corresponding to 1LSB quantized by the ADC and the time span corresponding to 1LSB;

2) Add the device noise model, simulate the inversion of the ADC, and obtain the offset of the inversion interval of the ADC;

3) Determine the probability of no noise;

determining the probability of generating noise, and calculating the noise voltage corresponding to generating the noise;

4) Multiply the noise probability and the noise voltage value to obtain single-point noise;

Summing all single point noises gives a calculated value for the noise of the CMOS image sensor due to the inherent noise of the ADC.

Further, in step 1), an analog voltage value corresponding to 1LSB quantized by the ADC is determined according to the analog signal converted by the ADC.

Further, in step 1), the time span corresponding to 1LSB is determined according to the working frequency of the ADC counter.

Further, in step 2), the probability that the offset of the ADC inversion interval is within 1LSB time clock period is calculated to determine the probability of no noise.

Further, in step 2), the probability that the offset of the ADC inversion interval spans multiple LSBs is calculated to determine the probability of generating noise.

Compared with the prior art, the present invention has the following beneficial effects:

The ADC inherent noise analysis method for a CMOS image sensor of the present invention adopts the CMOS image sensor noise statistics method to analyze the ADC comparator inversion deviation range caused by noise in the CMOS image sensor, and finally causes the difference probability of the output code value to determine the Non-ideal characteristics of ADC; the ADC inherent noise analysis method for CMOS image sensor of the present invention determines the overall noise of the CMOS image sensor caused by the inherent noise of the ADC, which is conducive to clarifying whether the design value meets the design requirements in the design stage. Provide the basis for noise design improvement. The analysis method of the present invention can not only analyze and calculate the noise of the ADC integrated in the CMOS image sensor, but also analyze and calculate other core modules such as programmable gain amplifier modules, etc., and finally realize the design value of the overall noise of the overall CMOS image sensor.

Description of drawings

Fig. 1 is a structural block diagram and a working process diagram of an ADC used in a CMOS image sensor;

Figure 2 shows the traditional ADC inherent noise calculation method;

Figure 3 is a diagram of the code value change of the CMOS image sensor caused by the inherent noise of the ADC;

Figure 4 shows the transition time difference caused by the inherent noise of the ADC;

Figure 5 is a schematic diagram of the noise calculation caused by the inherent noise of the ADC;

FIG. 6 is a flow chart of a specific implementation manner.

Detailed ways

In order to make those skilled in the art better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only Embodiments are part of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

It should be noted that the terms "first", "second" and the like in the description and claims of the present invention and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It is to be understood that the data so used may be interchanged under appropriate circumstances such that the embodiments of the invention described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having" and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those expressly listed Rather, those steps or units may include other steps or units not expressly listed or inherent to these processes, methods, products or devices.

There are differences between the noise evaluation method of CMOS image sensor and the noise evaluation method of monolithic ADC. According to the "Test Method for Charge-Coupled Imaging Devices", the noise of CMOS image sensor is reflected in the difference between the digital code value and the mean value of the digital code value output by the analog-to-digital conversion of the photoelectric signal of the pixel after repeated acquisition of multiple frames. Therefore, even if the number of bits of the ADC is low and the image is collected in multiple frames, the difference between the digital code value output by the analog-to-digital conversion of the photoelectric signal of the pixel and the average value is small. According to the definition of the noise of the CMOS image sensor, the noise of the CMOS image sensor is small. Therefore, CMOS image sensor noise is not directly related to the number of bits in the ADC. However, for a monolithic ADC, the lowest noise value is quantization noise, which is directly related to the number of bits in the ADC. There is no relevant simulation and analysis method for the noise of the CMOS image sensor which is finally caused by the ADC error. The present invention provides a simulation and analysis method for the noise of the CMOS image sensor caused by the ADC error. As shown in the accompanying drawings, a CMOS image sensor generally adopts a single-slope architecture, and counts on a clock edge (rising or falling). Shooting images of the same grayscale in multiple frames, for an ideal CMOS image sensor, the ADC flip time is the same, and the output code values of the multiple frames of images are the same, which does not cause noise in the final CMOS image sensor; for a CMOS image sensor disturbed by noise, the ADC's There is a difference in the flipping time. If the difference is within one clock cycle of the clock, the output code value will be the same, which will not cause noise in the final CMOS image sensor; if the difference spans two or more clock cycles, the output code value will be different, causing The noise of the final CMOS image sensor. The invention proposes a CMOS image sensor noise analysis method based on statistics, which realizes the quantitative calculation of CMOS image sensor noise, and proposes a noise probability analysis technology for the difficulty of CMOS image sensor noise analysis, so as to determine the noise integrated in the CMOS image sensor ADC. The inherent noise design level of the ADC integrated in the CMOS image sensor provides an important basis.

Below in conjunction with accompanying drawing, the present invention is described in further detail:

Referring to FIG. 6, FIG. 6 is a flowchart of the present invention. First, according to the analog signal converted by the ADC, determine the analog voltage value corresponding to 1LSB quantized by the ADC, and determine the time span corresponding to 1LSB according to the working frequency of the ADC counter; then, Add the device noise model to simulate the inversion of the ADC. Due to the influence of the noise of the ADC, there are differences in the inversion time of the ADC. Specifically, under the influence of transient noise, the ADC comparator has the same analog front-end output value. There is a difference in the flip time. If the difference value is within one clock cycle of the counter, it will not cause a difference in the final count value and will not cause noise in the CMOS image sensor; on the contrary, if the difference value is not within one clock cycle of the counter, it will cause a difference in the final count value. , causing the noise of the CMOS image sensor; analyze the ratio of the ADC flip difference span to the entire ADC counter 1LSB time clock period to determine the probability of no noise; analyze the ADC flip span The probability of spanning multiple LSBs; the probability of noise and the noise voltage value are related Multiply, single-point noise; add all single-point noise to simulate and analyze the device noise due to the inherent noise of the ADC.

The noise effect of the ADC makes the output inversion signal of the same input signal not at the same time under the condition of multiple operations. The deviation of the F-frame image value from the mean value is defined as noise, and the noise voltage V _N is calculated by the following formula:

In the formula: F is the F-th frame image; Voi is the i-th output of the pixel; Vo is the average value of the F-th output of the pixel.

According to the above formula, as shown in Figure 3, the inversion interval offset caused by noise is taken as an example for the analysis of a single clock cycle. In (a)-(f) of Figure 3, although the noise causes inversion offset, the inversion is always within one LSB clock cycle and will not cause output code differences, so it does not cause noise; while in Figures 3(g)-( j) Noise causes rollover offsets across the LSB, resulting in multi-sampling noise.

As shown in Figure 4, when the clock period is 5ns, the time span of the noise-induced rollover difference is 0.8ns, which is 16% of the total clock period. As shown in A in Table 1, there is a probability of 84%, the inversion is within one clock cycle, the inversion offset does not cause a difference in the output code value, and there is no noise, corresponding to Figure 5(A); as shown in B in Table 1 , there is a 4% probability, the ADC output code value spans 2 LSBs, and the ADC output code value includes 1 low LSB and 3 high LSBs, corresponding to Figure 5(B); as shown in C in Table 1, there is 4% The probability that the ADC output code value spans 2 LSBs, where the ADC output code value includes 2 low LSBs and 2 high LSBs, corresponding to Figure 5(C); as shown in D in Table 1, there is a 4% probability that the ADC The output code value spans 2 LSBs, where the ADC output code value includes 3 low LSBs and 1 high LSB, corresponding to Figure 5(D); as shown in E in Table 1, there is a 4% probability that the ADC output code value spans 1 LSB, where the ADC output code value includes 0 low LSBs and 4 high LSBs, corresponding to Figure 5(E).

Table 1 Calculation of image sensor noise due to ADC offset

In the calculation process, let 1.1~2.9V be the analog voltage quantization range of the ADC. For a 12-bit ADC, its resolution is 2 ¹² =4096. Therefore, the analog voltage amplitude corresponding to 1LSB is 400uV, and the calculation method is that 1LSB is about 400uV= (2.9-1.1)/4096);

B calculation method:

Let the analog values corresponding to the four code values be 2V, 2V, 2V, 2V+400uV, and the average value is 2V+100uV, therefore, the difference values are 100uV, 100uV, 100uV, 300uV, then:

C calculation method:

Let the analog values corresponding to the four code values be 2V, 2V, 2V+400uV, 2V+400uV, and the average value is 2V+200uV. Therefore, the difference values are 200uV, 200uV, 200uV, and 200uV, respectively, then:

D calculation method:

Let the analog values corresponding to the four code values be 2V, 2V+400uV, 2V+400uV, 2V+400uV, and the average value is 2V+300uV. Therefore, the difference values are 200uV, 200uV, 200uV, and 200uV, respectively.

The simulation and theoretical calculation results show that the noise introduced by the ADC is about 21.6uV, and the analog voltage amplitude corresponding to 1LSB according to the above calculation is 400uV. Therefore, the noise introduced by the ADC is expressed in LSB as: 21.6uV/400uV=0.054LSB, and the number of noise electrons is further calculated according to the conversion of the output code value to electrons.

According to the above theoretical calculation method, the noise analysis and calculation are carried out, and the result is compared with the actual circuit noise test, which proves that it has a good consistency. The ADC inherent noise analysis method for the CMOS image sensor of the present invention has important practical significance in guiding the design of the ADC module, is beneficial to determine the noise range in the design stage, and reduces the overall noise level of the device through noise design improvement. The method of the present invention is not only limited to the inherent noise analysis of the ADC integrated in the CMOS image sensor, but also can be used for the noise analysis of the programmable gain amplifier, ramp generator and other modules, which is helpful to determine the overall noise level of the CMOS image sensor in the design stage, and guide the Make design improvements.

The above content is only to illustrate the technical idea of the present invention, and cannot limit the protection scope of the present invention. Any changes made on the basis of the technical solution according to the technical idea proposed by the present invention all fall within the scope of the claims of the present invention. within the scope of protection.

Claims (6)

1. An ADC intrinsic noise analysis method for a CMOS image sensor, comprising the steps of:

1) carrying out simulation analysis on the turnover of the ADC comparator to obtain the deflection of a turnover interval;

2) calculating the probability of the turnover interval offset distribution in one clock period of an ADC counter and the probability of spanning multiple clock periods, and calculating the noise voltage of the CMOS image sensor caused by the turnover interval offset distribution;

calculating the noise voltage of the CMOS image sensor caused by the noise voltage in the step 2), specifically:

in the formula: f is an F frame image; voi is the ith output of the pixel; vo is the average value of F times of output of the pixel;

3) and carrying out weighted average on the CMOS image sensor noise voltage and the corresponding probability to obtain a calculated value of the CMOS image sensor noise caused by the ADC intrinsic noise.

2. The ADC intrinsic noise analysis method for CMOS image sensor according to claim 1, wherein in step 1), simulation analysis is performed on the inversion of the ADC comparator by using CMOS image sensor noise statistical method according to CMOS image sensor noise definition.

3. The ADC intrinsic noise analysis method according to claim 1, wherein in step 2), if the flip interval offset is distributed in one clock cycle of an ADC counter, no noise is caused.

4. An ADC intrinsic noise analysis method for a CMOS image sensor, comprising the steps of:

1) determining an analog voltage value corresponding to 1LSB quantized by the ADC and a time span corresponding to 1 LSB;

2) adding a device noise model, and simulating the turnover of the ADC to obtain the turnover interval offset of the ADC;

calculating the probability of the deviation of the ADC turnover interval in the 1LSB time clock period in the step 2) and determining the noise-free probability;

3) determining the probability of generating noise, calculating the probability of the offset of an ADC (analog to digital converter) overturning interval spanning a plurality of LSBs (least significant bits), determining the probability of generating the noise, and calculating the noise voltage corresponding to the noise;

4) multiplying the noise probability and the noise voltage value to obtain single-point noise;

and adding all the single-point noises to obtain a calculated value of the noise of the CMOS image sensor caused by the inherent noise of the ADC.

5. The ADC intrinsic noise analyzing method for a CMOS image sensor according to claim 4, wherein an analog voltage value corresponding to 1LSB quantized by the ADC is determined according to the analog signal converted by the ADC in the step 1).

6. The ADC intrinsic noise analysis method for a CMOS image sensor according to claim 4, wherein the time span corresponding to 1LSB is determined according to the working frequency of the ADC counter in step 1).

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