CN112379981B - Lock-free synchronization method for distributed real-time simulation task - Google Patents
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Abstract
The invention provides a lockless synchronization method for distributed real-time simulation tasks, which is characterized by comprising the following steps: the master task and each corresponding slave task respectively form a pair of master-slave tasks; the main task obtains accurate time by accessing a high-precision clock source to control the simulation step length; initializing all master tasks and slave tasks; and starting all tasks, wherein all master-slave tasks enter cycle synchronization at the starting time, and the master task and the slave task in each pair of master-slave tasks are synchronously executed. The invention aims at overcoming the defects of the prior art, provides a lock-free synchronization method for distributed real-time simulation tasks, and solves the problems of high simulation task synchronization resource overhead, large simulation step size and the like in the existing high-performance real-time simulation system.
Description
Technical Field
The invention relates to the technical field of computer simulation, in particular to a lockless synchronization method for distributed real-time simulation tasks.
Background
The real-time simulation technology is a simulation method with the simulation time and the real time completely consistent, namely the real time passes by a delta T time period, and the real-time simulation system also operates the delta T time period. Corresponding to the real-time simulation are the super real-time simulation (simulation time is less than real time) and the under real-time simulation (simulation time is greater than real time).
The relation of the simulation time and the real time is one-to-one in real time, so that the method can be applied to off-line simulation and on-line simulation. By combining with an actual device, the real-time simulation technology can simulate various running states of the actual system in a semi-physical simulation system in a most relevant way. Through real-time simulation, on one hand, a relatively real system environment is simulated for the optimal design and verification functions of a designer, and on the other hand, the huge risk caused by serious faults or misoperation during real system test or experiment is avoided. Therefore, the real-time simulation is widely applied to the fields of power systems, aerospace, automobiles and the like.
The real-time simulation system runs the simulation tasks step by step according to the fixed step length, the simulation tasks in each step length perform simulation operation of the system, and the simulation tasks ensure the real-time performance of each simulation step length by ensuring that the simulation steps are consistent with the real time. In general, the smaller the simulation step length is, the higher the simulation precision is, and the finer the simulation of the real system is, so that the smaller the error with the real system is.
Dividing the simulation content into individual tasks and distributing them to distributed operations on different computing nodes can solve the problem of insufficient computing power of a single computing node. Distributed real-time simulation generally solves the synchronization problem between multiple tasks: 1) The simulation time of each task is consistent with the real time, so that the real-time performance is met; 2) All tasks need to be started and ended in a unified way, and data consistency is met.
On one hand, the distributed simulation requires calculation to be distributed to different nodes, so that the overall calculation performance is improved, and the synchronization overhead (delay) between tasks is increased to ensure the consistency between the tasks; on the other hand, the existing distributed simulation task synchronization generally adopts timers and message communication mechanisms (such as semaphores, pipelines, sockets and the like) provided by an operating system, and the timers and the communication methods are not specially prepared for the simulation tasks with high real-time performance, so that the real-time performance is poor. For example, some timing or communication methods may block the CPU or lock resources, causing the CPU to switch to perform other tasks or sleep, or increase task switching time, or increase response delay.
Busy and the like (the program occupies the CPU by continuously polling a clock or a variable) can effectively reduce the response delay of the application and enhance the real-time performance, but the problem of high expenditure of computing resources is solved, and the CPU can be down-converted or enter a power-saving mode due to long-time busy and the like, so that the utilization rate of the computing resources is reduced.
In distributed simulation, the synchronization method of the simulation task influences the size of the simulation step length and the utilization rate of computing resources, and how to realize the synchronization method with small simulation step length and small resource occupancy rate is a key technology of distributed real-time simulation.
Disclosure of Invention
The invention aims at overcoming the defects of the prior art, provides a lock-free synchronization method for distributed real-time simulation tasks, and solves the problems of high simulation task synchronization resource overhead, large simulation step size and the like in the existing high-performance real-time simulation system.
The invention provides a lockless synchronization method for distributed real-time simulation tasks, which is characterized by comprising the following steps:
A. The master task and each corresponding slave task respectively form a pair of master-slave tasks; the master-slave task is a process or a thread with different functional roles in the computer and independently runs in a computing unit;
B. the master task obtains accurate time by accessing a high-precision clock source provided by an operating system to control simulation step length, and the master task and the slave task share a consistent high-precision clock;
C. Initializing all master tasks and slave tasks;
D. Starting all tasks, wherein all master-slave tasks enter circulation synchronization at the starting time, and synchronously executing the master task and the slave task in each pair of master-slave tasks;
E. Any master-slave task times out, i.e., the running time exceeds the expected time, the busy master-slave task waits until the timed-out task is completed.
In the technical scheme, each task holds a waiting signal and a continuing signal; only if the waiting signal and the continuing signal held by the task meet the continuing condition, the task continues to run, otherwise, the task always waits for the continuing condition to be met; each task only modifies its own wait signal and the continuation signals of other tasks or only modifies its own continuation signals and the wait signals of other tasks.
In the above technical solution, each pair of master-slave tasks is executed in different independent computing units, and the different independent computing units execute each pair of master-slave tasks in parallel at the same time. The present invention treats a plurality of CPUs or a plurality of CPU cores as a plurality of computing units. Or a plurality of FPGA boards on the same host computer participate in calculation together.
In the above technical solution, the step B specifically includes the following steps:
Initializing a waiting signal and a continuing signal of each task, and respectively giving initial values to the waiting signal and the continuing signal.
In the above technical solution, in step D, the main task cycle synchronization includes the following steps:
(1.1) updating the waiting signal of the master task and the continuous signals of all the slave tasks;
(1.2) executing the primary task content;
(1.3) waiting until the task reaches a time point t+i by DeltaT in a dormant or continuous acquisition time judgment mode; wherein T is the start time, i is the task cycle number, and DeltaT is the simulation step size;
(1.4) judging whether the task continues to execute the condition by the main task through the values of the waiting signal and the continuing signal of the task, if yes, continuing to execute the task, otherwise, continuously judging the task;
(1.5) jump to step 1.1.
In the above technical solution, in the step D, the slave task cycle synchronization includes the following steps:
(2.1) judging whether the task continues to execute the condition or not according to the values of the waiting signal and the continuing signal from the task, if yes, continuing to execute the task, otherwise, continuously judging the task;
(2.2) executing slave task content;
(2.3) updating the slave task wait signal and the master task continue signal;
(2.4) jump to step 2.1.
In the above technical solution, in the step D, if the execution process is interrupted from the task cycle synchronization, all tasks are destroyed, and the storage space occupied by the waiting signal and the continuing signal is released, so that the simulation task is directly exited.
In the above technical solution, the waiting signal and the continuation signal are storage variables shared between the master task and the slave task; the master task and the slave task realize lock-free synchronization through a reader-writer mode, and only one writer exists for any signal variable at a certain time.
In the above technical solution, in the step E, the task timeout synchronization includes the following steps:
(3.1) until a time point t+i is equal to delta T, if the master task or the slave task finds that the own waiting signal and the continuous signal do not meet the task continuous execution condition, the master task or the slave task is considered to be overtime once;
(3.2) once overtime, the task is busy and polls the values of the waiting signal and the continuing signal until the condition of continuing to execute the task is met;
wherein, whether the task is overtime or not does not change the simulation step length and the next synchronization time (no matter whether the ith simulation step length is overtime or not, the (i+1) th synchronization time point is t+ (i+1) x delta T).
The invention provides a lock-free synchronization method and device for distributed real-time simulation tasks, wherein master-slave tasks realize two-stage synchronization, the first stage realizes coarse-granularity inter-task synchronization through high-precision dormancy, the second stage realizes complete synchronization by utilizing larger CPU overhead and the like, and the second node has very small time, so that the resource overhead is far less than the busy and the like, and the real-time performance is better than the timing and communication mechanism provided based on an operating system. In a word, the method can realize small-step real-time simulation with microsecond level by using a high-precision clock, and simultaneously solves the problems of high simulation task synchronous resource overhead, large simulation step length and the like in the current high-performance real-time simulation system.
Drawings
FIG. 1 is a schematic diagram of a master task and a slave task of the present invention;
FIG. 2 is a flow chart of the process of the cycle synchronization of the master task and the slave task according to the present invention.
Detailed Description
The invention will now be described in further detail with reference to the drawings and specific examples, which are given for clarity of understanding and are not to be construed as limiting the invention.
As shown in fig. 1, the invention provides a lock-free synchronization method for distributed real-time simulation tasks, which is characterized by comprising the following steps:
A. the master task and each corresponding slave task respectively form a pair of master-slave tasks;
B. The main task obtains accurate time by accessing a high-precision clock source to control the simulation step length;
C. Initializing all master tasks and slave tasks;
D. Starting all tasks, wherein all master-slave tasks enter circulation synchronization at the starting time, and synchronously executing the master task and the slave task in each pair of master-slave tasks;
E. Any master-slave task times out, i.e., the running time exceeds the expected time, the busy master-slave task waits until the timed-out task is completed.
The high-precision clock source is provided by software of an operating system (the bottom layer of the high-precision clock source also corresponds to a hardware clock), and clock signals are not directly generated by the hardware clock; the high-precision clocks of the master and slave tasks are subjected to clock synchronization, and the method can be regarded as the sharing of the consistent clocks of the master and slave tasks; the synchronization basis of the tasks is clock synchronization, but the clock synchronization does not ensure task synchronization, and the task running time can shake due to environmental changes. The master-slave task of the invention is a thread or a process running on an independent computing unit, and notification and synchronization cannot be realized in a direct calling mode.
The high precision clock applied by the invention requires the common support of hardware and an operating system: on one hand, a physical high-frequency clock (such as a TSC clock and an HPET clock) for generating high-precision time exists in the computer; on the other hand, software of an operating system is required to support the high-precision clocks and ensure real-time performance. The application layer may use a high precision clock to obtain accurate time with a small offset from the real time. The common clock has low frequency, poor precision and weak real-time performance of an operating system, and can only provide lower time precision for upper-layer applications.
The master-slave tasks of the present invention are distributed to different independent computing units: for example, different processes (threads) are distributed to different CPU cores of the multi-core CPU for calculation. The distributed simulation method is distributed to independent computing cores, on one hand, the distributed simulation needs to distribute computing to a plurality of nodes to reduce computing time, on the other hand, one task can independently occupy CPU cores, task switching time is reduced, and task instantaneity is enhanced.
The real-time simulation task comprises 1 master task and n slave tasks (n is more than or equal to 1), the master task and each other task form a pair of master-slave tasks, and each master task and each slave task formed by the master tasks and the slave tasks have an exclusive computing unit. One group of master-slave tasks is a master task Tm and a slave task Ts, and the simulation step size is 10 microseconds (Δt=10us).
As shown in fig. 1, the master task may obtain accurate time by accessing a high precision clock source. Each task (master task or slave task) holds a pair of signals, namely a waiting signal and a continuation signal, and the task continues to run only when the waiting signal and the continuation signal held by the task meet the continuation condition, otherwise, the task always waits for the continuation condition to be met. Each task only modifies its own wait signal and the continuation signals of the other tasks (or only modifies its own continuation signals and the wait signals of the other tasks).
The independent computing units are general-purpose or special-purpose processor units with operation capability, such as CPU cores, CPU hyper-threads, FPGA, GPU cores and the like, and a plurality of CPUs or a plurality of CPU cores can be regarded as a plurality of computing units. Or a plurality of FPGA boards on the same host computer participate in calculation together. Different independent computing units may execute programs in parallel at the same time.
The tasks (peer tasks, master tasks, and slave tasks) refer to independently executable programs, such as processes, threads, or a piece of independently executable program code on an operating system. The master task controls the simulation step size and controls the execution and waiting of the slave task through the waiting and continuing signals.
The high-precision clock source is a digital clock with higher time precision and accuracy and lower time jitter, and can provide timing and timing functions for tasks running on the computing unit, such as TSC clock and HPET clock of an X86 processor, frequency clock of an FPGA and the like. The accuracy and jitter size of the high-accuracy clock source are adapted to the simulation step size. The smaller the step size, the higher the clock source accuracy. The operating system typically has a minimum value of simulation step size based on hardware and software constraints, and in practice, the simulation step size will be manually set (partially empirically) based on model size and task requirements. Once a certain fixed step size is selected, the task will constantly model in that fixed step (guaranteed by the high precision clock and application). The criteria for manually selecting a fixed simulation step size are: 1) Is larger than the minimum value of the simulation step length; 2) The required simulation operation can be completed within the fixed simulation step length.
The signals (wait signal and continue signal) are storage variables shared between tasks, such as volatile shared memory variables, etc.
The master task and the slave task realize lockless synchronization through a reader-writer mode, and only one writer exists for any signal variable at a certain time, so that lockless access to key data is ensured.
An initializing step comprising the sub-steps of:
Initializing a master task Tm wait signal tm.wait=0 and a continue signal tm.continuous=1, and initializing a slave task wait signal ts.wait=0 and a continue signal ts.continuous=1;
starting all the peer-to-peer tasks, entering the circulation synchronization at the starting time t, and executing the step 2;
(2.1) master task cycle synchronization comprising the steps of:
(2.1.1) the primary task waiting signal is increased by 1, i.e., ++ tm.wait; adding 1 to the task continuation signal, namely++ Ts.continuous;
(2.1.2) executing the main task content, i.e., running the simulation program code in the main task;
(2.1.3) in the ith cycle, the sleep function clock_ nanosleep () is performed to the point in time t+Δt i, i.e., t+10i.
(2.1.4) The Main task judging whether the continued execution condition of the task is satisfied, the continued execution condition being the inequality as follows
Tm.continue>Tm.wait
If the execution is met, if not, the task is overtime, a task overtime synchronization step is entered, and whether the execution condition is met is continuously judged in the overtime step;
(2.1.5) jump to step 2.1.1.
(2.2) Slave task loop synchronization comprising the steps of:
(2.2.1) judging from the task whether the task continuation execution condition is satisfied, the continuation execution condition being the inequality as follows
Ts.continue>Ts.wait
If yes, if not, the task continuously judges whether the condition of continuous execution is met;
(2.2.2) executing slave task content, i.e., running slave task emulation program code;
(2.2.3) adding 1 from the task waiting signal, i.e., ++ ts.wait, and adding 1 from the main task continuation signal, i.e., ++ tm.continuous;
(2.2.4) jump to step 2.2.1.
Wherein task timeout synchronization includes the steps of:
(3.1) determining that the waiting signal and the continuous signal of the master task or the slave task do not meet the task continuous execution condition by the time point t+i, and regarding as a timeout;
(3.2) once overtime, the task is busy and polls the values of the waiting signal and the continuing signal until the condition of continuing to execute the task is met;
the simulation step length and the next synchronization time are not changed if the task is overtime; the i+1st synchronization time point is t+ (i+1) Δt regardless of whether the i-th simulation step is overtime.
(3) And (3) ending, namely after the execution process of the step (2) is interrupted externally, executing the step, destroying the task Ts and the task Tm, and releasing the storage space occupied by the waiting signals Tm.wait and Ts.wait and the continuous signals Tm.continuous and Ts.continuous.
What is not described in detail in this specification is prior art known to those skilled in the art.
Claims (9)
1. A lock-free synchronization method for distributed real-time simulation tasks is characterized by comprising the following steps:
A. The master task and each corresponding slave task respectively form a pair of master-slave tasks; the master task and the slave task are processes or threads with different functional roles in the computer, and each process or thread independently runs in a corresponding independent computing unit;
B. the master task obtains accurate time by accessing a high-precision clock source provided by an operating system to control simulation step length, and the master task and the slave task share a consistent high-precision clock;
C. Initializing all master tasks and slave tasks;
D. Starting all tasks, wherein all master-slave tasks enter circulation synchronization at the starting time, and synchronously executing the master task and the slave task in each pair of master-slave tasks;
E. Any master-slave task times out, i.e., the running time exceeds the expected time, the busy master-slave task waits until the timed-out task is completed.
2. The lockless synchronization method for distributed real-time simulation tasks according to claim 1, wherein each task holds a wait signal and a continue signal; only if the waiting signal and the continuing signal held by the task meet the continuing condition, the task continues to run, otherwise, the task always waits for the continuing condition to be met; each task only modifies its own wait signal and the continuation signals of other tasks or only modifies its own continuation signals and the wait signals of other tasks.
3. The lockless synchronization method for distributed real-time simulation tasks according to claim 1, wherein the master task and the slave task are respectively executed in different independent computing units, and the different independent computing units execute each pair of master-slave tasks in parallel at the same time.
4. The lockless synchronization method for distributed real-time simulation tasks according to claim 2, wherein the step B specifically comprises the following steps:
Initializing a waiting signal and a continuing signal of each task, and respectively giving initial values to the waiting signal and the continuing signal.
5. The lockless synchronization method for distributed real-time simulation tasks according to claim 4, wherein in step D, the main task cycle synchronization comprises the steps of:
(1.1) updating the waiting signal of the master task and the continuous signals of all the slave tasks;
(1.2) executing the primary task content;
(1.3) waiting until the task reaches a time point t+i.DELTA.T, wherein the waiting mode is dormancy or continuous acquisition time judgment; wherein T is the start time, i is the task cycle number, and DeltaT is the simulation step size;
the main task judges whether the task continues to execute the condition according to the values of the waiting signal and the continuing signal of the main task, if yes, the task is overtime; wherein the continuous execution condition is that the continuous signal value of the main task is larger than the waiting signal value of the main task;
(1.5) jump to step 1.1.
6. The lockless synchronization method for distributed real-time simulation tasks according to claim 5, wherein in the step D, the slave task loop synchronization comprises the steps of:
(2.1) judging whether the task continues to execute the condition or not according to the values of the waiting signal and the continuing signal from the task, if yes, continuing to execute the task, otherwise, continuously judging the task; wherein the continuous execution condition is that the value of the continuous signal of the slave task is larger than the value of the waiting signal of the slave task;
(2.2) executing slave task content;
(2.3) updating the slave task wait signal and the master task continue signal;
(2.4) jump to step 2.1.
7. The lockless synchronization method for distributed real-time simulation tasks according to claim 6, wherein in the step D, if the execution process of the task loop synchronization is interrupted externally, all tasks are destroyed and the storage space occupied by the waiting signal and the continue signal is released, and the simulation task is directly exited.
8. The lockless synchronization method for distributed real-time simulation tasks according to claim 7, wherein the wait signal and the continue signal are storage variables shared between a master task and a slave task; the master task and the slave task realize lock-free synchronization through a reader-writer mode, and only one writer exists for any signal variable at a certain time.
9. The lockless synchronization method for distributed real-time simulation tasks according to claim 5, wherein in the step E, task timeout synchronization comprises the steps of:
(3.1) until a time point t+i·Δt, the master task or the slave task determining that the task continuation execution condition is not satisfied by its own wait signal and continuation signal, and regarding as a timeout;
(3.2) once overtime, the task is busy and polls the values of the waiting signal and the continuing signal until the condition of continuing to execute the task is met;
the simulation step length and the next synchronization time are not changed if the task is overtime; the i+1st synchronization time point is t+ (i+1) ·Δt, whether or not the i-th simulation step is timeout.
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