CN112133819A - Method for preparing MRAM bottom electrode - Google Patents

Abstract

The present invention provides a method for preparing an MRAM bottom electrode, comprising: providing a substrate, wherein the substrate sequentially includes a metal interconnection layer, a first barrier layer and a dielectric layer, and in the first barrier layer and the dielectric layer are formed bottom through holes, and the surface of the substrate is covered with a second barrier layer and a conductive metal layer in turn, the conductive metal layer fills the bottom through holes; chemical mechanical polishing is performed on the conductive metal layer to remove the Conductive metal layer above the second barrier layer; deposit bottom electrode metal for the first time to form a bottom electrode metal prefab; chemical mechanical polishing of the bottom electrode metal prefab to remove above the bottom via outer dielectric layer redundant second barrier layer and bottom electrode metal prefabricated layer; deposit bottom electrode metal for the second time to form bottom electrode metal layer; perform photolithography and etching on the bottom electrode metal layer. The invention improves the flatness of the MRAM bottom electrode while simplifying the preparation process of the MRAM bottom electrode.

Description

Preparation method of MRAM bottom electrode

technical field

The invention relates to the technical field of semiconductor manufacturing, in particular to a preparation method of an MRAM bottom electrode.

Background technique

In recent years, Magnetic Random Access Memory (MRAM) based on the magnetoresistance effect of Magnetic Tunnel Junction (MTJ) is considered to be the future solid-state non-volatile memory. and low energy consumption. The main structure of MRAM is a transistor and an MTJ unit, wherein the MTJ unit is mainly composed of a reference layer, an insulating barrier layer and a free layer located between the bottom electrode and the top electrode. The direction of the magnetic moment of the reference layer is not easily changed by pinning, while the direction of the magnetic moment of the free layer is easily changed under the action of an external magnetic field or current.

MTJ cells utilize the quantum tunneling effect to pass polarized electrons through the insulating barrier layer, where the tunneling probability of polarized electrons is related to the relative magnetization directions between the reference layer and the free layer. When the magnetization directions of the free layer and the reference layer are the same, the tunneling probability of polarized electrons is high, and the MTJ unit exhibits a low resistance state; when the magnetization directions of the free layer and the reference layer are opposite, the tunneling probability of polarized electrons is low, and the MTJ unit exhibits a low resistance state. The cell exhibits a high resistance state. MRAM utilizes the high and low resistance states of MTJ cells to represent "1" and "0" logic states, thereby realizing data storage.

For the MTJ unit, it is mainly composed of multiple layers of thin films stacked repeatedly. In order to ensure that it has good data reading and writing capabilities, there are often high requirements for the thin film in terms of crystal structure and thickness, and high quality. The preparation of thin films generally has a strong dependence on the flatness and roughness of the bottom electrode. Therefore, during the preparation of MRAM devices, the flatness of the bottom electrode will directly affect the performance of the subsequent MTJ unit, and how to provide a flat MRAM bottom electrode has always been a technical problem that needs to be solved.

SUMMARY OF THE INVENTION

In order to solve the above problems, the present invention provides a preparation method of an MRAM bottom electrode, which can improve the flatness of the bottom electrode while simplifying the preparation method of the MRAM bottom electrode.

The present invention provides a method for preparing an MRAM bottom electrode, comprising:

A substrate is provided, the substrate includes a metal interconnection layer, a first barrier layer and a dielectric layer in sequence, a bottom through hole is formed in the first barrier layer and the dielectric layer, and the bottom through hole is interconnected with the metal The layers are connected, and a second barrier layer and a conductive metal layer are sequentially covered on the surface of the substrate, and the conductive metal layer fills the bottom through hole;

chemical mechanical polishing the conductive metal layer to remove the conductive metal layer above the second barrier layer;

The bottom electrode metal is deposited for the first time to fill the dish-shaped depression formed in the bottom through hole after chemical mechanical polishing of the conductive metal layer, so as to form a bottom electrode metal prefabricated layer;

chemical mechanical polishing is performed on the bottom electrode metal prefabricated layer to remove the redundant second barrier layer and the bottom electrode metal prefabricated layer above the bottom through hole outer dielectric layer;

A second deposition of bottom electrode metal to cover the dielectric layer and the bottom electrode metal in the dish-shaped recess to form a bottom electrode metal layer;

Photolithography and etching are performed on the bottom electrode metal layer to obtain an MRAM bottom electrode.

Optionally, the chemical mechanical polishing of the conductive metal layer includes: stopping the polishing end point at the second barrier layer, and performing over-polishing after detecting the second barrier layer according to an endpoint detection method to completely The conductive metal layer over the second barrier layer is removed.

Optionally, the thickness of the bottom electrode metal deposited for the first time is greater than the depth of the dish-shaped recess.

Optionally, the bottom electrode metal of the second deposition is of the same or different material as the bottom electrode metal of the first deposition.

Optionally, the material of the bottom electrode metal is any one or a mixture of several of TaN, Ta, TiN and Ti.

Optionally, the material of the conductive metal layer is one or a mixture of Cu, W and Al.

Optionally, the material of the second barrier layer is any one or a mixture of several of Ta, TaN, Ti, TiN, Co and Ru.

Optionally, the material of the dielectric layer is silicon oxide SiO, silicon dioxide SiO ₂ , oxycarbide CDO, silicon nitride SiN, fluorosilicate glass FSG, phosphosilicate glass PSG, borophosphosilicate glass BPSG, ortho silicon Ethyl acetate TEOS, Low-K dielectric or Ultra-Low-K dielectric.

Optionally, the material of the first barrier layer is silicon oxynitride, silicon nitride, silicon carbonitride or silicon carbide.

Compared with the prior art, in the preparation method of the MRAM bottom electrode provided by the present invention, the present invention omits the grinding step of the second barrier layer and the dielectric layer when performing CMP on the conductive metal layer, thereby simplifying the preparation of the MRAM bottom electrode. At the same time of the process, the MRAM bottom electrode with a flat surface can also be prepared, which solves the problem of dish-shaped depressions in the bottom through hole after CMP of the conductive metal layer.

Description of drawings

1 is a schematic flowchart of a method for preparing an MRAM bottom electrode according to an embodiment of the present invention;

2 to 9 are cross-sectional schematic diagrams of each step of a method for preparing an MRAM bottom electrode according to an embodiment of the present invention;

10 is an electron microscope photograph after the copper layer CMP according to an embodiment of the present invention;

FIG. 11 is an electron microscope photograph of the bottom electrode metal layer after CMP according to an embodiment of the present invention.

Detailed ways

In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

An embodiment of the present invention provides a method for preparing an MRAM bottom electrode, as shown in FIG. 1 , the method includes the following steps:

S101. Provide a substrate, the substrate sequentially includes a metal interconnection layer, a first barrier layer and a dielectric layer, a bottom through hole is formed in the first barrier layer and the dielectric layer, and the bottom through hole is connected to the The metal interconnection layers are connected, and a second barrier layer and a conductive metal layer are sequentially covered on the surface of the substrate, and the conductive metal layer fills the bottom through holes;

S102, performing chemical mechanical polishing on the conductive metal layer to remove the conductive metal layer above the second barrier layer;

S103, depositing bottom electrode metal for the first time to fill the dish-shaped depression formed in the bottom through hole after chemical mechanical polishing of the conductive metal layer to form a bottom electrode metal prefabricated layer;

S104, performing chemical mechanical polishing on the bottom electrode metal prefabricated layer to remove the redundant second barrier layer and the bottom electrode metal prefabricated layer above the bottom through hole outer dielectric layer;

S105, depositing a bottom electrode metal for the second time to cover the dielectric layer and the bottom electrode metal in the dish-shaped recess to form a bottom electrode metal layer;

S106, performing photolithography and etching on the bottom electrode metal layer to obtain an MRAM bottom electrode.

Compared with the prior art, in the preparation method of the MRAM bottom electrode provided by the present invention, the present invention omits the grinding step of the second barrier layer and the dielectric layer when performing CMP on the conductive metal layer, thereby simplifying the preparation of the MRAM bottom electrode. At the same time of the process, the MRAM bottom electrode with a flat surface can also be prepared, which solves the problem of dish-shaped depressions in the bottom through hole after CMP of the conductive metal layer.

Specifically, with regard to step S101, referring to FIGS. 2 to 4, the initial structure of the substrate is shown in FIG. 2, which sequentially includes a metal interconnection layer 201 from bottom to top (the metal interconnection layer 201 includes a silicon substrate and a All necessary structures and devices prepared by the previous process, for example, including CMOS and intermediate metal interconnect layers), the first barrier layer 202 and the dielectric layer 203.

As shown in FIG. 3 , bottom vias are formed in the first barrier layer 202 and the dielectric layer 203 , and the bottom vias are connected to the metal interconnection layer 201 , wherein the material of the first barrier layer 202 includes but Not limited to one of silicon oxynitride, silicon nitride, silicon carbonitride, and silicon carbide, for preventing ion diffusion of the metal interconnection layer 201 . Materials of the dielectric layer 203 include, but are not limited to, silicon oxide SiO, silicon dioxide SiO ₂ , oxycarbide CDO, silicon nitride SiN, fluorosilicate glass FSG, phosphosilicate glass PSG, borophosphosilicate glass BPSG, ethyl orthosilicate One of ester TEOS (chemical formula Si(OC ₂ H ₅ ) ₄ ), Low-K dielectric and Ultra-Low-K dielectric. The bottom via can use conventional photolithography and etching techniques to define a pattern on the dielectric layer 203, and selectively etch to remove part of the first barrier layer 202 and the dielectric layer 203, and stop on the metal interconnect layer 201, thereby forming Bottom vias required for metal interconnect lines.

As shown in FIG. 4 , a second barrier layer 204 and a conductive metal layer 205 are further deposited on the surface of the substrate in sequence, and the conductive metal layer 205 fills the bottom through holes to obtain a final substrate structure. Wherein, the second barrier layer 204 covers the bottom surface and side surface of the bottom through hole of the substrate, and covers the surface of the outer substrate of the bottom through hole. The second barrier layer 204 is formed by a physical vapor deposition method. The second barrier layer 204 The material is metal or metal nitride, including any one or a mixture of Ta, TaN, Ti, TiN, Co and Ru. The conductive metal layer 205 is formed by a method commonly used in semiconductors, such as physical vapor deposition, chemical vapor deposition or electroplating, and the thickness of the conductive metal layer 205 is equal to or greater than the depth of the bottom via. The material of the conductive metal layer 205 is any one or a mixture of Cu, W, and Al.

Regarding step S102 , as shown in FIG. 5 , chemical mechanical polishing is performed on the conductive metal layer 205 , the polishing end point is stopped at the second barrier layer 204 , and over-polishing is performed after the second barrier layer 204 is detected according to the endpoint detection method. , so as to completely remove the conductive metal layer 205 above the second barrier layer 204 . Due to process limitations due to different polishing rates of various thin film materials, dish-shaped depressions 21 are generated in the bottom through holes after polishing. The depth of the dish-shaped depression 21 is denoted as H1, and in general, H1 is 0-20 nm.

Regarding step S103, as shown in FIG. 6, bottom electrode metal is deposited for the first time to fill the dish-shaped depression 21 formed in the bottom through hole after chemical mechanical polishing of the conductive metal layer to form bottom electrode metal For the prefabricated layer 206, the thickness of the bottom electrode metal deposited for the first time is recorded as H2, which should satisfy H2>H1. The material of the bottom electrode metal that can be used includes any one or a mixture of TaN, Ta, TiN and Ti.

Regarding step S104 , as shown in FIG. 7 , chemical mechanical polishing is performed on the bottom electrode metal prefabricated layer 206 , the polishing end point is stopped at the dielectric layer 203 , and over-polishing is performed after the dielectric layer 203 is detected according to the end point detection method. , to completely remove the second barrier layer 204 above the dielectric layer 203 . The chemical mechanical polishing of the bottom electrode metal prefabricated layer 206 should ensure that no bottom electrode material remains on the surface of the dielectric layer 203, at this time, a part of bottom electrode metal will remain in the dish-shaped depression 21 in the bottom through hole.

Regarding step S105 , as shown in FIG. 8 , bottom electrode metal is deposited for the second time to cover the dielectric layer 203 and the bottom electrode metal in the dish-shaped recess 21 to form a bottom electrode metal layer 207 . It should be noted that the bottom electrode metal material deposited for the second time and the bottom electrode metal material deposited for the first time may be the same or different.

Regarding step S106 , as shown in FIG. 9 , photolithography and etching are performed on the bottom electrode metal layer 207 to obtain the bottom electrode 208 of the MRAM device.

In addition, some subsequent processes are continued to be performed on the obtained MRAM bottom electrode 208 , such as further depositing a dielectric layer, filling the gaps between the plurality of bottom electrodes 208 , and then performing chemical mechanical polishing to stop at the bottom electrode 208 interface.

The MRAM bottom electrode obtained by the above method has a flat surface, which solves the problem of dish-shaped depressions in the bottom through holes after the conductive metal layer (eg, copper) is CMPed. In addition, compared with the prior art, the present invention omits the polishing step of the second barrier layer and the dielectric layer when performing CMP on the conductive metal layer (eg, copper), and the process is simpler.

In order to verify the feasibility of the present invention, a scanning electron microscope (SEM) was used for observation, as shown in Figures 10 to 11, wherein Figure 10 is the electron microscope photo after CMP of the copper layer, and Figure 11 is the electron microscope of the bottom electrode metal layer after CMP The photos verify the feasibility of the MRAM bottom electrode preparation method of the present invention.

The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art who is familiar with the technical scope disclosed by the present invention can easily think of changes or substitutions. All should be included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims (9)

1. A method of fabricating a bottom electrode for an MRAM, comprising:

providing a substrate, wherein the substrate sequentially comprises a metal interconnection layer, a first barrier layer and a dielectric layer, a bottom through hole is formed in the first barrier layer and the dielectric layer, the bottom through hole is connected with the metal interconnection layer, a second barrier layer and a conductive metal layer are sequentially covered on the surface of the substrate, and the conductive metal layer is filled in the bottom through hole;

performing chemical mechanical polishing on the conductive metal layer to remove the conductive metal layer above the second barrier layer;

depositing bottom electrode metal for the first time to fill a disc-shaped recess formed in the bottom through hole after the conductive metal layer is subjected to chemical mechanical polishing, so as to form a bottom electrode metal prefabricated layer;

performing chemical mechanical polishing on the bottom electrode metal prefabricated layer to remove the redundant second barrier layer and the bottom electrode metal prefabricated layer above the dielectric layer outside the bottom through hole;

depositing bottom electrode metal for the second time to cover the dielectric layer and the bottom electrode metal in the disc-shaped recess to form a bottom electrode metal layer;

and photoetching and etching the bottom electrode metal layer to obtain the MRAM bottom electrode.

2. The method of claim 1, wherein said chemically mechanically polishing said conductive metal layer comprises: stopping polishing end point on the second barrier layer, and performing over-polishing after the second barrier layer is detected according to an end point detection method so as to completely remove the conductive metal layer above the second barrier layer.

3. The method of claim 1, wherein the thickness of the first deposited bottom electrode metal is greater than the depth of the dish-shaped recess.

4. The method of claim 1, wherein the second deposited bottom electrode metal is the same or different material than the first deposited bottom electrode metal.

5. The method of claim 1, wherein the material of the bottom electrode metal is any one or a mixture of TaN, Ta, TiN and Ti.

6. The method of claim 1, wherein the conductive metal layer is made of one or more of Cu, W and Al.

7. The method of claim 1, wherein the material of the second barrier layer is any one or a mixture of Ta, TaN, Ti, TiN, Co and Ru.

8. The method of claim 1, wherein the material of the dielectric layer is silicon oxide (SiO) or silicon dioxide (SiO)₂Carbon oxide CDO, silicon nitride SiN, fluorosilicone glass FSG, phosphosilicate glass PSG, borophosphosilicate glass BPSG, tetraethylorthosilicate TEOS, Low-K dielectricAn electric or Ultra-Low-K dielectric.

9. The method of claim 1, wherein the material of the first barrier layer is silicon oxynitride, silicon nitride, silicon carbonitride or silicon carbide.

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