CN112053934B - AL (AL) 2 O 3 Sheet preparation method - Google Patents
AL (AL) 2 O 3 Sheet preparation method Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 55
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 238000005530 etching Methods 0.000 claims abstract description 25
- 238000001259 photo etching Methods 0.000 claims abstract description 22
- 238000006243 chemical reaction Methods 0.000 claims abstract description 11
- 230000001590 oxidative effect Effects 0.000 claims abstract description 7
- 238000004519 manufacturing process Methods 0.000 claims abstract description 6
- KRKNYBCHXYNGOX-UHFFFAOYSA-N citric acid Chemical compound OC(=O)CC(O)(C(O)=O)CC(O)=O KRKNYBCHXYNGOX-UHFFFAOYSA-N 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 27
- 238000009616 inductively coupled plasma Methods 0.000 claims description 11
- 238000001039 wet etching Methods 0.000 claims description 9
- 238000009279 wet oxidation reaction Methods 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 8
- 238000012546 transfer Methods 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 2
- 238000000407 epitaxy Methods 0.000 claims 1
- 229910018072 Al 2 O 3 Inorganic materials 0.000 abstract description 12
- 239000004065 semiconductor Substances 0.000 abstract description 10
- 230000003647 oxidation Effects 0.000 abstract description 6
- 238000007254 oxidation reaction Methods 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 abstract description 5
- 238000012545 processing Methods 0.000 abstract description 3
- 238000005260 corrosion Methods 0.000 abstract description 2
- 230000007797 corrosion Effects 0.000 abstract description 2
- 238000013461 design Methods 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 229910003902 SiCl 4 Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 238000005459 micromachining Methods 0.000 description 2
- 101100001673 Emericella variicolor andH gene Proteins 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002537 cosmetic Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000001027 hydrothermal synthesis Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 239000011819 refractory material Substances 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 239000012745 toughening agent Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02614—Transformation of metal, e.g. oxidation, nitridation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention provides an AL 2 O 3 A method of making a sheet, the method comprising: providing a substrate; epitaxial alternate growth of Al on the upper surface of the substrate X Ga 1‑X An As thin layer and a GaAs thin layer to form an epitaxial layer on an upper surface of the substrate; etching the epitaxial layer through a photoetching mask plate to form a plurality of independent sub-epitaxial layers; al for each of the sub-epitaxial layers X Ga 1‑X Oxidizing the thin As layer to oxidize the Al X Ga 1‑X Conversion of As thin layer into AL 2 O 3 A thin layer; etching the GaAs thin layer of each sub-epitaxial layer to obtain AL 2 O 3 A sheet. The invention adopts semiconductor micro-processing technology such as epitaxial growth, photoetching, oxidation, corrosion and the like to realize AL 2 O 3 The thickness of the flakes is controlled by epitaxial growth techniques, AL 2 O 3 The geometric shape of the flake is controlled by photoetching process, and has the characteristics of controllable flake shape and thickness, nano-scale thickness, high efficiency, low cost and the like, thereby being Al 2 O 3 The method provides an effective new way for the batch and controllable preparation and wide application of the slices.
Description
Technical Field
The invention relates to the technical field of semiconductor processing, in particular to an AL 2 O 3 A method for preparing a slice.
Background
Al 2 O 3 The flake has been developed in a large amount as a special two-dimensional flake structure with excellent performance, moderate surface activity, good adsorption force and remarkable shielding effect, and can be used as a filler, a toughening agent, a refractory material, cosmetics and pearlescent pigmentThe method has wide application prospect in the fields of the like.
In the prior art, al 2 O 3 There are various methods for preparing the sheet, and methods such as a molten salt method, a liquid phase indirect method, a hydrothermal method, a coating method, a mechanical method, and high-temperature sintering are generally adopted. The above methods all belong to powder-liquid phase synthesis, and the prepared Al 2 O 3 The diameter of the flake is several micrometers, and the thickness is 0.2-06 micrometers, but the geometric shape and the thickness of the flake are not controllable, and the thickness is not in the nanometer scale, so that the research and development of the related technology are limited.
Disclosure of Invention
Based on this, the object of the present invention is to provide an AL 2 O 3 Sheet preparation method for solving the problem of the prior AL 2 O 3 Al prepared by flake preparation process 2 O 3 The geometric shape and the diameter-thickness ratio of the thin sheet are uncontrollable.
The embodiment of the invention provides an AL 2 O 3 A method of making a sheet, the method comprising:
providing a substrate;
epitaxial alternate growth of Al on the upper surface of the substrate X Ga 1-X An As thin layer and a GaAs thin layer to form an epitaxial layer on an upper surface of the substrate;
etching the epitaxial layer through a photoetching mask plate to form a plurality of independent sub-epitaxial layers;
al for each of the sub-epitaxial layers X Ga 1-X Oxidizing the thin As layer to oxidize the Al X Ga 1-X Conversion of As thin layer into AL 2 O 3 A thin layer;
etching the GaAs thin layer of each sub-epitaxial layer to obtain AL 2 O 3 A sheet.
Further, the step of etching the epitaxial layer through the photolithography mask plate to form a plurality of independent sub-epitaxial layers includes:
spin-coating photoresist on the upper surface of the epitaxial layer;
exposing and developing the photoresist through the photoetching mask plate to transfer the pattern on the photoetching mask plate to the surface of the photoresist;
and etching the epitaxial layer by taking the photoresist as a mask to form a plurality of independent sub-epitaxial layers.
Further, the step of etching the epitaxial layer by using the photoresist as a mask includes:
and etching the epitaxial layer by adopting an inductively coupled plasma dry etching process and taking the photoresist as a mask.
Further, the process parameters of the inductively coupled plasma dry etching process are as follows: siCl 4 /N 2 ＝17sccm/16sccm。
Further, wherein Al X Ga 1-X The value of X in As is between 0.8 and 1.
Further, the Al X Ga 1-X The As thin layer has a thickness of between 5nm and 100 nm.
Further, the pair of sub-epitaxial layers each include Al X Ga 1-X Oxidizing the thin As layer to oxidize the Al X Ga 1- X Conversion of As thin layer into AL 2 O 3 The steps of the thin layer include:
adopting wet oxidation process to make Al of every sub-epitaxial layer X Ga 1-X Oxidizing the thin As layer to oxidize the Al X Ga 1-X Conversion of As thin layer into AL 2 O 3 A thin layer.
Further, the wet oxidation process comprises the following technological parameters: the temperature is between 230 and 260 ℃ and N 2 Flow rate between 9 and 11LM, H 2 O_N 2 The flow rate is between 4.5 and 5.5 LM.
Further, the step of etching the GaAs thin layer of each of the sub-epitaxial layers includes:
and adopting a lateral wet etching process to carry out selective wet etching on the structure of each sub-epitaxial layer so as to etch the GaAs thin layer.
Further, the liquid for etching the GaAs thin layer contains 50% citric acid andH 2 O 2 wherein 50% of citric acid and H 2 O 2 The volume ratio of (3) is as follows: 50% citric acid: h 2 O 2 ＝2:1。
The invention has the beneficial effects that: AL is obtained by using semiconductor micromachining processes such as epitaxial growth, photolithography, oxidation, and etching 2 O 3 The thickness of the flakes is controlled by epitaxial growth techniques, AL 2 O 3 The geometric shape of the flake is controlled by photoetching process, and has the characteristics of controllable flake shape and thickness, nano-scale thickness, high efficiency, low cost and the like, thereby being Al 2 O 3 The method provides an effective new way for the batch and controllable preparation and wide application of the slices.
Drawings
FIG. 1 shows an AL in a first embodiment of the invention 2 O 3 A flow chart of a sheet preparation method;
FIG. 2 shows an AL in a second embodiment of the invention 2 O 3 A flow chart of a sheet preparation method;
FIG. 3 shows an AL in a second embodiment of the invention 2 O 3 A preparation process explanatory diagram of the sheet preparation method.
The invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to FIG. 1, an AL in a first embodiment of the invention is shown 2 O 3 The sheet preparation method comprises the steps S01-S05.
In step S01, a substrate is provided.
Wherein the substrate is preferably a GaAs substrate, the size of which is preferably 2-6 inches, such as 2 inches, 3 inches, 4 inches or 6 inches, and the substrate is preferably a clean substrate, such as a GaAs substrate prepared just before, so as to ensure the subsequent AL 2 O 3 Yield of sheet preparation.
Step S02, alternately growing Al on the upper surface of the substrate in an epitaxial manner X Ga 1-X An As thin layer and a GaAs thin layer to form an epitaxial layer on the upper surface of the substrate.
In particular, the semiconductor epitaxial growth technique can be used to alternately grow Al on the upper surface of the substrate X Ga 1-X An As thin layer and a GaAs thin layer to obtain an epitaxial layer, al X Ga 1-X The number of layers of the As thin layer and the GaAs thin layer is not limited, and is preferably 2 to 5 layers. Due to Al X Ga 1-X The As thin layer is converted into AL by oxidation 2 O 3 Thin layer, AL 2 O 3 The thin layer is AL to be obtained subsequently 2 O 3 Thin sheets, therefore, during epitaxial growth, each layer of Al is required to be ensured X Ga 1-X The growth thickness of the As thin layer is equal and is within the design range, thereby ensuring the AL obtained by the subsequent preparation 2 O 3 The flakes have a relatively uniform thickness and are within design limits. Preferably Al X Ga 1-X The thickness of the As thin layer is controlled between 5nm and 100nm, for example, preferably 50nm, so that the Al obtained by the subsequent preparation 2 O 3 The thickness of the flakes is kept between 5nm and 100nm, thus reaching nanoscale in thickness.
Wherein Al is X Ga 1-X The value of X in As represents the percentage of Ga atoms substituted with Al atoms in GaAs, in the present embodiment, al X Ga 1-X The value of X in As is preferably between 0.8 and 1, and is optimally x=0.9, i.e. during this step Al can be grown epitaxially alternately on the upper surface of the substrate by semiconductor epitaxial growth techniques 0.9 Ga 0.1 And (5) an As thin layer and a GaAs thin layer to obtain an epitaxial layer. In particular, the epitaxial growth technique may be MBE (Molecular Beam Epitaxy ) or MOCVD (Metal-organic Chemical Vapor Deposition, metal organic chemical vapor deposition).
And S03, etching the epitaxial layer through a photoetching mask plate to form a plurality of independent sub-epitaxial layers.
Specifically, the geometry of the photolithographic mask and Al 2 O 3 The geometry of the thin sheet corresponds, that is, when the epitaxial layer is etched by using the semiconductor photolithography process, the epitaxial layer can be etched by using the geometry of the photolithography mask, and the etching depth is equal to the thickness of the epitaxial layer, so that the epitaxial layer is patterned, and a plurality of independent sub-epitaxial layers are obtained, which is equivalent to forming a plurality of independent bosses on the upper surface of the substrate, as shown in fig. 3. Wherein the sub-epitaxial layer and the epitaxial layer have the same structure and are all Al X Ga 1-X Structure with As thin layers and GaAs thin layers alternately arranged in sequence, and geometry of sub-epitaxial layer and Al 2 O 3 The geometry of the flakes corresponds. In the concrete implementation, al can be further controlled by designing different mask geometric figures 2 O 3 Geometry of the flakes.
Step S04, for each of the sub-epitaxial layers of Al X Ga 1-X Oxidizing the thin As layer to oxidize the Al X Ga 1-X Conversion of As thin layer into AL 2 O 3 A thin layer.
In specific implementation, wet oxidation process can be used to oxidize Al of the sub-epitaxial layer X Ga 1-X Oxidation of As to AL 2 O 3 Thereby making Al X Ga 1-X Conversion of As thin layer into AL 2 O 3 A thin layer.
Step S05, etching the GaAs thin layer of each sub-epitaxial layer to obtain AL 2 O 3 A sheet.
In particular, a lateral wet etching process can be used to selectively wet etch the sub-epitaxial layer structure to etch away the GaAs thin layer while leaving the AL 2 O 3 The thin layer is finally prepared Al 2 O 3 A sheet.
In summary, AL in the present embodiment 2 O 3 Slice preparation method, AL by adopting semiconductor micromachining processes such as epitaxial growth, photoetching, oxidation, corrosion and the like 2 O 3 The thickness of the flakes is controlled by epitaxial growth techniques, AL 2 O 3 The geometric shape of the flake is controlled by photoetching process, and has the characteristics of controllable flake shape and thickness, nano-scale thickness, high efficiency, low cost and the like, thereby being Al 2 O 3 The method provides an effective new way for the batch and controllable preparation and wide application of the slices.
Example two
Referring to FIGS. 2-3, shown are respective AL's in a second embodiment of the invention 2 O 3 A flow chart of a sheet preparation method and a preparation process explanatory diagram, the flow chart includes steps S11 to S17.
In step S11, a clean GaAs substrate is provided.
The GaAs substrate is preferably 2-6 inches in size, for example, 2 inches, 3 inches, 4 inches or 6 inches.
Step S12, alternately growing Al on the upper surface of the GaAs substrate in an epitaxial manner 0.9 Ga 0.1 An As thin layer and a GaAs thin layer to form an epitaxial layer on the upper surface of the substrate.
In particular embodiments, semiconductor epitaxial growth techniques may be employed to lineEpitaxial alternate growth of Al on the upper surface of the bottom 0.9 Ga 0.1 An As thin layer and a GaAs thin layer to obtain an epitaxial layer, al 0.9 Ga 0.1 The number of layers of the As thin layer and the GaAs thin layer is not limited, and is preferably 2 to 5 layers, and in this embodiment, 3 layers each are preferable. Due to Al 0.9 Ga 0.1 The As thin layer is converted into AL by oxidation 2 O 3 Thin layer, AL 2 O 3 The thin layer is AL to be obtained subsequently 2 O 3 Thin sheets, therefore, during epitaxial growth, each layer of Al is required to be ensured 0.9 Ga 0.1 The growth thickness of the As thin layer is equal and is within the design range, thereby ensuring the AL obtained by the subsequent preparation 2 O 3 The flakes have a relatively uniform thickness and are within design limits. Preferably Al 0.9 Ga 0.1 The thickness of the As thin layer is controlled between 5nm and 100nm, for example, preferably 50nm, so that the Al obtained by the subsequent preparation 2 O 3 The thickness of the flakes is kept between 5nm and 100nm, thus reaching nanoscale in thickness.
And S13, spin coating photoresist on the upper surface of the epitaxial layer.
And S14, exposing and developing the photoresist through a photoetching mask plate to transfer the pattern on the photoetching mask plate to the surface of the photoresist.
And S15, etching the epitaxial layer by adopting an inductively coupled plasma dry etching process and taking the photoresist as a mask to form a plurality of independent sub-epitaxial layers.
The process parameters of the inductively coupled plasma dry etching process (Inductive Coupled Plasma, abbreviated as ICP) are as follows: siCl 4 /N 2 =17 sccm/16sccm. Wherein SiCl 4 And N 2 Mixing the reaction atmosphere to form ICP process by SiCl 4 And N 2 The parameters of the (a) are limited, namely ICP process is limited in a specific reaction atmosphere, so that the etching efficiency and yield of the epitaxial layer are ensured.
Specifically, the whole process of etching the epitaxial layer is as follows: spin-coating photoresist on the upper surface of the epitaxial layer, exposing and developing the photoresist through a photoetching mask plate to transfer a micro-scale pattern on the photoetching mask plate to the surface of the photoresist, further transferring the photoresist pattern to the surface of the epitaxial layer by using the photoresist as a mask through an inductively coupled plasma dry etching process, and finally removing the residual photoresist to obtain a plurality of independent sub-epitaxial layers, wherein the steps are equivalent to forming a plurality of independent bosses on the upper surface of a substrate.
Wherein, micro-scale patterns of the photoetching mask plate and Al 2 O 3 The geometric figure of the thin sheet corresponds to that after the photoetching mask plate is adopted to expose and develop the photoresist, the micro-scale figure on the photoetching mask plate is transferred to the surface of the photoresist, so that the micro-scale figure on the surface of the photoresist is compared with Al 2 O 3 The geometric figure of the thin sheet corresponds to that of the thin sheet, and finally when the photoresist is used as a mask to further transfer the photoresist figure to the surface of the epitaxial layer, a plurality of independent sub-epitaxial layers formed finally are all identical to Al 2 O 3 The geometry of the flakes corresponds.
Step S16, adopting wet oxidation process to make Al of each sub-epitaxial layer 0.9 Ga 0.1 Oxidizing the thin As layer to oxidize the Al 0.9 Ga 0.1 Conversion of As thin layer into AL 2 O 3 A thin layer.
Wherein, the technological parameters of the wet oxidation process are as follows: the temperature is between 230 and 260 ℃ and N 2 Flow rate between 9 and 11LM, H 2 O_N 2 The flow rate is between 4.5 and 5.5 LM. I.e. at the position corresponding to Al 0.9 Ga 0.1 When the As thin layer is subjected to wet oxidation, the ambient temperature is controlled between 230 ℃ and 260 ℃, preferably 250 ℃, and N 2 The flow is controlled to be 10+/-1 LM, H 2 O_N 2 The flow rate is controlled to be 5+/-0.5 LM so as to ensure that Al 0.9 Ga 0.1 Complete conversion of As to AL 2 O 3 。
Step S17, adopting a lateral wet etching process to carry out selective wet etching on the structure of each sub-epitaxial layer so as to etch away the GaAs thin layer and obtain AL 2 O 3 A sheet.
In practice, a composition comprising 50% citric acid and H may be used 2 O 2 Is to (1) corrosive liquid pairEtching GaAs thin layer with 50% citric acid and H 2 O 2 The volume ratio of (3) is as follows: 50% citric acid: h 2 O 2 ＝2:1。
Wherein, the products obtained in the steps S11-S17 are shown in the corresponding graph of the step numbers in FIG. 3. However, it should be noted that fig. 3 is only an example of the present embodiment, and is mainly used for illustrating the schematic view for understanding, and is not meant to limit the actual product, and other graphic structures extending from fig. 3 and conforming to the spirit of the present invention still fall within the scope of the present invention.
The embodiment of the invention integrates the semiconductor micro-processing technology such as an epitaxial growth technology, photoetching, ICP dry etching, wet oxidation technology, lateral wet etching and the like. Compared with the prior art, the method has the following effects: the invention relates to a preparation method of a micro-nano structure of an integrated semiconductor process, which has the characteristics of controllable sheet shape and thickness, high efficiency and low cost, and the thickness can reach the nano scale, thereby being Al 2 O 3 The preparation and wide application of the nano-thin sheet in batch and control provide an effective new way.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (8)
1. AL (AL) 2 O 3 A method of making a sheet, the method comprising:
providing a substrate, wherein the substrate is a clean GaAs substrate;
epitaxy of Al on the upper surface of the substrate by molecular beam epitaxy or metal organic chemical vapor deposition technique X Ga 1-X An As thin layer and a GaAs thin layer to form an epitaxial layer on the upper surface of the substrate,the Al is X Ga 1-X The number of the As thin layers and the GaAs thin layers is 2-5;
etching the epitaxial layer through a photoetching mask plate to form a plurality of independent sub-epitaxial layers;
adopting wet oxidation process to make Al of every sub-epitaxial layer X Ga 1-X Oxidizing the thin As layer to oxidize the Al X Ga 1- X Conversion of As thin layer into AL 2 O 3 The thin layer, wherein the technological parameters of the wet oxidation process are as follows: the temperature is between 230 and 260 ℃ and N 2 Flow rate between 9 and 11LM, H 2 O_N 2 The flow is between 4.5 and 5.5 LM;
etching the GaAs thin layer of each sub-epitaxial layer by adopting a lateral wet etching process to obtain AL 2 O 3 A sheet.
2. The AL of claim 1 2 O 3 The wafer preparation method is characterized in that the step of etching the epitaxial layer through the photoetching mask plate to form a plurality of independent sub-epitaxial layers comprises the following steps:
spin-coating photoresist on the upper surface of the epitaxial layer;
exposing and developing the photoresist through the photoetching mask plate to transfer the pattern on the photoetching mask plate to the surface of the photoresist;
and etching the epitaxial layer by taking the photoresist as a mask to form a plurality of independent sub-epitaxial layers.
3. The AL of claim 2 2 O 3 The preparation method of the thin slice is characterized in that the step of etching the epitaxial layer by taking the photoresist as a mask comprises the following steps:
and etching the epitaxial layer by adopting an inductively coupled plasma dry etching process and taking the photoresist as a mask.
4. The AL of claim 3 2 O 3 Process for producing flakes, specialCharacterized in that the process parameters of the inductively coupled plasma dry etching process are as follows: siCl 4 /N 2 ＝17sccm/16sccm。
5. The AL of claim 1 2 O 3 A method for producing a sheet, characterized in that, among them, al X Ga 1-X The value of X in As is between 0.8 and 1.
6. The AL of claim 1 or 5 2 O 3 A method for producing a sheet, characterized in that the Al X Ga 1-X The As thin layer has a thickness of between 5nm and 100 nm.
7. The AL of claim 1 2 O 3 The wafer preparation method is characterized in that the step of etching the GaAs thin layer of each sub-epitaxial layer comprises the following steps:
and adopting a lateral wet etching process to carry out selective wet etching on the structure of each sub-epitaxial layer so as to etch the GaAs thin layer.
8. The AL of claim 7 2 O 3 A method for producing a sheet, characterized in that the liquid for etching the GaAs thin layer contains 50% citric acid and H 2 O 2 Wherein 50% of citric acid and H 2 O 2 The volume ratio of (3) is as follows: 50% citric acid: h 2 O 2 ＝2:1。
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| CN114976865A (en) * | 2022-05-19 | 2022-08-30 | 福建慧芯激光科技有限公司 | High-efficiency vertical cavity surface EML chip with high-contrast grating |
| CN118197918A (en) * | 2024-02-04 | 2024-06-14 | 文华学院 | A GaAs-based deep etching process hard mask material and preparation method thereof |
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