CN111987005A - Method for producing power semiconductor modules and power semiconductor modules - Google Patents
Method for producing power semiconductor modules and power semiconductor modules Download PDFInfo
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Abstract
本发明涉及一种用于生产功率半导体模块的方法和功率半导体模块,所述方法具有以下处理步骤:a)提供功率半导体布置,所述功率半导体布置具有基底和功率半导体部件,b)提供压花膜复合物,其中所述压花膜复合物被压花,使得在所述膜复合物的第一膜连接区域的法线方向上,所述第一膜连接区域被布置在第一高度水平处,第二膜连接区域被布置在高于所述第一高度水平的第二高度水平处,c)将导电粘合剂布置在所述压花膜复合物的所述第一膜连接区域和第二膜连接区域上,并且/或者布置在第一导体轨道和第二功率端子上,d)将所述压花膜复合物布置在所述基底上,使得粘合剂的第一部分与所述第一膜连接区域和第一导体轨道机械接触,并且粘合剂的第二部分与所述第二膜连接区域和第二功率端子机械接触,e)使粘合剂硬化。
The invention relates to a method for producing a power semiconductor module and a power semiconductor module, the method having the following processing steps: a) providing a power semiconductor arrangement with a substrate and power semiconductor components, b) providing an embossing A film composite, wherein the embossed film composite is embossed such that, in the direction normal to the first film connection region of the film composite, the first film connection region is disposed at a first height level , a second film connection area is arranged at a second height level higher than the first height level, c) conductive adhesive is arranged at the first film connection area and the first film connection area of the embossed film composite on the two film connection areas, and/or on the first conductor track and the second power terminal, d) arranging the embossed film composite on the substrate such that the first portion of the adhesive is in contact with the first conductor track and the second power terminal. A film connection area is in mechanical contact with the first conductor track, and a second portion of the adhesive is in mechanical contact with the second film connection area and the second power terminal, e) hardening the adhesive.
Description
技术领域technical field
本发明涉及一种用于生产功率半导体模块的方法和功率半导体模块。The invention relates to a method for producing a power semiconductor module and a power semiconductor module.
背景技术Background technique
DE 10 2013 104 949 B3公开了一种功率半导体模块,该功率半导体模块具有基底、功率半导体部件和膜复合物,其中膜复合物通过压力烧结连接以导电方式连接到功率半导体部件和基底。DE 10 2013 104 949 B3 discloses a power semiconductor module with a substrate, a power semiconductor component and a membrane composite, wherein the membrane composite is electrically conductively connected to the power semiconductor component and the substrate by means of a pressure sintered connection.
压力烧结连接的产生在技术上是复杂的,因为它需要对待相互连接的元件施加压力和温度。此外,高加压负荷会损坏功率半导体部件,并且例如在DCB基底或AMB基底的情况下,损坏基底的陶瓷层。The creation of a pressure sintered connection is technically complex because it requires the application of pressure and temperature to the elements to be connected to each other. Furthermore, high compressive loads can damage power semiconductor components and, for example, in the case of DCB substrates or AMB substrates, damage to the ceramic layers of the substrates.
发明内容SUMMARY OF THE INVENTION
本发明的目的是创造一种用于生产功率半导体模块的高效方法,以及一种可以被高效生产的功率半导体模块。The object of the present invention is to create an efficient method for producing power semiconductor modules, and a power semiconductor module that can be produced efficiently.
该目的通过一种用于生产功率半导体模块的方法来实现,该方法具有以下处理步骤:This object is achieved by a method for producing a power semiconductor module, which method has the following processing steps:
a)提供功率半导体组件,该功率半导体组件具有:基底,该基底具有不导电绝缘层,在该不导电绝缘层的第一主侧上布置有第一导体轨道和第二导体轨道;和功率半导体部件,该功率半导体部件布置在基底的第二导体轨道上,并且该功率半导体部件在其面向第二导体轨道的第一主侧上具有第一功率端子,并且在其背对第二导体轨道的第二主侧上具有第二功率端子,第一功率端子以导电方式连接到第二导体轨道,a) Providing a power semiconductor assembly having: a substrate having a non-conductive insulating layer on which a first conductor track and a second conductor track are arranged; and a power semiconductor component, the power semiconductor component is arranged on the second conductor track of the substrate and has a first power terminal on its first main side facing the second conductor track and on its side facing away from the second conductor track There is a second power terminal on the second main side, the first power terminal is conductively connected to the second conductor track,
b)提供压花膜复合物,该压花膜复合物具有不导电的第一膜和被布置在该第一膜上的导电的第二结构化膜,其中第二膜被结构化,使得所述膜具有第一膜连接区域和与第一膜连接区域分开布置的第二膜连接区域,其中压花膜复合物被压花,使得在第一膜连接区域的法线方向上,第一膜连接区域被布置在第一高度水平处,第二膜连接区域被布置在高于第一高度水平的第二高度水平处,b) providing an embossed film composite having a non-conductive first film and a conductive second structured film disposed on the first film, wherein the second film is structured such that all The film has a first film connection region and a second film connection region disposed separately from the first film connection region, wherein the embossed film composite is embossed such that in a direction normal to the first film connection region, the first film the connection area is arranged at a first height level, the second membrane connection area is arranged at a second height level higher than the first height level,
c)将导电粘合剂布置在压花膜复合物的第一膜连接区域和第二膜连接区域上,并且/或者布置在第一导体轨道和第二功率端子上,c) arranging the conductive adhesive on the first and second film connection areas of the embossed film composite and/or on the first conductor tracks and the second power terminals,
d)将压花膜复合物布置在基底上,使得粘合剂的第一部分与第一膜连接区域和第一导体轨道机械接触,并且粘合剂的第二部分与第二膜连接区域和第二功率端子机械接触,d) Disposing the embossed film composite on the substrate such that a first portion of the adhesive is in mechanical contact with the first film attachment area and the first conductor track, and a second portion of the adhesive is in mechanical contact with the second film attachment area and the first conductor track; The two power terminals are in mechanical contact,
e)使粘合剂硬化。e) Hardening the adhesive.
此外,该目的通过一种功率半导体模块来实现,该功率半导体模块具有:基底,该基底具有不导电绝缘层,在不导电绝缘层的第一主侧上布置有第一导体轨道和第二导体轨道;和功率半导体部件,该功率半导体部件被布置在基底的第二导体轨道上,并且在该功率半导体部件的面向第二导体轨道的第一主侧上具有第一功率端子,在该功率半导体部件的背对第二导体轨道的第二主侧上具有第二功率端子,其中第一功率端子以导电方式连接到第二导体轨道;并且所述功率半导体模块具有压花膜复合物,该压花膜复合物具有不导电的第一膜和被布置在该第一膜上的导电的结构化第二膜,其中第二膜被结构化,使得所述膜具有第一膜连接区域和与第一膜连接区域分开布置的第二膜连接区域,其中压花膜复合物被压花,使得在第一膜连接区域的法线方向上,第一膜连接区域被布置在第一高度水平处,第二膜连接区域布置在高于第一高度水平的第二高度水平处;并且所述功率半导体模块具有导电硬化粘合剂,其中粘合剂的第一部分以导电方式将第一膜连接区域连接到第一导体轨道,并且粘合剂的第二部分以导电方式将膜连接区域连接到第二功率端子。Furthermore, the object is achieved by a power semiconductor module having a base with an electrically non-conductive insulating layer, on a first main side of the electrically non-conductive insulating layer a first conductor track and a second conductor are arranged a track; and a power semiconductor component arranged on a second conductor track of the substrate and having a first power terminal on a first main side of the power semiconductor component facing the second conductor track, on the power semiconductor The second main side of the component facing away from the second conductor track has a second power terminal, wherein the first power terminal is connected in an electrically conductive manner to the second conductor track; and the power semiconductor module has an embossed film compound, which is pressed The flower film composite has a non-conductive first film and a conductive structured second film disposed on the first film, wherein the second film is structured such that the film has a first film connection region and is connected to the first film a second membrane attachment region spaced apart from the membrane attachment region, wherein the embossed film composite is embossed such that the first membrane attachment region is arranged at a first height level in the direction normal to the first membrane attachment region, The second film connection area is arranged at a second height level higher than the first height level; and the power semiconductor module has an electrically conductive hardening adhesive, wherein a first portion of the adhesive connects the first film connection area in an electrically conductive manner to the first conductor track, and a second portion of the adhesive conductively connects the membrane connection area to the second power terminal.
方法的有利设计以类似于功率半导体模块的有利设计的方式得出,并且反之亦然。The advantageous design of the method results in a similar way to the advantageous design of the power semiconductor module, and vice versa.
如果在进一步的处理步骤f)中,布置在膜复合物与功率半导体组件之间的至少一个空腔被不导电的灌封化合物完全填充,则证明是有利的。这在膜复合物的某些部段与功率半导体组件之间提供了非常可靠的电绝缘。It proves to be advantageous if, in a further processing step f), at least one cavity arranged between the membrane composite and the power semiconductor component is completely filled with a non-conductive potting compound. This provides very reliable electrical isolation between certain sections of the membrane composite and the power semiconductor components.
如果压花膜复合物具有被结构化以形成膜导体轨道的导电第三膜,并且第一膜被布置在第二膜与第三膜之间,则证明是有利的。这能够实现用于流过膜复合物的电流的导体的简单布线。It proves to be advantageous if the embossed film composite has an electrically conductive third film structured to form film conductor tracks, and the first film is arranged between the second film and the third film. This enables simple routing of the conductors for the current flowing through the membrane composite.
在这种情况下,如果压花膜复合物具有穿过第一膜的导电过孔,其中该导电过孔以导电方式将第一膜连接区域和第二膜连接区域连接到第三膜,则证明是有利的。这能够实现流过膜复合物的电流的导体的简单布线。In this case, if the embossed film composite has conductive vias through the first film, wherein the conductive vias conductively connect the first and second film connection regions to the third film, then proved to be beneficial. This enables simple routing of the conductors of the current flowing through the membrane composite.
此外,如果压花膜复合物被压花,使得当执行处理步骤d)时,与功率半导体部件的边缘的周围区域对准的该压花膜复合物在所述周围区域上方具有拱形轮廓,其中由拱形轮廓形成的拱形的顶点在第一膜连接区域的法线方向上、在高于第二高度水平的第三高度水平处被布置在膜复合物的面向基底的那一侧上,则证明是有利的。这可靠地防止了膜复合物与功率半导体部件的机械敏感边缘区域的机械接触。此外,这有助于在膜复合物与功率半导体部件的边缘区域之间布置灌封化合物,特别是软的或硬的浇注物。Furthermore, if the embossed film composite is embossed such that when processing step d) is carried out, the embossed film composite aligned with the surrounding area of the edge of the power semiconductor component has an arched profile above said surrounding area, wherein the apexes of the arches formed by the arched profiles are arranged on the side of the membrane composite facing the substrate at a third height level higher than the second height level in the normal direction of the first membrane connection area , it turns out to be beneficial. This reliably prevents mechanical contact of the film composite with the mechanically sensitive edge regions of the power semiconductor component. Furthermore, this facilitates the arrangement of a potting compound, in particular a soft or hard potting compound, between the film composite and the edge region of the power semiconductor component.
此外,如果在用于提供压花膜复合物的处理步骤b)中,进行具有以下处理步骤的生产压花膜复合物的方法,则证明是有利的:Furthermore, it proves to be advantageous if, in the process step b) for providing the embossed film composite, a process for producing an embossed film composite is carried out with the following process steps:
b1)在压机的第一压模与第二压模之间布置未压花的膜复合物,b1) arranging the unembossed film composite between the first die and the second die of the press,
b2)通过执行第一压模和第二压模的朝向彼此的相对移动来对未压花的膜复合物执行压花,使得第一压模和第二压模压在未压花的膜复合物上,从而由未压花的膜复合物形成压花膜复合物,其中第一压模和/或第二压模具有几何形状,使得在压花之后,在第一膜连接区域的法线方向上,第一膜连接区域被布置在第一高度水平处,第二膜连接区域被布置在高于第一高度水平的第二高度水平处,b2) performing embossing on the unembossed film composite by performing relative movement of the first and second stamps towards each other so that the first and second stamps are pressed against the unembossed film composite to form an embossed film composite from an unembossed film composite, wherein the first stamp and/or the second stamp have a geometry such that, after embossing, in the normal direction of the first film connection area , the first membrane connection area is arranged at a first height level, the second membrane connection area is arranged at a second height level higher than the first height level,
b3)从压机中移走压花膜复合物。b3) Remove the embossed film composite from the press.
在这种情况下,如果在处理步骤b2)中,第一压模和第二压模具有几何形状,使得当执行处理步骤d)时,与功率半导体部件的边缘的周围区域对准的压花膜复合物在所述周围区域上方具有拱形轮廓,其中由拱形轮廓形成的拱形的顶点在第一膜连接区域的法线方向上、在高于第二高度水平的第三高度水平处被布置在膜复合物的面向基底的那一侧上,则证明是有利的。这可靠地防止了膜复合物与功率半导体模块中的功率半导体部件的机械敏感边缘区域的机械接触。此外,这有助于在膜复合物与功率半导体部件的边缘区域之间布置灌封化合物,特别是软的或硬的浇注物。In this case, if, in process step b2), the first and second stampers have a geometry such that when process step d) is performed, the embossings are aligned with the surrounding area of the edge of the power semiconductor component The membrane composite has an arched profile above the surrounding area, wherein the apex of the arch formed by the arched profile is at a third height level higher than the second height level in the normal direction of the first membrane connection area It has proven to be advantageous to be arranged on the side of the membrane composite facing the substrate. This reliably prevents mechanical contact of the film composite with mechanically sensitive edge regions of the power semiconductor components in the power semiconductor module. Furthermore, this facilitates the arrangement of a potting compound, in particular a soft or hard potting compound, between the film composite and the edge region of the power semiconductor component.
此外,如果第一压模具有刚性几何形状,并且第二压模由弹性材料形成,或者如果第二压模具有刚性几何形状,并且第一压模由弹性材料形成,或者如果第一压模和第二压模具有刚性几何形状,其中第一压模和第二压模相对于彼此具有凸和凹的几何形状,则证明是有利的。这导致未压花的膜复合物的高效压花。Additionally, if the first die has a rigid geometry and the second die is formed of an elastomeric material, or if the second die has a rigid geometry and the first die is formed of an elastomeric material, or if the first die and The second die has a rigid geometry, wherein the first die and the second die have convex and concave geometries relative to each other, it proves to be advantageous. This results in efficient embossing of the unembossed film composite.
附图说明Description of drawings
下面参照下面列出的附图描述本发明的示例性实施例。在附图中:Exemplary embodiments of the present invention are described below with reference to the drawings listed below. In the attached image:
图1示出了功率半导体组件和压花膜复合物,Figure 1 shows a power semiconductor assembly and an embossed film composite,
图2示出了功率半导体组件和压花膜复合物,其中在压花膜复合物上布置有导电粘合剂,Figure 2 shows a power semiconductor assembly and an embossed film composite with a conductive adhesive disposed on the embossed film composite,
图3示出了根据本发明的功率半导体模块,和Figure 3 shows a power semiconductor module according to the present invention, and
图4示出了压机和为了压花的目的而被布置在压机中的未压花的膜复合物。Figure 4 shows a press and an unembossed film composite arranged in the press for embossing purposes.
附图中相同的元件用相同的附图标记来标记。Identical elements in the figures are marked with the same reference numerals.
具体实施例specific embodiment
下文描述了用于生产功率半导体模块1的方法(参见图3)。The method for producing the power semiconductor module 1 is described below (see FIG. 3 ).
在处理步骤a)中(该处理步骤的示例在图1中示出),提供了功率半导体组件2。在示例性实施例中,功率半导体组件2具有基底3,该基底3具有不导电绝缘层4,在不导电绝缘层4的第一主侧4a上布置有第一导电导体轨道5a和第二导电导体轨道5b,以及导电第三导体轨道5c。基底3优选具有导电的、优选非结构化的金属化层6,绝缘层4被布置在金属化层6与导体轨道5a、5b和5c之间。绝缘层4优选设计成陶瓷板。基底3可以被实施为例如直接铜结合基底(DCB基底)或活性金属钎焊基底(AMB基底)。替代地是,基底3也可以被实施为绝缘金属基底(IMS基底)。In processing step a), an example of which is shown in FIG. 1 , a
功率半导体组件2还具有布置在基底3的第二导体轨道5b上的功率半导体部件7,该功率半导体部件在其面向第二导体轨道5b的第一主侧8a上具有第一功率端子9a,并且在其背对第二导体轨道5b的第二主侧8b上具有第二功率端子9b,其中第一功率端子9a以导电方式连接到第二导体轨道5b,优选地是经由锡焊或烧结的金属层21。功率半导体部件7优选以晶体管例如IGBT(绝缘栅双极晶体管)或MOSFET(金属氧化物半导体场效应晶体管)或二极管的形式存在。在示例性实施例中,功率半导体部件7被设计为IGBT,其中第一功率端子9a形成IGBT的集电极端子,并且第二功率端子9b形成IGBT的发射极端子。替代地是,第二功率端子9b也可以形成IGBT的栅极端子。The
在处理步骤b)中(该处理步骤的示例在图1中另外示出),提供了压花膜复合物10,压花膜复合物10具有不导电的第一膜11和被布置在第一膜11上的导电结构化的第二膜12,其中第二膜12被结构化,使得其具有第一膜连接区域12a、与第一膜连接区域12a分开布置的第二膜连接区域12b、以及优选地是与第一膜连接区域12a和第二膜连接区域12b分开布置的第三膜连接区域12c。膜连接区域12a、12b和12c也可以以膜导体轨道部段的形式存在,这可以通过将第二膜12结构化来实施。压花膜复合物10优选具有导电的第三膜13,该导电的第三膜被结构化,以形成膜导体轨道13a和13b,第一膜11被布置在第二膜12与第三膜13之间。第一膜11以材料结合的方式连接到第二膜12和第三膜13。第二膜12和第三膜13优选由金属膜形成。第一膜优选实施为塑料膜。当然,膜复合物10可以具有一个或多个进一步的结构化或非结构化的导电膜(例如金属膜),在每个导电膜之间布置有不导电膜(例如塑料膜)。每个金属膜可以具有单个层或彼此叠置的多个金属层。压花膜复合物10优选具有穿过第一膜11的导电过孔14,该导电过孔以导电方式将第一膜连接区域12a、第二膜连接区域12b和第三膜连接区域12c分别连接到第三膜13。In processing step b) (an example of this processing step is additionally shown in FIG. 1 ), an embossed
本发明中的压花膜复合物10被压花,使得在第一膜连接区域12a的法线方向N上,第一膜连接区域12a被布置在第一高度水平H1处,第二膜连接区域12b被布置在高于第一高度水平H1的第二高度水平H2处。应当注意的是,出于本发明的目的,第一膜连接区域12a的法线方向N是第一膜连接区域12a的背对第一膜11的那一表面的法线方向N,该法线方向朝向第一膜11延伸。The embossed
在随后的处理步骤c)中(该处理步骤的示例在图2中示出),导电粘合剂15被布置在压花膜复合物10的第一膜连接区域12a、第二膜连接区域12b和第三膜连接区域12c上并且/或者被布置在第一导体轨道5a上、第二功率端子9b上和第三导体轨道5c上。导电粘合剂是现有技术总体状态的一部分。粘合剂的导电性优选通过至少一种导电填料材料(例如银颗粒)来实现,导电填料材料被添加到结合基质中。导电粘合剂可以例如以烧结粘合剂的形式存在。In a subsequent processing step c) (an example of this processing step is shown in FIG. 2 ), an electrically conductive adhesive 15 is arranged in the first 12a, second 12b film connection areas of the embossed
在随后的处理步骤d)中(该处理步骤的示例在图3中示出),压花膜复合物10被布置在基底3上,使得粘合剂15的第一部分15a与第一膜连接区域12a和第一导体轨道5a机械接触,粘合剂15的第二部分15b与第二膜连接区域12b和第二功率端子9b机械接触,粘合剂15的第三部分15c与第三膜连接区域12c和第三导体轨道5c机械接触。压花膜复合物10优选被压花,使得当执行处理步骤d)时,与功率半导体部件7的边缘7’的周围区域U对准的压花膜复合物10在所述周围区域U上方具有拱形轮廓,其中由拱形轮廓B形成的拱形的顶点SP在第一膜连接区域12a的法线方向N上、在高于第二高度水平H2的第三高度水平H3处被布置在膜复合物10的面向基底3的那一侧10a上。功率半导体部件7的边缘7’的周围区域U稍微延伸超过功率半导体部件7的边缘7’。In a subsequent processing step d) (an example of this processing step is shown in FIG. 3 ), the embossed
在随后的处理步骤e)中,如图3中以示例的方式所示的那一,粘合剂15被硬化,例如通过对粘合剂15施加温度或紫外线辐射。In a subsequent processing step e), as shown by way of example in FIG. 3 , the adhesive 15 is hardened, for example by applying temperature or UV radiation to the adhesive 15 .
在本发明中,通过将膜复合物形成为压花膜复合物10,连同形成用于将膜复合物10电接触到功率半导体组件2的导电粘合剂结合,使得功率半导体模块1的高效生产成为可能。In the present invention, efficient production of power semiconductor modules 1 is enabled by forming the film composite into an
在优选随后进行的处理步骤f)中,布置在膜复合物10与功率半导体组件2之间的至少一个空腔22被不导电灌封化合物完全填充,特别是软的或硬的浇注物。灌封化合物可以形成为例如硅树脂灌封化合物或环氧树脂灌封化合物。In a processing step f), which is preferably carried out subsequently, at least one cavity 22 arranged between the
在最简单的情况下,在处理步骤b)中,压花膜复合物10可以通过使压花膜复合物10以预制部件的形式可用来提供。In the simplest case, in processing step b), the embossed
替代地是,为了在处理步骤b)中(该处理步骤的示例在图4中示出)提供压花膜复合物10,用于生产压花膜复合物10的方法可以通过以下处理步骤来进行。Alternatively, in order to provide the embossed
在第一方法步骤b1)中,未压花的膜复合物10’被布置在压机20的第一压模16与第二压模17之间。除了未压花的膜复合物尚未被压花的特征之外,未压花的膜复合物10’与压花膜复合物10相同。In a first method step b1), the unembossed film composite 10' The unembossed film composite 10' is identical to the embossed
在随后的处理步骤b2)中,通过执行第一压模16和第二压模17朝向彼此的相对移动来对未压花的膜复合物10’进行压花,使得第一压模16和第二压模17压在未压花的膜复合物10’上,从而由未压花的膜复合物10’形成压花的膜复合物10。第一压模16和/或第二压模17具有几何形状,使得在压花之后,在第一膜连接区域12a的法线方向N上,第一膜连接区域12a被布置在第一高度水平H1处,第二膜连接区域12b被布置在高于第一高度水平H1的第二高度水平H2处。在示例性实施例中,压机20具有第一压制元件18和第二压制元件19,在第一压制元件18上布置有第一压模16,在第二压制元件19上布置有第二压模17。为了执行第一压模16和第二压模17朝向彼此的相对移动,在示例性实施例中,第一压制元件18朝向第二压制元件19移动,该移动在图1中以箭头示出。替代地是,第二压制元件19也可以朝向第一压制元件18移动。In a subsequent process step b2), the unembossed film composite 10' is embossed by performing a relative movement of the
在处理步骤b2)中,第一压模16和/或第二压模17优选具有几何形状,使得当执行处理步骤d)时,与功率半导体部件7的边缘7’的周围区域U对准的压花膜复合物10在所述周围区域U上方具有拱形轮廓,其中由拱形轮廓B形成的拱形的顶点SP在第一膜连接区域12a的法线方向N上、在高于第二高度水平H2的第三高度水平H3处被布置在膜复合物10的面向基底3的那一侧10a上。In process step b2), the
第一压模16可以具有刚性几何形状,第二压模17可以由弹性材料制成。替代地是,第二压模17可以具有刚性几何形状,第一压模16可以由弹性材料制成。例如,弹性材料可以由硅树脂形成。替代地是,第一压模16和第二压模17可以具有刚性的几何形状,第一压模16和第二压模17相对于彼此具有凸和凹的几何形状,这在图4中用虚线画出。The
在随后的处理步骤b3)中,从压机20中移走压花膜复合物10。In a subsequent processing step b3), the embossed
这里应当注意的是,本发明的不同示例性实施例的特征当然可以彼此自由组合,只要所述特征不相互排斥。It should be noted here that the features of the different exemplary embodiments of the invention may of course be freely combined with each other, as long as the features are not mutually exclusive.
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10056854A1 (en) * | 2000-11-16 | 2002-05-23 | Rafi Gmbh & Co Kg Elektrotechn | Touch-contact switch has switch surface defined between 2 plastics plates provided with electrically-conductive deformable coatings on their opposing surfaces |
| DE102004041868B3 (en) * | 2004-08-27 | 2006-03-02 | Leonhard Kurz Gmbh & Co. Kg | Transfer film, its use and process for the production of decorated plastic articles |
| DE102007006706A1 (en) * | 2007-02-10 | 2008-08-21 | Semikron Elektronik Gmbh & Co. Kg | Circuit arrangement with connecting device and manufacturing method thereof |
| US20090039516A1 (en) * | 2007-07-26 | 2009-02-12 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor component with metal contact layer and production method therefor |
| WO2016202539A1 (en) * | 2015-06-19 | 2016-12-22 | Danfoss Silicon Power Gmbh | Method for producing a metallic contact face by using a shaped metal body supported on one side, a power semiconductor with the metallic contact face and a bond shield for producing the metallic contact face |
| US20170092574A1 (en) * | 2015-09-24 | 2017-03-30 | Semikron Elektronik Gmbh & Co., Kg | Method for manufacture a power electronic switching device and power electronic switching device |
| DE102016104283A1 (en) * | 2016-03-09 | 2017-09-14 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with a housing |
| CN107644858A (en) * | 2016-07-22 | 2018-01-30 | 赛米控电子股份有限公司 | Power electronic switching device, its arrangement and the method for manufacturing switching device |
| DE102017122557A1 (en) * | 2017-09-28 | 2019-03-28 | Semikron Elektronik Gmbh & Co. Kg | Conduction electronic arrangement with a film composite and with a connection partner |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102013104949B3 (en) * | 2013-05-14 | 2014-04-24 | Semikron Elektronik Gmbh & Co. Kg | Power electronic switching device and arrangement hereby |
-
2019
- 2019-05-23 DE DE102019113762.4A patent/DE102019113762B4/en active Active
-
2020
- 2020-05-19 CN CN202010423273.2A patent/CN111987005B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10056854A1 (en) * | 2000-11-16 | 2002-05-23 | Rafi Gmbh & Co Kg Elektrotechn | Touch-contact switch has switch surface defined between 2 plastics plates provided with electrically-conductive deformable coatings on their opposing surfaces |
| DE102004041868B3 (en) * | 2004-08-27 | 2006-03-02 | Leonhard Kurz Gmbh & Co. Kg | Transfer film, its use and process for the production of decorated plastic articles |
| DE102007006706A1 (en) * | 2007-02-10 | 2008-08-21 | Semikron Elektronik Gmbh & Co. Kg | Circuit arrangement with connecting device and manufacturing method thereof |
| US20090039516A1 (en) * | 2007-07-26 | 2009-02-12 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor component with metal contact layer and production method therefor |
| WO2016202539A1 (en) * | 2015-06-19 | 2016-12-22 | Danfoss Silicon Power Gmbh | Method for producing a metallic contact face by using a shaped metal body supported on one side, a power semiconductor with the metallic contact face and a bond shield for producing the metallic contact face |
| US20170092574A1 (en) * | 2015-09-24 | 2017-03-30 | Semikron Elektronik Gmbh & Co., Kg | Method for manufacture a power electronic switching device and power electronic switching device |
| DE102016104283A1 (en) * | 2016-03-09 | 2017-09-14 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with a housing |
| CN107644858A (en) * | 2016-07-22 | 2018-01-30 | 赛米控电子股份有限公司 | Power electronic switching device, its arrangement and the method for manufacturing switching device |
| DE102017122557A1 (en) * | 2017-09-28 | 2019-03-28 | Semikron Elektronik Gmbh & Co. Kg | Conduction electronic arrangement with a film composite and with a connection partner |
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