CN111984059A - A PPS jump detection method and system for timing synchronization by a timing module - Google Patents

Abstract

The invention discloses a PPS jump detection method and system for time synchronization by a timing module. The method includes: connecting a device that needs to be timed with the timing module; The module synchronization flag is normal; set the system time, and set the time stamp comparison flag, when the current second is updated, record the time information of the timing module; System time information; under the condition of device synchronization, set the clock difference according to the current system time information and the time information of the timing module; according to the clock difference, determine whether the timing module is working normally or abnormally, and maintain the timing. The invention can solve the problems of abnormal time synchronization caused by failure of normal time synchronization module or device time synchronization module, failure of correct detection of PPS jump, failure of timely reset of time service module and failure of relevant alarms to be sent to the background on time.

Description

A PPS jump detection method and system for timing synchronization by a timing module

technical field

The invention relates to the technical field of clock synchronization, in particular to a PPS jump detection method and system for time synchronization by a timing module.

Background technique

With the rapid improvement of the automation degree of substations and the continuous growth of power grid scale, the unified time synchronization system in the power grid urgently needs more standardized and efficient operation management. Real-time data acquisition, control and accident analysis of power secondary equipment are inseparable from accurate clock systems. The time accuracy of the equipment in the station determines the efficiency and accuracy of the automation, informatization and intelligence of the entire station.

In the field project, a large number of measuring devices use the unified clock device of the whole station with the input of the timing module for time synchronization, which has high-precision synchronization under the condition of star lock and high-precision punctuality under the condition of star loss. The main principle of the clock synchronization of the measuring device is to use the clock signal receiver to obtain the clock pulse per second (PPS) and the UTC corresponding to the pulse jump time from the timing module, and the clock signal preprocessing module converts the received clock reference signal into The internal clock signal is then modulated by the signal generation module into the clock signal required by the measuring device, such as IRIG-B code, second pulse, minute pulse, etc. When the clock signal transmitted by the timing module is normal, the clock signal output by the timing server is synchronized with the second pulse of the timing module; but the timing module or the device timing module occasionally loses the lock. At this time, the device is abnormal and the PPS Jump occurs, the second pulse output by the timing module is unreliable, and the clock accuracy provided by the device does not meet the specification requirements.

The abnormal time synchronization caused by the jump of PPS not only affects the operators on duty to grasp the real-time operation of the power grid, but also cannot provide a time reference for the monitoring staff to accurately and quickly analyze the fault of the power system when the power grid is abnormal or faulty. The engineering application of the measuring device has brought great troubles.

SUMMARY OF THE INVENTION

In view of this, the purpose of the embodiments of the present invention is to provide a PPS jump detection method and system for time synchronization by a time service module, which can solve the abnormal time synchronization and PPS jump caused by the failure of the normal time synchronization time service module or the device time synchronization module. If the change cannot be detected correctly, the timing module cannot be reset in time, and the related alarms cannot be sent to the background on time, it can truly and effectively detect whether the timing module and the time synchronization module are working properly, and whether the device clock synchronization tracking accuracy meets the standard requirements, not only It is beneficial to speed up the analysis and processing of the cause of the accident, and improve the operation reliability of the power grid system.

In a first aspect, an embodiment of the present invention provides a method for detecting PPS hopping by a timing module for time synchronization, including:

Connect the device that needs to be timed to the timing module. For the first time synchronization, read the synchronization mark of the timing module to confirm that the synchronization mark of the timing module is normal.

The system time is set, and the timestamp comparison flag is set, and when the current second is updated, the time information of the timing module is recorded, and the time information of the timing module includes the PPS timestamp.

Set the device synchronization flag, determine whether the device is synchronized or out of synchronization, and record the current system time information under the condition of device synchronization or out of synchronization.

Under the condition of device synchronization, the clock difference is set according to the current system time information and timing module time information.

Determine whether the timing module is working normally or abnormally according to the clock difference, and maintain the timing.

In conjunction with the first aspect, the embodiment of the present invention provides the first possible implementation manner of the first aspect, wherein the reading the synchronization flag of the timing module to confirm that the synchronization flag of the timing module is normal, including:

Read the synchronization flag of the serial message of the timing module. If the set state of the synchronization flag remains for the first time period, the synchronization flag is considered to be effective.

In combination with the first aspect, the embodiment of the present invention provides the second possible implementation of the first aspect, wherein after confirming that the synchronization flag of the timing module is normal, the time stamp sent by the timing module is read, and the timing buffer of the device is filled in sequence. After the punctual buffer is filled, set the system time.

In conjunction with the first aspect, the embodiment of the present invention provides a third possible implementation manner of the first aspect, wherein after setting the system time, the device reads the time information and quality of the timing module when the second time period elapses after the system is updated in seconds, If the time information and quality of the timing module are normal, continue timing.

If the time information or quality of the timing module is abnormal, the device will be punctual, and a corresponding alarm will pop up, which will be sent to the background, and the device will block the jump detection and judgment logic.

In conjunction with the first aspect, the embodiment of the present invention provides a fourth possible implementation manner of the first aspect, wherein the device synchronization flag is set, the device is determined to be in synchronization or out of synchronization, and the current system under the condition of device synchronization or out of synchronization is recorded. Time information, including:

Under the condition of device synchronization, continue timing, and record the system timestamp of the current second = the system timestamp of the previous second + the current second interval.

When the device is out of sync, the device is self-punctual, pops up an alarm and sends it to the background, locks the jump detection judgment logic, and records the current second system time stamp = the previous second system time stamp + the second interval of the punctuation algorithm.

In conjunction with the first aspect, the embodiment of the present invention provides a fifth possible implementation manner of the first aspect, wherein, under the condition of device synchronization, the clock difference is set according to current system time information and timing module time information, including:

Set the time stamp difference, time stamp difference = |current second system time stamp - timing module PPS time stamp|.

Set the time difference, time difference=|time in seconds of the device system - time in seconds of the timing module|.

In conjunction with the first aspect, the embodiment of the present invention provides a sixth possible implementation manner of the first aspect, wherein the judging whether the timing module works normally or abnormally according to the clock difference, and maintaining the time synchronization, includes:

If the time stamp difference is greater than the threshold for the third consecutive time, or the time difference is not 0, the clock difference is normal, the timing module is judged to be abnormal, the device is self-timer, an alarm pops up and sent to the background, reset the timing module, and re-determine the synchronization flag of the timing module .

If the synchronization flag of the timing module is abnormal after a reset, the device will be self-clocking, an alarm will pop up and be sent to the background, and the device will block the jump detection and judgment logic; if the synchronization flag of the timing module is normal after a reset, the timing module will reset for the fourth time period After that, judge whether the timing module is working normally or abnormally again according to the clock difference, and reset the timing module synchronization flag within the fifth period of time, and set the timing flag.

If the clock error is still abnormal after a fourth reset, reset the timing module for a second time, delay the second reset for a sixth time, and then judge whether the timing module is working normally or abnormally according to the clock error.

If the clock error is still abnormal after the second reset after the sixth time delay, the device will keep time, an alarm will pop up and be sent to the background, and the device will enter the time synchronization module fault judgment logic; if the clock error meets the accuracy requirements, the device will maintain its own time. The stamp changes once with the timing module, and jumps to the completion stage of the first time synchronization after one minute.

After resetting the synchronization flag of the timing module and sending out the seventh duration, if the clock error meets the accuracy requirements and the synchronization flag of the timing module is normal, the device will maintain its own time stamp and change once with the timing module, and then jump to the completion stage of the first time synchronization; If the accuracy requirements are met, but the synchronization flag of the timing module is abnormal, the device locks the jump detection and judgment logic, from punctuality until the synchronization flag of the timing module is normal, and an alarm will be popped up and sent to the background.

In the second aspect, the embodiment of the present invention also provides a PPS jump detection system for timing the timing module, which is used to implement the PPS jump detection system for the timing module as described above, include:

The initialization module is used to connect the device that needs to be synchronized with the timing module. For the first time synchronization, read the synchronization flag of the timing module to confirm that the synchronization flag of the timing module is normal.

The time setting module is used to set the system time and set the time stamp comparison flag, and record the time information of the timing module when the current second is updated.

The quality judgment module is used to read the time information and quality of the timing module after the system time is set and the second time period has elapsed after the device system is updated. If the time information and quality of the timing module are normal, continue timing; if the time information of the timing module is Or the quality is abnormal, when the device is self-punctual, the corresponding alarm will pop up, send it to the background, and the device will block the jump detection and judgment logic.

The device synchronization module is used to set the device synchronization flag, determine whether the device is synchronized or out of synchronization, and record the current system time information under the condition of the device synchronization or out of synchronization.

The clock difference calculation module is used to set the clock difference according to the current system time information and the timing module time information under the condition of device synchronization, wherein the clock difference includes the time stamp difference and the time difference, and the time stamp difference=|current second system time stamp- Timing module PPS timestamp|, time difference=|time in seconds of the device system - time in seconds of the timing module|.

The jump reset module is used to judge whether the timing module is working normally or abnormally according to the clock difference, and maintain the timing.

In conjunction with the second aspect, an embodiment of the present invention provides a first possible implementation manner of the second aspect, wherein the device synchronization module includes:

The synchronization recording unit is used to continue timing under the condition of device synchronization, and record the system timestamp of the current second = the system timestamp of the previous second + the current second interval.

The out-of-step recording unit is used for the device out-of-sync condition, when the device is self-punctual, an alarm will pop up and be sent to the background, and the jump detection and discrimination logic will be blocked to record the current second system timestamp = the previous second system timestamp + timekeeping algorithm seconds interval.

In conjunction with the second aspect, the embodiment of the present invention provides a second possible implementation manner of the second aspect, wherein the jump reset module includes:

The one-time reset unit is used for if the time stamp difference is greater than the threshold for the third consecutive time, or the time difference is not 0, the clock difference is constant, and the timing module is judged to be abnormal. Re-judg the timing module synchronization flag.

The primary synchronization flag judgment unit is used for if the synchronization flag of the timing module is abnormal after a reset, the device will be self-clocked, an alarm will pop up and sent to the background, and the device will block the jump detection and judgment logic; if it is reset once, the timing module synchronization flag If it is normal, after the timing module resets for the fourth time period, it will judge whether the time service module is working normally or abnormally according to the clock difference, and reset the timing module synchronization flag within the fifth time period and set the timing flag.

The second reset unit is used to reset the timing module for a second time if the clock error is still abnormal after a fourth reset, and delay the second reset for a sixth time, and then judge whether the timing module works normally or abnormally according to the clock error.

The clock difference judgment unit is used for if the clock difference is still abnormal after the second reset after a delay of the sixth time, the device will keep the time automatically, an alarm will be popped up and sent to the background, and the device will enter the time synchronization module fault judgment logic; if the clock difference meets the accuracy If it is required, the device maintains its own time stamp and changes once with the timing module, and jumps to the first time synchronization completion stage after one minute.

The secondary synchronization flag judgment unit is used to reset the timing module synchronization flag after the seventh time period is issued, if the clock difference meets the accuracy requirements and the timing module synchronization flag is normal, the device maintains the time stamp and changes once with the timing module, and then jumps to The first time synchronization is completed; if the clock error meets the accuracy requirements, but the synchronization flag of the timing module is abnormal, the device locks the jump detection and judgment logic, from punctuality until the synchronization flag of the timing module is normal, and an alarm is popped up and sent to the background.

The beneficial effects of the embodiments of the present invention are:

By detecting and maintaining the PPS jump of the timing module in time, the present invention can solve the abnormal time synchronization caused by the failure of the normal time synchronization module or the device time synchronization module, the failure of correct detection of the PPS jump, the failure of the timing module to reset in time and the related If the alarm cannot be sent to the background on time and other problems, it can truly and effectively detect whether the timing module and the time synchronization module are working properly, and whether the device clock synchronization tracking accuracy meets the standard requirements, which not only helps to speed up the analysis and processing of the accident cause, but also improves the power grid System operation reliability.

Description of drawings

In order to illustrate the technical solutions of the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings used in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore do not It should be regarded as a limitation of the scope, and for those of ordinary skill in the art, other related drawings can also be obtained according to these drawings without any creative effort.

The PPS jump detection method and system for time synchronization by the timing module of the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

Fig. 1 is the flow chart of the PPS jump detection method that the timing module of the present invention performs time synchronization;

Fig. 2 is the logical block diagram of the PPS jump detection method that the timing module of the present invention performs time synchronization;

3 is a schematic diagram of the normal operation of the PPS jump detection method module in which the timing module of the present invention performs time synchronization;

FIG. 4 is a schematic diagram of abnormality detection by the PPS jump detection method for time synchronization performed by the timing module of the present invention.

Detailed ways

In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. The components of the embodiments of the invention generally described and illustrated in the drawings herein can be arranged and designed in a variety of different configurations.

Some embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The embodiments described below and features in the embodiments may be combined with each other without conflict.

Please refer to FIG. 1 to FIG. 4 , a first embodiment of the present invention provides a method for detecting PPS jumps in a timing module for time synchronization, including:

Connect the device that needs to be timed to the timing module. For the first time synchronization, read the synchronization mark of the timing module to confirm that the synchronization mark of the timing module is normal.

The system time is set, and the timestamp comparison flag is set, and when the current second is updated, the time information of the timing module is recorded, and the time information of the timing module includes the PPS timestamp.

Set the device synchronization flag, determine whether the device is synchronized or out of synchronization, and record the current system time information under the condition of device synchronization or out of synchronization.

Under the condition of device synchronization, the clock difference is set according to the current system time information and timing module time information.

Determine whether the timing module is working normally or abnormally according to the clock difference, and maintain the timing.

In conjunction with the first aspect, the embodiment of the present invention provides the first possible implementation manner of the first aspect, wherein the reading the synchronization flag of the timing module to confirm that the synchronization flag of the timing module is normal, including:

Read the synchronization flag of the serial message of the timing module. If the set state of the synchronization flag remains for the first time period, the synchronization flag is considered to be effective.

The first duration is 15S.

In combination with the first aspect, the embodiment of the present invention provides the second possible implementation of the first aspect, wherein after confirming that the synchronization flag of the timing module is normal, the time stamp sent by the timing module is read, and the timing buffer of the device is filled in sequence. After the punctual buffer is filled, set the system time.

In conjunction with the first aspect, the embodiment of the present invention provides a third possible implementation manner of the first aspect, wherein after setting the system time, the device reads the time information and quality of the timing module when the second time period elapses after the system is updated in seconds, If the time information and quality of the timing module are normal, continue timing.

The second duration is 500ms.

If the time information or quality of the timing module is abnormal, the device will be punctual, and a corresponding alarm will pop up, which will be sent to the background, and the device will block the jump detection and judgment logic.

In conjunction with the first aspect, the embodiment of the present invention provides a fourth possible implementation manner of the first aspect, wherein the device synchronization flag is set, the device is determined to be in synchronization or out of synchronization, and the current system under the condition of device synchronization or out of synchronization is recorded. Time information, including:

Under the condition of device synchronization, continue timing, and record the system timestamp of the current second = the system timestamp of the previous second + the current second interval.

When the device is out of sync, the device is self-punctual, pops up an alarm and sends it to the background, locks the jump detection judgment logic, and records the current second system time stamp = the previous second system time stamp + the second interval of the punctuation algorithm.

In conjunction with the first aspect, the embodiment of the present invention provides a fifth possible implementation manner of the first aspect, wherein, under the condition of device synchronization, the clock difference is set according to current system time information and timing module time information, including:

Set the time stamp difference, time stamp difference = |current second system time stamp - timing module PPS time stamp|.

Set the time difference, time difference=|time in seconds of the device system - time in seconds of the timing module|.

In conjunction with the first aspect, the embodiment of the present invention provides a sixth possible implementation manner of the first aspect, wherein the judging whether the timing module works normally or abnormally according to the clock difference, and maintaining the time synchronization, includes:

If the time stamp difference is greater than the threshold for the third consecutive time, or the time difference is not 0, the clock difference is normal, the timing module is judged to be abnormal, the device is self-timer, an alarm pops up and sent to the background, reset the timing module, and re-determine the synchronization flag of the timing module .

The third duration is 5S.

If the synchronization flag of the timing module is abnormal after a reset, the device will be self-clocking, an alarm will pop up and be sent to the background, and the device will block the jump detection and judgment logic; if the synchronization flag of the timing module is normal after a reset, the timing module will reset for the fourth time period After that, judge whether the timing module is working normally or abnormally again according to the clock difference, and reset the timing module synchronization flag within the fifth period of time, and set the timing flag.

The fourth duration is 10S.

The fifth duration is 60S.

If the clock error is still abnormal after a fourth reset, reset the timing module for a second time, delay the second reset for a sixth time, and then judge whether the timing module is working normally or abnormally according to the clock error.

If the clock error is still abnormal after the second reset after the sixth time delay, the device will keep time, an alarm will pop up and be sent to the background, and the device will enter the time synchronization module fault judgment logic; if the clock error meets the accuracy requirements, the device will maintain its own time. The stamp changes once with the timing module, and jumps to the completion stage of the first time synchronization after one minute.

After resetting the synchronization flag of the timing module and sending out the seventh duration, if the clock error meets the accuracy requirements and the synchronization flag of the timing module is normal, the device will maintain its own time stamp and change once with the timing module, and then jump to the completion stage of the first time synchronization; If the accuracy requirements are met, but the synchronization flag of the timing module is abnormal, the device locks the jump detection and judgment logic, from punctuality until the synchronization flag of the timing module is normal, and an alarm will be popped up and sent to the background.

The seventh duration is 60S.

Please refer to FIG. 3 to FIG. 4 , the black solid line in row A represents the synchronization mark of the timing module PPS, the black dotted line is the out-of-sync mark of the timing module PPS; the black dotted line in row B is the real-time time stamp of self-maintenance of the device. The synchronizing flag and the out-of-sync flag are the indicators indicating whether the timing module is working normally.

After the device is timed for the first time, the real-time maintenance device stamps the time stamp tick0 on the timing module PPS, and uses tick0 as the benchmark to detect the time stamp tick1 (the current second system time stamp) of the timing module PPS in real time. In the case of synchronization, the update of tick0 depends on the interval of the synchronization flag PPS; in the case of out-of-synchronization, the update of tick0 depends on the interval generated by the punctual algorithm.

When the flag of the timing module changes from out-of-sync to synchronization, the difference of |tick0-tick1| is less than 60 microseconds, and it is considered that the second pulse does not jump. If the difference between |tick0-tick1| is greater than 60 microseconds, it is considered that the timing module PPS jumps abnormally. At this time, the timing module is reset. After the reset, the synchronization flag appears and the delay is valid, and the time stamp difference is less than 60 microseconds. The system time follows once. Among the PPS jump faults, the case where the timing module can be reset and can be restored to normal timing is relatively high.

If the difference |tick0-tick1| is less than 60 microseconds for 10 consecutive seconds under the timing module synchronization condition, it is considered that the timing module and the device timing module work normally, and the timing module sets the synchronization flag to the device. The system time of the device is synchronized with the clock.

Please refer to FIG. 1 to FIG. 4 , the second embodiment of the present invention provides a PPS hopping detection system for time synchronization by a timing module, which is used to realize the PPS hopping in the timing synchronization module as described above. Change detection system, including:

The initialization module is used to connect the device that needs to be synchronized with the timing module. For the first time synchronization, read the synchronization flag of the timing module to confirm that the synchronization flag of the timing module is normal.

The time setting module is used to set the system time and set the time stamp comparison flag, and record the time information of the timing module when the current second is updated.

The quality judgment module is used to read the time information and quality of the timing module after the system time is set and the second time period has elapsed after the device system is updated. If the time information and quality of the timing module are normal, continue timing; if the time information of the timing module is Or the quality is abnormal, when the device is self-punctual, the corresponding alarm will pop up, send it to the background, and the device will block the jump detection and judgment logic.

The second duration is 500ms.

The device synchronization module is used to set the device synchronization flag, determine whether the device is synchronized or out of synchronization, and record the current system time information under the condition of the device synchronization or out of synchronization.

The clock difference calculation module is used to set the clock difference according to the current system time information and the timing module time information under the condition of device synchronization, wherein the clock difference includes the time stamp difference and the time difference, and the time stamp difference=|current second system time stamp- Timing module PPS timestamp|, time difference=|time in seconds of the device system - time in seconds of the timing module|.

The jump reset module is used to judge whether the timing module is working normally or abnormally according to the clock difference, and maintain the timing.

In conjunction with the second aspect, an embodiment of the present invention provides a first possible implementation manner of the second aspect, wherein the device synchronization module includes:

The synchronization recording unit is used to continue timing under the condition of device synchronization, and record the system timestamp of the current second = the system timestamp of the previous second + the current second interval.

The out-of-step recording unit is used for the device out-of-sync condition, when the device is self-punctual, an alarm will pop up and be sent to the background, and the jump detection and discrimination logic will be blocked to record the current second system timestamp = the previous second system timestamp + timekeeping algorithm seconds interval.

In conjunction with the second aspect, the embodiment of the present invention provides a second possible implementation manner of the second aspect, wherein the jump reset module includes:

The one-time reset unit is used for if the time stamp difference is greater than the threshold for the third consecutive time, or the time difference is not 0, the clock difference is constant, and the timing module is judged to be abnormal. Re-judg the timing module synchronization flag.

The third duration is 5S.

The primary synchronization flag judgment unit is used for if the synchronization flag of the timing module is abnormal after a reset, the device will be self-clocked, an alarm will pop up and sent to the background, and the device will block the jump detection and judgment logic; if it is reset once, the timing module synchronization flag If it is normal, after the timing module resets for the fourth time period, it will judge whether the time service module is working normally or abnormally according to the clock difference, and reset the timing module synchronization flag within the fifth time period and set the timing flag.

The fourth duration is 10S.

The second reset unit is used to reset the timing module for a second time if the clock error is still abnormal after a fourth reset, and delay the second reset for a sixth time, and then judge whether the timing module works normally or abnormally according to the clock error.

The sixth duration is 30S.

The clock difference judgment unit is used for if the clock difference is still abnormal after the second reset after a delay of the sixth time, the device will keep the time automatically, an alarm will be popped up and sent to the background, and the device will enter the time synchronization module fault judgment logic; if the clock difference meets the accuracy If it is required, the device maintains its own time stamp and changes once with the timing module, and jumps to the first time synchronization completion stage after one minute.

The secondary synchronization flag judgment unit is used to reset the timing module synchronization flag after the seventh time period is issued, if the clock difference meets the accuracy requirements and the timing module synchronization flag is normal, the device maintains the time stamp and changes once with the timing module, and then jumps to The first time synchronization is completed; if the clock error meets the accuracy requirements, but the synchronization flag of the timing module is abnormal, the device locks the jump detection and judgment logic, from punctuality until the synchronization flag of the timing module is normal, and an alarm is popped up and sent to the background.

The seventh duration is 60S.

The beneficial effects of the embodiments of the present invention are:

By detecting and maintaining the PPS jump of the timing module in time, the present invention can solve the abnormal time synchronization caused by the failure of the normal time synchronization module or the device time synchronization module, the failure of correct detection of the PPS jump, the failure of the timing module to reset in time and the related If the alarm cannot be sent to the background on time and other problems, it can truly and effectively detect whether the timing module and the time synchronization module are working properly, and whether the device clock synchronization tracking accuracy meets the standard requirements, which not only helps to speed up the analysis and processing of the accident cause, but also improves the power grid System operation reliability.

The computer program product of the PPS jump detection method and system for time synchronization by the timing module provided by the embodiment of the present invention includes a computer-readable storage medium storing program codes, and the instructions included in the program codes can be used to execute the foregoing method embodiments. The method in , the specific implementation can refer to the method embodiment, which will not be repeated here.

Specifically, the storage medium can be a general storage medium, such as a removable disk, a hard disk, etc. When the computer program on the storage medium is run, it can execute the above-mentioned PPS jump detection method for time synchronization by the timing module, thereby solving the problem of Problems such as abnormal time synchronization and PPS jump caused by the failure of the normal time synchronization module or the device time synchronization module, the failure of the timing module to reset in time, and the inability to send related alarms to the background on time.

The functions, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a processor-executable non-volatile computer-readable storage medium. Based on this understanding, the technical solution of the present invention can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution. The computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other media that can store program codes.

Finally, it should be noted that the above-mentioned embodiments are only specific implementations of the present invention, and are used to illustrate the technical solutions of the present invention, but not to limit them. The protection scope of the present invention is not limited thereto, although referring to the foregoing The embodiment has been described in detail the present invention, those of ordinary skill in the art should understand: any person skilled in the art who is familiar with the technical field within the technical scope disclosed by the present invention can still modify the technical solutions described in the foregoing embodiments. Or can easily think of changes, or equivalently replace some of the technical features; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be covered in the present invention. within the scope of protection. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims (10)

1. A PPS jump detection method for timing by a timing module is characterized by comprising the following steps:

the device needing time setting is butted with a time service module, the synchronous mark of the time service module is read when the time is set for the first time, and the synchronous mark of the time service module is confirmed to be normal;

setting system time, setting a timestamp comparison mark, and recording time information of a time service module when the current second is updated;

setting a device synchronization mark, judging whether the device is synchronized or out of step, and recording the current system time information under the condition of synchronization or out of step of the device;

under the synchronous condition of the device, setting clock difference according to the current system time information and the time information of the time service module;

and judging whether the time service module works normally or abnormally according to the clock difference, and maintaining time service.

2. The method according to claim 1, wherein the reading of the synchronization flag of the time service module to confirm that the synchronization flag of the time service module is normal comprises:

and reading a serial message synchronization mark of the time service module, and if the set state of the synchronization mark keeps the first time length, considering that the synchronization mark is effective.

3. The PPS jump detection method when the time service module carries out time synchronization according to claim 2, wherein after the synchronization mark of the time service module is confirmed to be normal, the time stamps sent by the time service module are read, the time keeping buffer area of the device is filled in sequence, and the system time is set after the time keeping buffer area is filled.

4. The PPS jump detection method for timing by the timing module according to claim 3, wherein after the system time is set, the time information and quality of the timing module are read when the second time length passes after the system time is updated, and the timing is continued if the time information and quality of the timing module are normal;

if the time information or the quality of the time service module is abnormal, the device automatically looks for time, a corresponding alarm is popped up, the alarm is uploaded to a background, and the device locks a jump detection judgment logic.

5. The PPS jump detection method when the time service module performs time synchronization according to claim 4, wherein the setting of the device synchronization flag, the judgment of device synchronization or device desynchronization, and the recording of the current system time information under the condition of device synchronization or device desynchronization comprise:

under the synchronous condition of the device, time service is continued, and the current second system time stamp is recorded as the previous second system time stamp plus the current second interval;

under the out-of-step condition of the device, the device pops up an alarm and sends the alarm to a background in a self-timekeeping mode, a jump detection judgment logic is locked, and the current second system time stamp is recorded as the previous second system time stamp and the timekeeping algorithm second interval.

6. The PPS jump detection method when the time service module performs time synchronization according to claim 5, wherein setting a clock offset according to the current system time information and the time service module time information under the device synchronization condition comprises:

setting a time stamp difference, wherein the time stamp difference is | the time stamp of the current second system-the time service module PPS |;

and setting time difference, wherein the time difference is | the time of the device system is more than one second-the time of the time service module is more than one second |.

7. The PPS jump detection method for timing by the time service module as claimed in claim 6, wherein the judging whether the time service module works normally or abnormally according to the clock difference comprises:

if the time stamp difference is greater than the threshold value continuously for a third time or the time difference is not 0, the clock difference is abnormal, the time service module is judged to be abnormal in work, the device is self-timed, an alarm is popped up and sent to the background, the time service module is reset, and the synchronous mark of the time service module is judged again;

if the synchronization mark of the time service module is abnormal after once reset, the device automatically keeps time, pops up an alarm and uploads the alarm to a background, and the device locks a jump detection judgment logic; if the synchronous mark of the time service module is normal after once resetting, after the time service module resets the fourth time length, judging whether the time service module works normally or abnormally again according to the clock error, and setting a time keeping mark when the synchronous mark of the reset time service module is sent out within the fifth time length;

if the clock difference is still abnormal after the fourth time of the first reset, the time service module is reset for the second time, the sixth time is delayed after the second reset, and the time service module is judged to work normally or abnormally again according to the clock difference;

if the clock difference is still abnormal after the sixth time of time delay after the secondary reset, the device automatically keeps time, pops up an alarm and uploads the alarm to a background, and the device enters a time setting module fault judgment logic; if the clock difference meets the precision requirement, the self-maintenance timestamp of the device changes once along with the time service module, and the device jumps to the first time service completion stage after one minute;

after the reset time service module synchronous mark sends out a seventh time length, if the clock difference meets the precision requirement and the time service module synchronous mark is normal, the device automatically maintains the timestamp to change once along with the time service module, and then jumps to the first time service finishing stage; if the clock error meets the precision requirement, but the synchronization mark of the time service module is abnormal, the device locks the jump detection judgment logic, and pops up an alarm and uploads the alarm to the background at the same time until the synchronization mark of the time service module is normal during self-defense.

8. A PPS jump detection system for timing by a timing module, which is used for implementing the PPS jump detection system for timing by the timing module as claimed in any one of claims 1 to 7, comprising:

the initialization module is used for butting a device needing time synchronization with the time service module, reading a synchronous mark of the time service module when time synchronization is carried out for the first time, and confirming that the synchronous mark of the time service module is normal;

the time setting module is used for setting system time, setting a timestamp comparison mark and recording time information of the time service module when the current second is updated;

the quality judgment module is used for reading time information and quality of the time service module when a second time length passes after the system time is set and the system of the device is updated in seconds, and continuing time service if the time information and the quality of the time service module are normal; if the time information or the quality of the time service module is abnormal, the device automatically looks for time, a corresponding alarm is popped up and sent to a background, and the device locks a jump detection judgment logic;

the device synchronization module is used for setting a device synchronization mark, judging whether the device is synchronized or out of step and recording the current system time information under the condition of synchronization or out of step of the device;

the clock difference calculation module is used for setting a clock difference according to the current system time information and the time service module time information under the device synchronization condition, wherein the clock difference comprises a time stamp difference and a time difference, the time stamp difference is | the current second system time stamp-the time service module PPS time stamp |, and the time difference is | the time of the device system second or more and the time of the time service module second or more |;

and the jump reset module is used for judging whether the time service module works normally or abnormally according to the clock difference and maintaining time service.

9. The PPS transition detection system when timed by the timing module of claim 8, wherein the device synchronization module comprises:

the synchronous recording unit is used for continuing time service under the synchronous condition of the device and recording the current second system time stamp which is the previous second system time stamp plus the current second interval;

and the step-out recording unit is used for popping up an alarm and uploading the alarm to a background when the device is in a self-timekeeping state under the step-out condition, locking the jump detection judgment logic and recording the current second system time stamp as the previous second system time stamp and the timekeeping algorithm second interval.

10. The PPS transition detection system when timed by the timing module of claim 9, wherein the transition reset module comprises:

the primary reset unit is used for judging that the time service module works abnormally if the time stamp difference is greater than a threshold value continuously for a third time or the time difference is not 0, popping an alarm and uploading the alarm to a background when the device is self-timed, resetting the time service module and judging the synchronous mark of the time service module again;

the primary synchronization mark judging unit is used for popping up an alarm and uploading the alarm to a background if the synchronization mark of the time service module is abnormal after the primary reset, and locking and jumping detection judging logic of the device; if the synchronous mark of the time service module is normal after once resetting, after the time service module resets the fourth time length, judging whether the time service module works normally or abnormally again according to the clock error, and setting a time keeping mark when the synchronous mark of the reset time service module is sent out within the fifth time length;

the secondary reset unit is used for resetting the time service module for the second time if the clock difference is still abnormal after the fourth time is reset for the first time, delaying the sixth time after the second time is reset, and judging whether the time service module works normally or abnormally again according to the clock difference;

the clock error judging unit is used for popping up an alarm and uploading the alarm to a background if the clock error is still abnormal after the sixth time delay after the secondary reset, and the device enters a time setting module fault judging logic; if the clock difference meets the precision requirement, the self-maintenance timestamp of the device changes once along with the time service module, and the device jumps to the first time service completion stage after one minute;

the secondary synchronization mark judging unit is used for resetting the synchronization mark of the time service module to send out a seventh time length, if the clock error meets the precision requirement and the synchronization mark of the time service module is normal, the device automatically maintains the timestamp to change once along with the time service module, and then jumps to the first time setting finishing stage; if the clock error meets the precision requirement, but the synchronization mark of the time service module is abnormal, the device locks the jump detection judgment logic, and pops up an alarm and uploads the alarm to the background at the same time until the synchronization mark of the time service module is normal during self-defense.

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