CN111969004A - Micro semiconductor structure and manufacturing method thereof - Google Patents

Abstract

A micro-semiconductor structure and a manufacturing method thereof, wherein the micro-semiconductor structure comprises a substrate, a dissociation layer, a protective layer and a micro-semiconductor. The dissociation layer is located on one side of the substrate, the protective layer is located on at least one of the two sides of the substrate, and the micro-semiconductor is located on the same side of the two sides of the substrate as the dissociation layer. The protective layer has a light source transmittance of less than 20% for a wavelength less than 360 nm. Thus, the protective layer can prevent the micro-semiconductor from being irradiated by the laser light source and causing abnormality or damage during the laser dissociation process.

Description

Micro-semiconductor structure and method of making the same

technical field

The present disclosure relates to a micro-semiconductor structure and a manufacturing method thereof, and in particular to a micro-semiconductor structure and a manufacturing method thereof applied in a laser dissociation process.

Background technique

In recent years, various kinds of micro-semiconductors are widely used in various electronic devices, such as organic light-emitting diodes (Organic Light-Emitting Diode; OLED) or micro light-emitting diodes (Micro Light-Emitting Diode; MicroLED). In the process of manufacturing micro-semiconductors, micro-semiconductors often need to be processed on different substrates, and the laser lift-off (LLO) process is often used to separate the micro-semiconductors from the substrates to facilitate the transfer of micro-semiconductors between different substrates. and processing. However, after the micro-semiconductor is scaled down to the micron level, in the laser dissociation process, the micro-semiconductor is often abnormal or damaged due to the irradiation of the laser light source. Therefore, developing a micro-semiconductor structure suitable for the laser dissociation process and a manufacturing method thereof has become an important and urgent problem in the industry.

SUMMARY OF THE INVENTION

The present disclosure provides a micro-semiconductor structure and a manufacturing method thereof, which can reduce the damage rate of the micro-semiconductor structure in a laser dissociation process by configuring a protective layer with low transmittance to laser light.

According to an embodiment of the present disclosure, a micro-semiconductor structure is provided, which includes a substrate, a dissociation layer, a protective layer, and a micro-semiconductor. The dissociation layer is located on one side of the substrate, the protective layer is located on at least one of the two sides of the substrate, and the micro-semiconductor is located on the same side as the dissociation layer among the two sides of the substrate. The transmittance of the protective layer to a light source with a wavelength of less than 360 nm is less than 20%.

In the micro-semiconductor structure according to the embodiment described in the preceding paragraph, the Young's modulus of the protective layer is greater than the Young's modulus of the dissociation layer.

According to the micro-semiconductor structure of the above-mentioned embodiment, the dissociation layer, the protective layer and the micro-semiconductor are all located on the same side of the substrate, and the dissociation layer is arranged on the substrate, the protective layer is arranged on the dissociation layer, and the micro-semiconductor is arranged on the same side of the substrate. on the protective layer.

The micro-semiconductor structure according to the embodiment described in the preceding paragraph may further include an easily removable layer disposed between the protective layer and the micro-semiconductor.

According to the micro-semiconductor structure of the embodiment described in the preceding paragraph, the easily removable layer and the dissociation layer are both made of organic materials, and the protective layer is made of inorganic materials.

According to the micro-semiconductor structure of the embodiment described in the preceding paragraph, the protective layer is a patterned structure.

According to the micro-semiconductor structure of the embodiment described in the preceding paragraph, the ratio of a total area of the protective layer projected onto the substrate to an area of the dissociation layer projected onto the substrate may be between 0.5 and 1.

According to the micro-semiconductor structure of the above-mentioned embodiment, the dissociation layer can be correspondingly disposed under the protective layer, and a projected area of the protective layer on the substrate is greater than or equal to a projected area of the dissociative layer on the substrate.

According to the micro-semiconductor structure of the embodiment described in the preceding paragraph, the protective layer may comprise a metal material.

According to the micro-semiconductor structure of the above-mentioned embodiment, the protective layer can include a first protective layer and a second protective layer, and the second protective layer and the first protective layer can be arranged alternately.

According to the micro-semiconductor structure of the above-mentioned embodiment, any position where the micro-semiconductor is projected on the substrate overlaps with the projection of the first protective layer or the second protective layer on the substrate.

According to the micro-semiconductor structure of the embodiment described in the preceding paragraph, a cross-sectional area of the dissociation layer perpendicular to the substrate is gradually reduced toward the direction of the substrate.

According to the micro-semiconductor structure of the embodiment described in the preceding paragraph, the micro-semiconductor further includes an insulating layer, and the insulating layer is located between the micro-semiconductor and the protective layer.

According to the micro-semiconductor structure of the above-mentioned embodiment, the projected area of the micro-semiconductor or the protective layer on the substrate is larger than the projected area of the dissociation layer on the substrate.

According to an embodiment of the present disclosure, a method for fabricating a micro semiconductor structure is provided, which includes a substrate providing step, a dissociation layer setting step, a protective layer setting step, and a micro semiconductor setting step. The step of providing the substrate is to provide a substrate. The dissociation layer disposing step is to dispose a dissociation layer on one side of the substrate. The step of disposing the protective layer is to dispose a protective layer on at least one side of the substrate. The micro-semiconductor disposing step is to dispose a micro-semiconductor on the same side as the dissociation layer in both sides of the substrate. The transmittance of the protective layer to a light source with a wavelength of less than 360 nm is less than 20%.

According to the manufacturing method of the micro-semiconductor structure in the embodiment described in the preceding paragraph, it may further include a step of disposing an easily removable layer. The step of disposing the easily removable layer is to dispose an easily removable layer between the micro-semiconductor and the protective layer.

According to the manufacturing method of the micro-semiconductor structure in the above-mentioned embodiment, when the dissociation layer is dissociated by the aforementioned light source, the light source and the protective layer can be correspondingly disposed on two sides of the dissociation layer.

Description of drawings

FIG. 1 shows a schematic structural diagram of a micro-semiconductor structure according to a first embodiment of the present disclosure;

FIG. 2 shows a schematic structural diagram of a micro-semiconductor structure according to a second embodiment of the present disclosure;

3 shows a schematic structural diagram of a micro-semiconductor structure according to a third embodiment of the present disclosure;

FIG. 4 shows a schematic structural diagram of a micro-semiconductor structure according to a fourth embodiment of the present disclosure;

FIG. 5 shows a schematic structural diagram of a micro-semiconductor structure according to a fifth embodiment of the present disclosure;

FIG. 6 shows a schematic structural diagram of a micro-semiconductor structure according to a sixth embodiment of the present disclosure;

FIG. 7 shows a schematic structural diagram of a micro-semiconductor structure according to a seventh embodiment of the present disclosure;

FIG. 8 shows a schematic structural diagram of a micro-semiconductor structure according to an eighth embodiment of the present disclosure;

9 shows a schematic structural diagram of a micro-semiconductor structure according to a ninth embodiment of the present disclosure;

FIG. 10 shows a schematic structural diagram of a micro-semiconductor structure according to a tenth embodiment of the present disclosure;

FIG. 11 shows a flow chart of steps of a method for fabricating a micro-semiconductor structure in accordance with an eleventh embodiment of the present disclosure; and

FIG. 12 shows a flow chart of steps of a method for fabricating a micro-semiconductor structure in accordance with a twelfth embodiment of the present disclosure.

Description of reference numbers:

100, 200, 300, 400, 500, 600, 700, 800, 900, 1000: Micro semiconductor structures

110, 210, 310, 410, 510, 610, 710, 810, 910, 1010: Substrates

120, 220, 320, 420, 520, 620, 720, 820, 920, 1020: dissociation layer

130, 230, 330, 430, 530, 630, 730, 830, 930, 1030: protective layer

331,431,931,1031: First protective layer

332,432,932,1032: Second protective layer

140, 240, 340, 440, 540, 640, 740, 840, 940, 1040: Micro Semiconductors

532: first protective layer

542: Insulation layer

250,350: Easy Removal Layer

S100, S200: Manufacturing method of micro-semiconductor structure

S110, S210: Substrate supply step

S120, S220: dissociation layer setting steps

S130, S230: protective layer setting steps

S240: Easy-to-remove layer setting steps

S150, S250: Micro-Semiconductor Setup Steps

Dd, Dc, Dp: Thickness

L: light source

Detailed ways

FIG. 1 shows a schematic diagram of a miniature semiconductor structure 100 in accordance with a first embodiment of the present disclosure. As can be seen from FIG. 1 , the micro-semiconductor structure 100 includes a substrate 110 , a dissociation layer 120 , a protective layer 130 and a micro-semiconductor 140 , wherein the dissociation layer 120 , the protective layer 130 and the micro-semiconductor 140 are sequentially disposed on the substrate 110 .

In detail, in the first embodiment, the dissociation layer 120 is located on one side of the substrate 110 and disposed above the substrate 110 . The dissociation layer 120 is a photodissociation material. During the manufacturing process of the micro-semiconductor structure 100 , it can be dissociated by irradiation with a light source L (wavelength of about 240 nm to 360 nm), so that the protective layer 130 and the micro-semiconductor 140 and other structures on it are dissociated. It can be separated from the substrate 110 and transferred to another target substrate (eg, a wire substrate) to facilitate subsequent processes. The material of the dissociation layer 120 can be an organic material, including organic polymer materials such as polyimide, benzocyclobutene, phenol formaldehyde resin, epoxy resin, Polyisoprene rubber or a combination thereof, but the present disclosure is not limited thereto.

Furthermore, the protective layer 130 is disposed on the dissociation layer 120, and the protective layer 130 and the dissociation layer 120 are located on the same side of the substrate 110, but the present disclosure is not limited thereto. The transmittance of the protective layer 130 to a light source with a wavelength of less than 360 nm is less than 20% (ie, between 0% and 20%), so that the protective layer 130 can prevent the micro-semiconductor 140 from being irradiated by the light source L to cause abnormality or abnormality during the photodissociation process. damage. Here, the light source L is a laser light source.

Further, the Young's modulus of the protective layer 130 may be greater than the Young's modulus of the dissociation layer 120 . In this way, the protective layer 130 can serve as a protective buffer layer, which can reduce, for example, the impact on the structure of the micro-semiconductor 140 during transfer and the influence of the light source L on the micro-semiconductor 140 .

In detail, the material of the protective layer 130 can be inorganic material or metal material, and can be nitride, oxide, metal or alloy. Further, the material of the protective layer 130 can be silicon oxide, silicon nitride, silicon oxynitride or a combination thereof, and can also be aluminum, silver, gold, alloys or oxides thereof, but not limited thereto. In particular, the protective layer 130 may be removed in a subsequent process as required, and the removal process may be an etching process.

The micro-semiconductor 140 is disposed on the protective layer 130 , and the micro-semiconductor 140 and the dissociation layer 120 are located on the same side of the substrate 110 . In the first embodiment, the dissociation layer 120 , the protective layer 130 and the micro-semiconductor 140 are all located on the same side of the substrate 110 , but the present disclosure is not limited thereto. In detail, the size of the micro semiconductor 140 is less than or equal to 100 microns, and can be a micro light emitting diode, a micro laser diode, or a micro photodiode. However, the present disclosure is not limited to this. In another embodiment, the micro-semiconductor 140 can also be a micro-semiconductor 140 capable of being controllable to perform a predetermined electronic function, such as a microdiode, a micro transistor, a micro integrated circuit, a micro sensor sensor (micro sensor), but not limited to this.

The thickness of the dissociation layer 120 vertical to the substrate 110 is Dd, the thickness of the protective layer 130 vertical to the substrate 110 is Dp, and the thickness of the micro-semiconductor 140 vertical to the substrate 110 is Dc, which can satisfy the following conditions: 0.1<Dp/Dd. It is avoided that the protective layer 130 is too small to cause insufficient protection. In addition, it can satisfy the following condition: Dp/Dc<1, thereby preventing the protection layer 130 from being too large and difficult to be removed later. Further, Dd may be between 500 nm and 6000 nm, Dp may be between 50 nm and 500 nm, and Dc may be between 4 microns and 10 microns. Thereby, the protective layer 130 can also protect the micro-semiconductor 140 from being irradiated by the light source L to cause abnormality or damage during the laser dissociation process.

The wavelength absorptivity of the dissociation layer 120 to the light source L may be greater than that of the protective layer 130 to the light source L, and the material absorptivity of the dissociation layer 120 to the light source L may be greater than that of the protective layer 130 to the light source L. Therefore, in the laser dissociation process, the dissociation layer 120 can be removed before the protective layer 130, and the unabsorbed light can be blocked due to the low transmittance of the protective layer 130, so that the protective layer 130 can be more It is good to protect the micro-semiconductor 140 from abnormality or damage caused by laser light irradiation.

FIG. 2 shows a schematic diagram of a miniature semiconductor structure 200 in a second embodiment in accordance with the present disclosure. As can be seen from FIG. 2 , the micro-semiconductor structure 200 includes a substrate 210 , a dissociation layer 220 , a protective layer 230 , a micro-semiconductor 240 and an easily removable layer 250 . The dissociation layer 220 , the protective layer 230 , the easily removable layer 250 and the micro-semiconductor 240 are sequentially disposed on the substrate 210 .

In detail, in the second embodiment, the dissociation layer 220 is located on one side of the substrate 210 and disposed above the substrate 210 . The protective layer 230 is disposed on the dissociation layer 220 , and the protective layer 230 and the dissociation layer 220 are located on the same side of the substrate 210 . The micro-semiconductor 240 is located on the same side of the protective layer 230 and the dissociation layer 220 , and the micro-semiconductor 240 and the dissociation layer 220 are located on the same side of the substrate 210 . The materials and dimensions of the dissociation layer 220 , the protective layer 230 and the micro-semiconductor 240 can be the same as or similar to those in the first embodiment, which will not be described in detail in this and subsequent embodiments.

The easily removable layer 250 is disposed between the protective layer 230 and the micro-semiconductor 240 , and the easily removable layer 250 and the dissociation layer 220 are located on the same side of the substrate 210 . In the subsequent process, since the protective layer 230 needs to be removed, the provision of the easily removable layer 250 can facilitate the separation of the protective layer 230 and the micro-semiconductor 240 . In detail, the easily removable layer 250 can be etched by an etchant to remove the protective layer 230, and the etching rate of the easily removable layer 250 by the etchant is greater than that of the protective layer 230, but this is not the case limit. In this way, in the subsequent manufacturing process, the protective layer 230 can be removed more conveniently. The material of the easily removable layer 250 can be an organic material, including organic polymer materials such as polyimide, benzocyclobutene, phenol formaldehyde resin, and epoxy resin. , polyisoprene rubber, or a combination thereof. Furthermore, the material of the easily removable layer 250 can be the same as that of the dissociation layer 220, which can reduce the complexity of the process, but the present disclosure is not limited thereto.

FIG. 3 shows a schematic diagram of a miniature semiconductor structure 300 in accordance with a third embodiment of the present disclosure. As can be seen from FIG. 3 , the micro-semiconductor structure 300 includes a substrate 310 , a dissociation layer 320 , a protective layer 330 , a micro-semiconductor 340 and an easily removable layer 350 . The dissociation layer 320 , the protective layer 330 , the easily removable layer 350 and the micro-semiconductor 340 are located on the same side of the substrate 310 .

In detail, in the third embodiment, the dissociation layer 320 is located and disposed on one side of the substrate 310 . The protective layer 330 is a patterned structure, and includes a first protective layer 331 , which is disposed on the dissociation layer 320 and is located on the same side of the substrate 310 as the dissociation layer 320 . The first protective layer 331 is also a patterned structure, wherein the patterned structure may be a discontinuous film layer structure, but not limited thereto. The easily removable layer 350 is disposed between the first protective layer 331 and the micro-semiconductor 340 . The micro-semiconductor 340 is disposed on the easily removable layer 350 , and the micro-semiconductor 340 and the dissociation layer 320 are located on the same side of the substrate 310 .

In detail, the first protective layer 331 has a total area Apt, wherein the total area Apt is the sum of the areas of the first protective layer 331 projected onto the substrate 310 ; the dissociation layer 320 has an area Ad, which is the projected area of the dissociated layer 320 to the substrate 310 The area of the substrate 310 . A ratio Apt/Ad of the total area Apt of the first protective layer 331 to the area Ad of the dissociation layer 320 is greater than 0.5 and less than 1. The ratio of less than or equal to 0.5 is not enough to protect the micro-semiconductor. In addition, Apt/Ad may be greater than 0.5 and less than or equal to 0.8. In this way, the first protective layer 331 can also effectively protect the micro-semiconductor 340 from being irradiated by the light source L to cause abnormality or damage during the laser dissociation process.

Furthermore, in the third embodiment, the protective layer 330 may further include a second protective layer 332, wherein the second protective layer 332 is a patterned structure. The second protective layer 332 includes a metal material, which can be a metal, a metal alloy or a metal oxide, but the present disclosure is not limited to the foregoing material. The first protective layer 331 may also be interleaved with the second protective layer 332 . In the third embodiment, the first protective layer 331 and the second protective layer 332 are located on the same side of the substrate 310 , and a projected area of the first protective layer 331 on the substrate 310 and a projected area of the second protective layer 332 on the substrate 310 Partially overlapping, but may not overlap, which is not limited to the disclosure of this embodiment. Preferably, any position of the projection of the micro-semiconductor 340 on the substrate 310 overlaps the projection of the first protective layer 331 on the substrate 310 , the projection of the second protective layer 332 on the substrate 310 , or one of the two. Since the light source L is not easy to affect the second protective layer 332 including the metal material, the second protective layer 332 and the first protective layer 331 are alternately arranged to more effectively protect the micro-semiconductor 340 itself from being damaged by the light source L. . Specifically, the second protective layer 332 may be flush with the surface of the micro-semiconductor 340 (not shown) or disposed under the micro-semiconductor 340 , which is not limited by the present disclosure. In addition, the second protective layer 332 can be used as an electrode of the micro-semiconductor 340, and at the same time has the function of protecting and electrically connecting the micro-semiconductor 340, thereby increasing the process yield.

FIG. 4 shows a schematic diagram of a miniature semiconductor structure 400 in a fourth embodiment in accordance with the present disclosure. 4 , the micro-semiconductor structure 400 includes a substrate 410 , a dissociation layer 420 , a protective layer 430 and a micro-semiconductor 440 , and the substrate 410 , the dissociation layer 420 , and the micro-semiconductor 440 are arranged in sequence.

In detail, in the fourth embodiment, the dissociation layer 420 is located and disposed on one side of the substrate 410 . The protective layer 430 is a patterned structure and includes a first protective layer 431 disposed on the other side of the substrate 410 ; that is, the first protective layer 431 and the dissociation layer 420 are located on different sides of the substrate 410 . The micro-semiconductor 440 is disposed on the dissociation layer 420 and is located on the same side of the substrate 410 as the dissociation layer 420 .

In detail, the first protective layer 431 has a total area Apt, wherein the total area Apt is the sum of the areas of the first protective layer 431 projected onto the substrate 410 ; the dissociation layer 420 has an area Ad, which is the projected area of the dissociated layer 420 onto the substrate 410 area. A ratio Apt/Ad of the total area Apt of the first protective layer 431 to the area Ad of the dissociation layer 420 is between 0.5 and 1. In addition, Apt/Ad may be greater than 0.5 and less than or equal to 0.8. Thereby, the first protective layer 431 can also protect the micro-semiconductor 440 from being irradiated by the light source L to cause abnormality or damage during the laser dissociation process.

In the fourth embodiment, the protective layer 430 may further include a second protective layer 432, and the second protective layer 432 is a patterned structure. The second protective layer 432 includes a metal material, which can be a metal, a metal alloy or a metal oxide. The first protective layer 431 and the second protective layer 432 may be interleaved. Specifically, an area of the first protective layer 431 on the substrate 410 partially overlaps with a projected area of the second protective layer 432 on the substrate 410 . It is worth mentioning that the overlapping area of the projected area of the second protective layer 432 on the substrate 410 and the first protective layer 431 is less than 10% of the area of the second protective layer 432 facing the substrate 410 . In this way, it can be ensured that in the laser dissociation step, enough dissociation layer 420 can be dissociated by the irradiation of the light source L, so that the micro-semiconductor 440 can be separated from the substrate 410 smoothly without disposing the protective layer 430 with an excessively large area. In this way, the effect of effectively protecting the micro-semiconductor 440 from the light source L can be achieved, the use of excessive protective layer 430 materials can be reduced, and the manufacturing cost can be reduced. Preferably, any position of the projection of the micro-semiconductor 440 on the substrate 410 overlaps the projection of the first protective layer 431 on the substrate 410 , the projection of the second protective layer 432 on the substrate 410 , or one of the two. The first protective layer 431 and the second protective layer 432 may be respectively disposed on two sides of the substrate 410 . In this way, the micro-semiconductor 440 itself can be more effectively protected from being damaged by the influence of the light source L. FIG. In particular, the second protective layer 432 can be flush with the surface of the micro-semiconductor 440 (not shown) or disposed under the micro-semiconductor 440 . In addition, the second protective layer 432 can be used as an electrode of the micro-semiconductor 440, and at the same time has the function of protecting and electrically connecting the micro-semiconductor 440, thereby increasing the process yield.

FIG. 5 shows a schematic diagram of a miniature semiconductor structure 500 in accordance with a fifth embodiment of the present disclosure. As can be seen from FIG. 5 , the micro-semiconductor structure 500 includes a substrate 510 , a dissociation layer 520 , a protective layer 530 and a micro-semiconductor 540 , wherein the dissociation layer 520 , the protective layer 530 and the micro-semiconductor 540 are sequentially disposed on the substrate 510 .

In detail, the dissociation layer 520 is located and disposed on one side of the substrate 510 . The protective layer 530 is disposed on the dissociation layer 520 and is located on the same side of the substrate 510 as the dissociation layer 520 . The micro-semiconductor 540 is disposed on the protective layer 530 and is located on the same side of the substrate 510 as the dissociation layer 520 . The protective layer 530 is a patterned structure and includes a first protective layer 532 .

In the fifth embodiment, the micro-semiconductor 540 may further include an insulating layer 542, wherein the insulating layer 542 is disposed on the surface of the micro-semiconductor 540 facing the substrate 510 and between the first protective layers 532; Between layer 530 and micro-semiconductor 540 . Since the protective layer may be a discontinuous structure, the micro-semiconductor 540 may still be affected by part of the laser light. By disposing the insulating layer 542 , the micro-semiconductor 540 can be more fully protected from being irradiated by the light source L and causing abnormality or damage. Preferably, any position of the projection of the micro-semiconductor 540 on the substrate 510 overlaps the projection of the insulating layer 542 or the first protective layer 532 on the substrate 510 . Specifically, the transmittance of the insulating layer 542 to a light source with a wavelength of less than 360 nm is less than 20%, which can further prevent the micro-semiconductor 540 from being affected by the light source L in the laser dissociation process. The first protective layer 532 can be flush with the surface of the micro-semiconductor 540 (not shown) or disposed under the micro-semiconductor 540 . In addition, the first protective layer 532 can be used as an electrode of the micro-semiconductor 540, and at the same time has the function of protecting and electrically connecting the micro-semiconductor 540, thereby increasing the process yield.

FIG. 6 shows a schematic diagram of a miniature semiconductor structure 600 in a sixth embodiment in accordance with the present disclosure. As can be seen from FIG. 6 , the micro-semiconductor structure 600 includes a substrate 610 , a dissociation layer 620 , a protective layer 630 and a micro-semiconductor 640 , wherein the dissociation layer 620 , the protective layer 630 and the micro-semiconductor 640 are sequentially disposed on the substrate 610 .

In detail, the dissociation layer 620 is located and disposed on one side of the substrate 610 . The protective layer 630 is disposed on the dissociation layer 620 and is located on the same side of the substrate 610 as the dissociation layer 620 . The micro-semiconductor 640 is disposed on the protective layer 630 and is located on the same side of the substrate 610 as the dissociation layer 620 .

In FIG. 6 , the micro semiconductor 640 has a projected area Ac on the substrate 610 ; the protective layer 630 has a projected area Ap on the substrate 610 ; the dissociation layer 620 has a projected area Ad′ on the substrate 610 . The projected area Ac and the projected area Ap of the protective layer 630 on the substrate 610 are greater than the projected area Ad′ of the dissociation layer 620 on the substrate 610 . In addition, it can satisfy the following conditions: 0.5<Ad'/Ac<0.8, and if the ratio is too small, the yield of the micro-semiconductor structure 600 during transfer will be reduced. In this way, on the premise of not affecting the process and the quality of the micro-semiconductor structure 600 , the usage amount of the dissociation layer 620 can be reduced to reduce the production cost.

FIG. 7 shows a schematic diagram of a miniature semiconductor structure 700 in a seventh embodiment in accordance with the present disclosure. 7 , the micro-semiconductor structure 700 includes a substrate 710 , a dissociation layer 720 , a protective layer 730 and a micro-semiconductor 740 , wherein the dissociation layer 720 , the protective layer 730 and the micro-semiconductor 740 are sequentially disposed on the substrate 710 .

In detail, the protective layer 730 and the dissociation layer 720 are patterned structures, the dissociation layer 720 is correspondingly disposed under the protective layer 730 , and the projected area of the protective layer 730 on the substrate 710 is larger than the projected area of the dissociation layer 720 parallel to the substrate 710 . In the laser dissociation process, the light source L only needs to irradiate the dissociation layer 720 . With the aforementioned features, the irradiation range of the light source L can be controlled within the area of the protective layer 730 projected on the substrate 710 , so as not to affect the dissociation layer 720 On the premise of the dissociation effect, the micro-semiconductor 740 is effectively protected at the same time. Specifically, the protective layer 730 can be flush with the surface of the micro-semiconductor 740 (not shown) or be disposed under the micro-semiconductor 740 . In addition, the protective layer 730 may include a metal material, and may be used as an electrode of the micro-semiconductor 740 ; that is, the electrode of the micro-semiconductor 740 may have the characteristics of the protective layer 730 . Thereby, the complexity of the micro semiconductor structure 700 can be simplified, thereby reducing the production process and cost.

FIG. 8 shows a schematic diagram of a miniature semiconductor structure 800 in an eighth embodiment in accordance with the present disclosure. 8 , the micro-semiconductor structure 800 includes a substrate 810 , a dissociation layer 820 , a protective layer 830 and a micro-semiconductor 840 , wherein the substrate 810 , the dissociation layer 820 , the protective layer 830 and the micro-semiconductor 840 are arranged in sequence. In addition, the protective layer 830 can be flush with the surface of the micro-semiconductor 840 (not shown) or disposed under the micro-semiconductor 840 .

In detail, the cross-sectional area of the dissociation layer 820 perpendicular to the substrate 810 is gradually reduced from the direction of the micro-semiconductor 840 toward the substrate 810 . In other words, the width of the dissociation layer 820 in the direction parallel to the substrate 810 is gradually shortened from the connection between the dissociation layer 820 and the micro semiconductor 840 to the substrate 810 . The irradiation center of the light source L may focus on the connection between the dissociation layer 820 and the substrate 810 . Taking laser light as an example, the laser light has the characteristic of strong irradiation center energy, and can perform laser dissociation on the dissociation layer 820 at the connection between the dissociation layer 820 and the substrate 810 . Therefore, in the dissociation process, only a small amount of the dissociation layer 820 at the connection between the dissociation layer 820 and the substrate 810 can be dissociated, thereby reducing the production time and cost. However, the dissociation layer 820 is only used for explaining the eighth embodiment, and the present invention does not limit the type of the light source L or the specific configuration of the dissociation layer 820 due to the above examples.

FIG. 9 shows a schematic diagram of a miniature semiconductor structure 900 in a ninth embodiment in accordance with the present disclosure. 9 , the micro-semiconductor structure 900 includes a substrate 910 , a dissociation layer 920 , a protective layer 930 and a micro-semiconductor 940 , wherein the dissociation layer 920 , the protective layer 930 and the micro-semiconductor 940 are located on the same side of the substrate 910 .

The protective layer 930 includes a first protective layer 931 and a second protective layer 932 . The first protective layer 931 and the second protective layer 932 are both patterned and located on the same side of the substrate 910 , and the second protective layer 932 and the first protective layer 931 are arranged alternately. That is, the projected area of the first protective layer 931 on the substrate 910 partially overlaps with the projected area of the second protective layer 932 on the substrate 910 . Furthermore, the dissociation layer 920 is correspondingly disposed under the first protective layer 931 , and the dissociation layer 920 is disposed between the substrate 910 and the micro-semiconductor 940 . In this way, through the arrangement of the first protective layer 931 and the second protective layer 932 , the micro-semiconductor 940 can be relatively completely protected from being irradiated by the light source L to cause abnormality or damage. The first protective layer 931 can be flush with the surface of the micro-semiconductor 940 (not shown) or disposed under the micro-semiconductor 940 . Furthermore, the first protective layer 931 may be a plurality of electrodes of the micro-semiconductor 940 .

In addition, the projected area of the first protective layer 931 on the substrate 910 is larger than the projected area of the dissociation layer 920 on the substrate 910 . Therefore, in the laser dissociation process, the first protective layer 931 can effectively protect the micro-semiconductor 940 from being affected by the light source L, and with the arrangement of the second protective layer 932 , it can more completely block the light source L from entering the micro-semiconductor 940 .

FIG. 10 shows a schematic diagram of a miniature semiconductor structure 1000 in accordance with a tenth embodiment of the present disclosure. 10 , the micro-semiconductor structure 1000 includes a substrate 1010 , a dissociation layer 1020 , a protective layer 1030 and a micro-semiconductor 1040 , wherein the dissociation layer 1020 and the micro-semiconductor 1040 are located on the same side of the substrate 1010 .

The protective layer 1030 includes a patterned first protective layer 1031 and a patterned second protective layer 1032 . The first protective layer 1031 is located on the same side of the substrate 1010 as the dissociation layer 1020 and the micro-semiconductor 1040 . The second protective layer 1032 is located on the other side of the substrate 1010 , and the second protective layer 1032 and the first protective layer 1031 are arranged alternately. Thereby, the coverage area of the protective layer 1030 is increased, and the micro-semiconductor 1040 can also be effectively protected from being irradiated by the light source L to cause abnormality or damage. The first protective layer 1031 can be flush with the surface of the micro-semiconductor 1040 (not shown) or disposed under the micro-semiconductor 1040 . Furthermore, the first protective layer 1031 may be a plurality of electrodes of the micro-semiconductor 1040 .

In addition, the projected area of the first protective layer 1031 on the substrate 1010 is larger than the projected area of the dissociation layer 1020 on the substrate 1010 . Therefore, in the laser dissociation process, the first protective layer 1031 can effectively protect the micro-semiconductor 1040 from being affected by the light source L, and with the arrangement of the second protective layer 1032 , it can more completely block the light source L from entering the micro-semiconductor 1040 .

FIG. 11 shows a flowchart of steps of a method S100 for fabricating a micro-semiconductor structure in accordance with the eleventh embodiment of the present disclosure. As can be seen from FIG. 11 , the manufacturing method S100 of the micro semiconductor structure includes a substrate providing step S110 , a dissociation layer setting step S120 , a protective layer setting step S130 and a micro semiconductor setting step S150 . For a clearer and more complete description, the eleventh embodiment will be discussed with the structure, elements and symbols of the micro-semiconductor structure 700 of the seventh embodiment in FIG. 7 , but the micro-semiconductor structure fabricated in the eleventh embodiment is not limit. The substrate providing step S110 provides a substrate 710; the dissociation layer setting step S120 provides a dissociation layer 720 on one side of the substrate 710; the protective layer setting step S130 provides a protective layer 730 on at least one side of the substrate 710; the micro-semiconductor setting step In S150 , a micro semiconductor 740 is disposed on the same side as the dissociation layer 720 on both sides of the substrate 710 , wherein the transmittance of the protective layer 730 to light sources with wavelengths less than 360 nm is less than 20%. Therefore, the micro-semiconductor structure 700 provided by the manufacturing method S100 of the micro-semiconductor structure includes the protective layer 730 , which can protect the micro-semiconductor 740 from being irradiated by the light source L to cause abnormality or damage during the laser dissociation process.

It must be noted that, in the eleventh embodiment, the materials, material characteristics and dimensions of the elements provided in each step can be any of the foregoing embodiments, and can be adjusted according to process requirements, which will not be repeated here.

7 and 11 , the protective layer 730 is disposed corresponding to the dissociation layer 720 , and the projected area of the protective layer 730 on the substrate 710 is larger than the projected area of the dissociative layer 720 on the substrate 710 . When the dissociation layer 720 is dissociated by the light source L, the light source L may be disposed on both sides of the dissociation layer 720 corresponding to the protective layer 730 , wherein the wavelength of the laser light source is 240 nm to 360 nm. In this way, the micro-semiconductor 740 can be effectively protected without affecting the dissociation effect of the dissociation layer 720 .

FIG. 12 shows a flow chart of the steps of a method S200 for fabricating a micro-semiconductor structure according to the twelfth embodiment of the present disclosure. As can be seen from FIG. 12 , the manufacturing method S200 of the micro semiconductor structure includes a substrate providing step S210 , a dissociation layer setting step S220 , a protective layer setting step S230 , an easily removable layer setting step S240 , and a micro semiconductor setting step S250 . For a clearer and more complete description, the twelfth embodiment will cooperate with the structure, elements and symbols of the micro-semiconductor structure 200 of the second embodiment in FIG. 2 , but the micro-semiconductor structure fabricated in the twelfth embodiment is not limit. The substrate providing step S210 provides a substrate 210; the dissociation layer setting step S220 provides a dissociation layer 220 on one side of the substrate 210; the protective layer setting step S230 provides a protective layer 230 on at least one side of the substrate 210; the easily removable layer The disposing step S240 disposes an easily removable layer 250 on the protective layer 230 ; the micro semiconductor disposing step S250 disposes a micro semiconductor 240 on the same side as the dissociation layer 220 in both sides of the substrate 210 , wherein the easily removable layer 250 is located on the micro semiconductor 240 and the protective layer 230 . Thereby, in the subsequent manufacturing process, the protective layer 230 can be removed more conveniently. It is particularly noted that the protective layer 230 can be formed into a patterned structure through the process of photolithography, and can include a plurality of protective layers, such as the first protective layer 331 and the first protective layer 300 of the micro-semiconductor structure 300 of the third embodiment in FIG. 3 . The second protective layer 332 can be adjusted according to process requirements, and will not be described in detail here.

Although the present invention has been disclosed by the above examples, it is not intended to limit the present invention. Any person skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be subject to those defined in the claims.

Claims (17)

1. A micro semiconductor structure, comprising:

a substrate;

a release layer located on one side of the substrate;

a protective layer located on at least one side of the substrate; and

a micro semiconductor on the side of the substrate;

wherein, the penetration rate of the protective layer to a light source with the wavelength less than 360nm is less than 20%.

2. The structure of claim 1, wherein the protective layer has a Young's modulus greater than a Young's modulus of the release layer.

3. The structure of claim 1, wherein the dissociation layer, the protection layer and the micro semiconductor are disposed on the side of the substrate, the dissociation layer is disposed on the substrate, the protection layer is disposed on the dissociation layer, and the micro semiconductor is disposed on the protection layer.

4. The micro-semiconductor structure of claim 3, further comprising:

an easy-to-remove layer disposed between the protection layer and the micro semiconductor.

5. The structure of claim 4, wherein the easy-removal layer and the dissociation layer are both organic and the passivation layer is inorganic.

6. The structure of claim 1, wherein the passivation layer is a patterned structure.

7. The structure of claim 6, wherein a ratio of an area of the passivation layer projected onto the substrate to an area of the dissociation layer projected onto the substrate is between 0.5 and 1.

8. The structure of claim 6, wherein the dissociation layer is disposed under the protection layer, and a projected area of the protection layer on the substrate is greater than or equal to a projected area of the dissociation layer on the substrate.

9. The microelectronic structure of claim 8, wherein said protective layer comprises a metallic material.

10. The structure of claim 1, wherein the passivation layer comprises a first passivation layer and a second passivation layer, and the second passivation layer is disposed in an alternating manner with respect to the first passivation layer.

11. The structure of claim 10, wherein any position of the projection of the micro-semiconductor on the substrate overlaps with the projection of the first passivation layer or the second passivation layer on the substrate.

12. The structure of claim 1, wherein a cross-sectional area of the dissociation layer perpendicular to the substrate tapers toward the substrate.

13. The microelectronic structure of claim 1, wherein said microelectronic further comprises an insulating layer between said microelectronic and said passivation layer.

14. The structure of claim 1, wherein a projected area of the micro semiconductor or the passivation layer on the substrate is larger than a projected area of the dissociation layer on the substrate.

15. A method of fabricating a micro semiconductor structure, comprising:

a substrate providing step of providing a substrate;

a dissociation layer setting step of setting a dissociation layer on one side of the substrate;

a protective layer setting step of setting a protective layer on at least one side of the substrate; and

a micro semiconductor setting step of setting a micro semiconductor on the side of the substrate;

wherein, the penetration rate of the protective layer to a light source with the wavelength less than 360nm is less than 20%.

16. The method of fabricating a microelectronic structure according to claim 15, further comprising:

an easy-to-remove layer setting step of setting an easy-to-remove layer between the micro semiconductor and the protection layer.

17. The method as claimed in claim 15, wherein the light source and the passivation layer are disposed on two sides of the dissociation layer respectively when the dissociation layer is dissociated by the light source.

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