CN111934529A - Frequency oscillator integrating frequency modulation mode switch power supply slow starting function - Google Patents

Abstract

The invention discloses a frequency oscillator integrated with a slow-start function of a switching power supply in a frequency modulation mode. The slow-start circuit includes three groups of current sources IFstart, IFmin and IFb connected in parallel with one end of the input DC voltage VDD, and one end is connected to the other end of the three groups of current sources. , The other end of the oscillating capacitor CF is grounded, the positive input end is connected to the operational amplifier U1 connected to the other end of the three groups of current sources, the resistor R1 and the switch K are connected in series and then connected in parallel with CF, and the positive electrode is connected to the negative input end of the operational amplifier U1, The controlled variable reference voltage Vref whose negative electrode is grounded, wherein the level V2 of the output terminal of U1 controls the on-off of the switch K and the level of the controlled variable reference voltage Vref. Through the above scheme, the present invention achieves the purpose of using only a small number of components to realize the frequency oscillator circuit with the functions of frequency upper and lower limit locking and FM mode switching power supply start-up slow start, avoiding the impact of the start-up energy on the power supply, and having high practical value and promotion value.

Description

Frequency oscillator with integrated FM mode switching power supply slow-start function

technical field

The invention belongs to the technical field of control of switching power supplies, and in particular relates to a frequency oscillator integrating a slow-start function of a switching power supply in a frequency modulation mode.

Background technique

The control technology of switching power supply is generally divided into two categories: PWM (Pulse-Width-Modulation) pulse width modulation and PFM (Pulse-Width-Modulation) pulse frequency modulation. The output voltage is adjusted by changing the ratio; the PFM pulse frequency modulation mode adopts the switching pulse duty ratio unchanged, and the switching frequency changes to complete the adjustment of the output voltage. To make the PFM mode switching power supply work normally, usually only a small part of the frequency variation range of the switching frequency is the normal working range of the power supply, and the power supply will fail or even be damaged beyond this range. Therefore, it is necessary to limit the upper and lower limits of the switching frequency, and then the power supply determines a specific switching frequency value within this range through the output voltage sampling feedback circuit.

Using a traditional analog control power supply, two frequency oscillators are used to generate the minimum frequency and maximum frequency signals, and then the output sampling feedback determines the generated switching frequency signal. The two signals are compared at each switching cycle to prevent the switching frequency from exceeding In the normal operating range, the power supply requires two oscillators to generate the frequency signal and a frequency op amp for comparison, which is a waste of resources.

Taking the most commonly used LLC circuit in PFM mode as an example, when the power supply starts up, if the power supply adopts the closed-loop non-slow start-up mode, due to the large gap between the output voltage initial value and the set target voltage value, the sampling feedback circuit is saturated, and the controller output is the smallest. The impedance of the LLC resonant cavity is very small and the DC gain is very large. The filter capacitor of the latter stage is basically in a short-circuit state in the initial stage of startup, which will cause a large current impact. At this time, a slow start circuit should be used for start-up control to avoid circuit damage caused by excessive start-up energy. The traditional slow-start technology also uses the feedback reference voltage slow-start function, but in the LLC startup process, although the feedback reference voltage rises very slowly, the system will still start at the lowest frequency, which will still cause a greater impact. Therefore, how to solve the deficiencies in the prior art is an urgent problem to be solved by those skilled in the art.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a frequency oscillator with integrated frequency modulation mode switching power supply slow-start function, which mainly solves the complicated implementation of the frequency oscillator and the frequency upper and lower limit locking circuits in the prior art, and the use of closed-loop no slow-start startup or feedback The reference voltage is slow to start the boot, and the boot energy is easy to cause an impact on the power supply.

In order to achieve the above object, the technical scheme adopted in the present invention is as follows:

A frequency oscillator with integrated FM mode switching power supply slow-start function, including three groups of current sources IFstart, IFmin, IFb connected in parallel with one end of VDD, one end of which is connected to the other end of the three groups of current sources, and the other end is connected to the ground, the oscillation capacitor CF, positive input The operational amplifier U1 whose end is connected to the other end of the three sets of current sources, the resistor R1 and the switch K whose one end is connected to the positive input end of the operational amplifier U1 after the series connection, the other end is grounded, and the switch K, and the positive electrode is connected to the negative input end of the operational amplifier U1 and the negative electrode is grounded. The controlled variable reference voltage Vref, wherein the level V2 of the output terminal of U1 controls the on-off of the switch K and the level of the controlled variable reference voltage Vref.

Further, the current sources IFstart and IFmin include two MOS transistors Q1 and Q2 whose sources are in contact with the power supply VDD at the same time, and a transistor Q5 whose collector is connected to the drain of the MOS transistor Q1 and the base is connected to the voltage reference VrefA. The resistor Rmin is connected to the emitter of the transistor Q5 and the other end is grounded, the resistor Rstart and the capacitor Cstart are connected to the emitter of the transistor Q5 and the other end is grounded. The gates of the MOS transistor Q1 and Q2 are connected to each other, and the MOS transistor Q1 The gate of the MOSFET is connected to its drain to form a mirror current source, and the drain of the MOS transistor Q2 is connected to the positive input of the operational amplifier.

Specifically, the current source IFb includes two MOS transistors Q3 and Q4 whose sources are in contact with the power supply VDD at the same time, a transistor Q6 whose collector is connected to the drain of the MOS transistor Q3 and the base is connected to the voltage reference VrefB, and one end is connected to the transistor Q6 The resistor Rmax connected to the emitter, the collector of the output terminal of the transistor is connected to the other end of the resistor Rmax, and the output terminal of the optocoupler U2 with the emitter grounded, one end is connected to the diode input of the optocoupler U2 through the current limiting resistor R2 and is connected to the diode input of the optocoupler U2. The output sampling feedback voltage Fb that provides the voltage, wherein the gates of the MOS transistors Q3 and Q4 are connected to each other, the gate of the MOS transistor Q3 is connected to its drain to form a mirror current source, and the drain of the MOS transistor Q4 is connected to the positive input of the operational amplifier end connection.

Compared with the prior art, the present invention has the following beneficial effects:

(1) The present invention uses a simple circuit to build a frequency oscillator to generate a frequency signal, and integrates the feedback signal frequency generation circuit into the oscillator circuit. The natural frequency locking method limits the operating frequency of the switching power supply to the minimum frequency and the maximum frequency. In between, the comparison process of the frequency operational amplifier is avoided, and the slow-start circuit is used to control the start-up frequency to avoid the impact of the start-up energy on the power supply.

(2) The present invention can complete the frequency oscillator function through an oscillating capacitor CF, and only need a small number of components to limit the upper and lower limits of the oscillating frequency. Control the start-up oscillation frequency to avoid impact on the power supply.

(3) The slow-start circuit of the present invention limits the minimum frequency output when starting up to avoid impact, and gradually reduces the minimum frequency during the slow-start process, and finally completes the slow start-up and enters a closed-loop control state; avoids the power-on energy causing the power supply. At the same time, the discharge time of the oscillation capacitor CF can be adjusted by adjusting the size of the resistor R1 to control the size of the dead time of the complementary pulse drive.

Description of drawings

FIG. 1 is a circuit schematic diagram of the present invention.

FIG. 2 is a schematic circuit diagram of the expanded circuit of FIG. 1 .

FIG. 3 is a schematic diagram of the V2 voltage control driving circuit generated by the frequency oscillator of the present invention.

FIG. 4 is a simulation waveform diagram of the frequency oscillator and the driving circuit of the present invention.

Detailed ways

The present invention will be further described below with reference to the accompanying drawings and examples. The embodiments of the present invention include but are not limited to the following examples.

Example

As shown in FIG. 1 to FIG. 3 , the frequency oscillator integrating the slow-start function of the switching power supply in the frequency modulation mode is characterized in that it includes three groups of current sources IFstart, IFmin, and IFb connected in parallel and then connected to the input DC voltage VDD. The other end of the current source is connected to the oscillating capacitor CF, the other end is grounded, the positive input end is connected to the other end of the three groups of current sources, the operational amplifier U1, the resistor R1 and the switch K, which are connected in series with each other and then connected in parallel with CF, and the positive electrode and the operational amplifier U1 The controlled variable reference voltage Vref with the negative input terminal connected and the negative terminal grounded, wherein the output terminal of the operational amplifier U1 controls the switch K (the switch K can be a relay switch, an optocoupler switch, a MOS tube switch, etc., and the switch form is not limited). The level of the on-off and controlled variable reference voltage Vref is high and low, and one end of the switch K is grounded (the switch K and the resistor R1 are connected in series, and the positions can be reversed).

As shown in Figure 1, the circuit determines the oscillation frequency by charging and discharging the oscillating capacitor CF, that is, the switching frequency of the power supply. The IFmin current source is a constant-value current source, which charges the oscillating capacitor CF at a fixed charging rate. This current source determines The minimum current charging the oscillation capacitor CF also determines the minimum oscillation frequency of the oscillation capacitor CF, that is, the minimum switching frequency of the power supply; the IFb current source is the current source controlled by the feedback signal of the power supply, thereby determining the specific operating frequency of the power supply; IFstart current source It only works when the power supply is turned on, and the minimum switching frequency threshold at startup is increased by changing the charging current from large to small and slowly released to the lowest frequency to achieve the purpose of slow start. The controlled variable reference Vref has two reference values, high and low. In the initial state of the circuit, Vref is at a high reference voltage value. When the oscillation capacitor CF begins to charge and its voltage is greater than the high reference voltage value of Vref, the output V2 of the operational amplifier U1 changes from low to low. The voltage level becomes a high level, so that the controlled variable reference voltage Vref is controlled to switch to a low reference voltage value, and the switch K is controlled to close, and the charge on the oscillation capacitor CF is released through the resistor R1. When the oscillation capacitor CF is discharged to Vref low When the reference voltage value is reached, the output V2 of the operational amplifier U1 changes from a high level to a low level, thereby controlling the controlled variable reference voltage Vref to switch to a high reference voltage value, the relay switch K is turned off, and the oscillating capacitor CF is charged again. Complete the reciprocating process.

As shown in Figure 2, the IFmin current source and the IFstart current source are generated by the same mirror current source, and the IFb current source is generated by another set of mirror current sources. VrefA is used as reference voltage to generate IFmin current and IFstart current, VrefB is used as reference voltage to generate IFb current, for example IFmin=(VrefA-Vbe)/Rmin, Vbe is the constant voltage drop of BE junction of triode. When the power supply is just turned on, since there is no charge on the capacitor Cstart, it is equivalent to the parallel connection of the resistors Rstart and Rmin, so that the charging current is IFmin+IFstart, so that the actual minimum frequency threshold is greater than the minimum frequency set in the steady state. When the capacitor Cstart is slowly charged, IFstart The charging current gradually decreases, and the operating frequency threshold decreases slowly and smoothly until the charging of the capacitor Cstart is completed, the IFstart current is turned off, and the current source current decreases to IFmin, that is, the minimum charging current of the oscillating capacitor CF is IFmin, and the actual minimum operating frequency drops to IFmin Minimum frequency Fmin for steady state setting. This avoids the impact of the power supply caused by the controller directly outputting the PFM pulse signal of the minimum frequency during the boot process. The IFb current source is generated by another group of current sources, and Fb is the output sampling feedback voltage of the power supply, which can be isolated by the optocoupler U2. The feedback voltage signal of the switching power supply controls the conduction degree of the triode output pole of the optocoupler U2 to determine the size of the IFb current source, thereby determining the specific operating frequency of the power supply, and when the triode output pole of U2 is completely turned on, the maximum current of IFb is affected by Rmax. Due to the limitation of the resistance, the IFb current source current is (IFb max=(VrefB-Vbe)/Rmax), so the maximum charging current of the oscillation capacitor CF is IFmin+IFbmax, and the CF voltage oscillation operating frequency at this time is the maximum limit frequency Fmax . When the output negative feedback voltage Fb changes, the IFb current also changes, and the charging frequency of the oscillation capacitor CF changes, so the operating frequency of the power supply also changes, but it will not exceed the upper and lower frequency thresholds, forming a closed-loop system.

As shown in Figure 3, U2 D flip-flop, U3 inverter, U4 AND gate and U5 AND gate form a drive circuit. The V2 voltage generated by the op amp output in the frequency oscillator is the pulse drive dead zone voltage, which is connected to the input end of the drive circuit. V3 and V4 are complementary drive outputs. The magnitude of the V2 voltage pulse width is the size of the dead zone time, which is discharged by R1. resistance control. The conversion is performed at the high-level threshold point and the low-level threshold point of the VCF voltage, and the dead time between the two sets of complementary driving voltages is adjusted by the discharge time of the resistor R1.

As shown in Figure 4, the abscissa represents the time axis, and the ordinate represents the output voltage. In the simulation waveform, VCF is the voltage on the oscillating capacitor CF, which is in a back-and-forth oscillation state. V3 and V4 are complementary driving waveforms, which are alternately output under the control of the VCF voltage, and are converted at the high-level threshold point and the low-level threshold point of the VCF voltage. ; The dead time between the two sets of complementary driving voltages is controlled by the V2 voltage, which can be adjusted by the discharge time of the resistor R1.

The present invention can complete the function of frequency oscillator by one oscillating capacitor CF and a small number of components, and limit the upper and lower limits of the oscillating frequency. Control to avoid shocks to the power supply.

The above-mentioned embodiments are only the preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Any changes made by adopting the design principles of the present invention and non-creative work on this basis shall belong to the protection of the present invention. within the range.

Claims (3)

1. The frequency oscillator is characterized by comprising three groups of current sources IFstart, IFmin and IFb, one ends of the three groups of current sources IFstart, IFmin and IFb are connected with an input direct-current voltage VDD in parallel, an oscillating capacitor CF, one end of the oscillating capacitor CF is connected with the other ends of the three groups of current sources, the positive input end of the operational amplifier U1 is connected with the other ends of the three groups of current sources, a resistor R1 and a switch K which are connected with the CF in parallel after being respectively connected in series, and a controlled variable reference voltage Vref, the positive pole of the controlled variable reference voltage Vref is connected with the negative input end of the operational amplifier U1, and the negative pole of the controlled variable reference voltage Vref is grounded, wherein the level V2 of the.

2. The frequency oscillator of claim 1, wherein the current sources IFstart, IFmin comprise two MOS transistors Q1, Q2 having sources connected to the input dc power VDD, a transistor Q5 having a collector connected to the drain of the MOS transistor Q1 and a base connected to the voltage reference VrefA, a resistor Rmin having one end connected to the emitter of the transistor Q5 and the other end connected to ground, and a resistor Rstart and a capacitor Cstart having one end connected to the emitter of the transistor Q5 and the other end connected to ground after being connected in series, wherein the gates of the MOS transistors Q1 and Q2 are connected to each other, the gate of the transistor Q1 is connected to the drain thereof to form a mirror current source, and the drain of the transistor Q2 is connected to the positive input terminal of the operational amplifier.

3. The frequency oscillator of claim 2, wherein the current source IFb comprises two MOS transistors Q3 and Q4 having their sources in contact with the power supply VDD, a transistor Q6 having its collector connected to the drain of the MOS transistor Q3 and its base connected to the voltage reference VrefB, a resistor Rmax having one end connected to the emitter of the transistor Q6, a transistor output of a photocoupler U2 having its collector connected to the other end of the resistor Rmax and its emitter grounded, and an output sampled feedback voltage Fb having one end connected to the diode input of the photocoupler U2 through a current limiting resistor R2 and providing a voltage to the diode input, wherein the gates of the MOS transistors Q3 and Q4 are connected to each other, the gate of the MOS transistor Q3 is connected to its drain to form a mirror current source, and the drain of the MOS transistor Q4 is connected to the positive input of the operational amplifier.

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