CN111916526A - Negative feedback type single photon avalanche photodiode and manufacturing method thereof - Google Patents
Negative feedback type single photon avalanche photodiode and manufacturing method thereof Download PDFInfo
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Abstract
本发明涉及半导体光电子技术领域,具体涉及一种负反馈型单光子雪崩光电二极管及其制作方法,包括:衬底、缓冲层、吸收层、渐变层、电荷层和帽层,衬底下方设置有入射光窗和N电极,N电极对称分布在入射光窗周围;衬底上方依次设置缓冲层、吸收层、渐变层、电荷层和帽层;帽层上设置有阶梯结构P型掺杂区,P型掺杂区上生长有P电极;帽层上表面设置有介质膜,介质膜的中部设置有半封闭回旋环状结构的负反馈电阻,介质膜上设置有焊盘,负反馈电阻一端与P电极相连,另一端与焊盘相连。本发明能够实现单光子雪崩光电二极管SPAD盖革雪崩的快速淬灭、快速恢复,提升SPAD的光子探测速率、降低后脉冲效应,且具备到达时间不预测光子探测功能。
The present invention relates to the technical field of semiconductor optoelectronics, in particular to a negative feedback type single-photon avalanche photodiode and a manufacturing method thereof, comprising: a substrate, a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer; The incident light window and the N electrode, the N electrode is symmetrically distributed around the incident light window; a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer are arranged in sequence above the substrate; a stepped structure P-type doped region is arranged on the cap layer, A P electrode is grown on the P-type doped region; a dielectric film is provided on the upper surface of the cap layer, a negative feedback resistor with a semi-closed convoluted ring structure is provided in the middle of the dielectric film, a pad is provided on the dielectric film, and one end of the negative feedback resistor is connected to The P electrode is connected, and the other end is connected to the pad. The invention can realize the rapid quenching and rapid recovery of the Geiger avalanche of the single-photon avalanche photodiode SPAD, improve the photon detection rate of the SPAD, reduce the post-pulse effect, and have the function of photon detection without predicting the arrival time.
Description
技术领域technical field
本发明涉及半导体光电子技术领域,具体涉及一种负反馈型单光子雪崩光电二极管及其制作方法。The invention relates to the technical field of semiconductor optoelectronics, in particular to a negative feedback single-photon avalanche photodiode and a manufacturing method thereof.
背景技术Background technique
随着量子保密通信、单光子检测、激光测距等技术的不断发展,单光子探测器得到了快速的发展和广泛的应用。单光子雪崩光电二极管(Single Photon Avalanche Diode,SPAD)用于光子信号的检测,是单光子探测器的核心芯片之一。With the continuous development of quantum secure communication, single-photon detection, laser ranging and other technologies, single-photon detectors have been rapidly developed and widely used. Single-photon avalanche photodiode (Single Photon Avalanche Diode, SPAD) is used for the detection of photon signals and is one of the core chips of single-photon detectors.
为了实现单光子探测,基于分离吸收、电荷、倍增(SeparateAbsorptionChargeMultiplication,SACM)结构的SPAD须工作在盖革模式,即SPAD两端的电压在其雪崩电压之上。在盖革模式下,SPAD探测的光子信号,输出宏观可检测的电信号,但持续工作在盖革模式,SPAD不仅会被击穿造成损坏,而且不能探测后续入射的光子信号。为实现探测器的连续工作,降低SPAD两端外加雪崩电压,淬灭SPAD的盖革雪崩倍增为有效方法之一。目前单光子探测器主要有三种淬灭模式:门控淬灭模式、主动淬灭模式、被动淬灭模式。In order to achieve single-photon detection, the SPAD based on the Separate Absorption Charge Multiplication (SACM) structure must work in the Geiger mode, that is, the voltage across the SPAD is above its avalanche voltage. In Geiger mode, the photon signal detected by the SPAD outputs a macroscopically detectable electrical signal, but if it continues to work in the Geiger mode, the SPAD will not only be damaged by breakdown, but also cannot detect subsequent incident photon signals. In order to realize the continuous operation of the detector, reducing the applied avalanche voltage across the SPAD and quenching the Geiger avalanche multiplication of the SPAD is one of the effective methods. At present, single-photon detectors mainly have three quenching modes: gated quenching mode, active quenching mode, and passive quenching mode.
在门控淬灭模式中,SPAD两端施加一个电压脉冲,在门脉冲宽度内,对光子进行探测。当光子到达时间可预知时,能够实现GHz的高探测速率。In gated quench mode, a voltage pulse is applied across the SPAD, and photons are detected within the gate pulse width. High detection rates in GHz can be achieved when the photon arrival times are predictable.
在主动淬灭模式中,主动淬灭电路通过探测雪崩信号的上升沿后,拉低SPAD的偏置电压,淬灭盖革雪崩。主动淬灭适合光子达到时间不可预测的单光子探测,但是受限主动淬灭电路反应时间限制,盖革雪崩持续时间维持在ns量级,不仅增加SPAD的后脉冲概率,还不能实现GHz的高速探测。In the active quenching mode, the active quenching circuit pulls down the bias voltage of the SPAD after detecting the rising edge of the avalanche signal to quench the Geiger avalanche. Active quenching is suitable for single-photon detection with unpredictable photon arrival time, but limited by the reaction time of active quenching circuit, the Geiger avalanche duration is maintained at the ns level, which not only increases the post-pulse probability of SPAD, but also cannot achieve GHz high speed probe.
在被动淬灭模式中,SPAD上串联一个较大的电阻,当SPAD发生雪崩效应时,雪崩电流导致负反馈电阻两段的电压增大,从而使得SPAD两端的偏置电压下降至击穿电压以下,淬灭盖革雪崩。被动淬灭适合光子达到时间不可预测的单光子探测,但是受寄生参数的影响,淬灭时间和盖革雪崩恢复时间均较长,被动淬灭电路一般应用在探测频率较低,探测精度要求不高的情况下。In passive quenching mode, a large resistor is connected in series with the SPAD. When the avalanche effect occurs in the SPAD, the avalanche current causes the voltage of the two sections of the negative feedback resistor to increase, so that the bias voltage across the SPAD drops below the breakdown voltage. , quenching the Geiger avalanche. Passive quenching is suitable for single-photon detection with unpredictable photon arrival time. However, due to the influence of parasitic parameters, the quenching time and Geiger avalanche recovery time are both long. Passive quenching circuits are generally used in low detection frequencies and low detection accuracy requirements. under high conditions.
发明内容SUMMARY OF THE INVENTION
为解决被动淬灭模式下受寄生参数影响的淬灭时间、恢复时间较长的问题,本发明提供一种负反馈型单光子雪崩光电二极管及其制作方法。In order to solve the problem of long quenching time and recovery time affected by parasitic parameters in passive quenching mode, the present invention provides a negative feedback single-photon avalanche photodiode and a manufacturing method thereof.
一种负反馈型单光子雪崩光电二极管,包括:衬底、缓冲层、吸收层、渐变层、电荷层和帽层,衬底下方设置有入射光窗和N电极,且N电极对称分布在入射光窗周围;衬底上方依次设置缓冲层、吸收层、渐变层、电荷层和帽层;帽层上部中间位置设置有阶梯结构的P型掺杂区,所述P型掺杂区上表面的中间区域生长有P电极;帽层上表面设置有一层介质膜,且所述介质膜覆盖所述P电极;介质膜的中部设置有半封闭回旋环状结构的负反馈电阻,介质膜上设置有焊盘,负反馈电阻一端与P电极相连,另一端与焊盘相连。A negative feedback single-photon avalanche photodiode, comprising: a substrate, a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer, an incident light window and an N electrode are arranged under the substrate, and the N electrodes are symmetrically distributed on the incident light Around the light window; a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer are arranged in sequence above the substrate; a P-type doped region with a stepped structure is arranged in the middle of the upper part of the cap layer, and the upper surface of the P-type doped region is A P electrode is grown in the middle area; a layer of dielectric film is provided on the upper surface of the cap layer, and the dielectric film covers the P electrode; Pad, one end of the negative feedback resistor is connected to the P electrode, and the other end is connected to the pad.
进一步的,负反馈电阻采用半封闭回旋环状结构,以提高电阻值、降低寄生参数,负反馈电阻外侧端与焊盘相连,以便信号引出。Further, the negative feedback resistor adopts a semi-closed convoluted ring structure to increase the resistance value and reduce parasitic parameters, and the outer end of the negative feedback resistor is connected to the pad for signal extraction.
进一步的,所述负反馈电阻采用高电阻率材料,包括CrSi、NiCr或a-Si中的任意一种或多种的组合。Further, the negative feedback resistor adopts a high resistivity material, including any one or a combination of CrSi, NiCr or a-Si.
进一步的,半封闭回旋环状结构负反馈电阻分布在P电极周围,且负反馈电阻的半封闭回旋环内侧端与P电极连接。Further, the negative feedback resistors of the semi-closed convoluted ring structure are distributed around the P electrode, and the inner end of the semi-closed convoluted ring of the negative feedback resistor is connected to the P electrode.
进一步的,所述渐变层选用铟镓砷磷In(1-x)GaxAsyP(1-y)渐变层(简称InGaAsP),以实现禁带宽度从InGaAs吸收层到InP电荷层渐变,每一层的厚度为0.01~0.05um。Further, indium gallium arsenide phosphorous In (1-x) Ga x As y P (1-y) gradient layer (referred to as InGaAsP) is selected for the gradient layer, so as to realize the gradient of the forbidden band width from the InGaAs absorption layer to the InP charge layer, The thickness of each layer is 0.01-0.05um.
进一步的,所述衬底采用高掺杂的InP材料,掺杂浓度不小于2×1018cm-3;所述缓冲层采用掺杂的InP材料,掺杂浓度小于或等于2×1018cm-3,缓冲层的厚度为0.2~1um;所述吸收层采用非掺杂的InGaAs材料,吸收层的厚度为0.4~3um;所述电荷层采用掺杂的InP材料,掺杂浓度为1×1016~5×1017cm-3,电荷层的厚度为0.08~0.4um;所述帽层采用非掺杂的InP材料,厚度为2~4um。Further, the substrate is made of highly doped InP material, and the doping concentration is not less than 2×10 18 cm −3 ; the buffer layer is made of doped InP material, and the doping concentration is less than or equal to 2×10 18 cm -3 , the thickness of the buffer layer is 0.2-1um; the absorption layer is made of undoped InGaAs material, and the thickness of the absorption layer is 0.4-3um; the charge layer is made of doped InP material, and the doping concentration is 1× 10 16 to 5×10 17 cm -3 , the thickness of the charge layer is 0.08 to 0.4um; the cap layer is made of non-doped InP material, and the thickness is 2 to 4um.
进一步的,所述焊盘采用钛铂金TiPtAu或铬金CrAu金属材料中的任意一种或多种的组合。Further, the bonding pad adopts any one or a combination of titanium platinum gold TiPtAu or chromium gold CrAu metal materials.
进一步的,所述P电极采用钛铂金TiPtAu或铬金CrAu金属材料中的任意一种或多种的组合。Further, the P electrode adopts any one or a combination of titanium platinum gold TiPtAu or chromium gold CrAu metal materials.
一种负反馈型单光子雪崩光电二极管制作方法,包括以下步骤:A method for fabricating a negative feedback single-photon avalanche photodiode, comprising the following steps:
S1、利用外延设备生长倍增外延结构SACM,包括:在InP衬底上依次生长InP缓冲层、InGaAs吸收层、InGaAsP渐变层、InP电荷层和InP帽层;S1, using epitaxial equipment to grow a multiplication epitaxial structure SACM, including: sequentially growing an InP buffer layer, an InGaAs absorber layer, an InGaAsP graded layer, an InP charge layer and an InP cap layer on an InP substrate;
S2、在倍增外延结构的InP帽层上表面沉积扩散掩膜层,即生长一层介质膜;S2, depositing a diffusion mask layer on the upper surface of the InP cap layer of the multiplication epitaxial structure, that is, growing a dielectric film;
S3、采用光刻工艺在掩膜层上制作设计的图形并腐蚀图形内的介质膜,裸露InP帽层,形成扩散窗口;S3, using the photolithography process to make the designed pattern on the mask layer and etching the dielectric film in the pattern, exposing the InP cap layer to form a diffusion window;
S4、采用扩散工艺,在扩散窗口内将P型杂质源扩散至帽层的InP材料中,形成P型掺杂区;S4, using a diffusion process to diffuse the P-type impurity source into the InP material of the cap layer in the diffusion window to form a P-type doping region;
S5、重复S2-S4此步骤,通过光刻工艺逐次减小扩散窗口,通过扩散工艺逐次增加扩散深度,形成阶梯型的P型掺杂区;S5, repeating the steps S2-S4, successively reducing the diffusion window through the photolithography process, and successively increasing the diffusion depth through the diffusion process to form a stepped P-type doped region;
S6、采用剥离工艺在P型掺杂区的介质膜上制作负反馈电阻的剥离光刻胶膜,采用高分辨率的图形反转正/负改变型光刻胶,在P型掺杂区的介质膜上制作剥离光刻胶膜,其主要步骤包括:基片烘焙,涂胶,前烘,曝光,反转烘烤,泛曝光,显影,后烘;光刻胶膜层的厚度为0.5-1.0μm;S6. A stripping photoresist film of negative feedback resistance is made on the dielectric film of the P-type doped region by a stripping process, and a high-resolution pattern inversion positive/negative change photoresist is used. The main steps of making a peeling photoresist film on the dielectric film include: substrate baking, gluing, pre-baking, exposure, reverse baking, flood exposure, development, and post-baking; the thickness of the photoresist film layer is 0.5- 1.0μm;
S7、采用磁控溅射蒸发工艺蒸发高电阻率的金属电阻薄膜,形成负反馈电阻,通过控制磁控溅射的速率、时间控制负反馈电阻的电阻值为1KΩ/□,“□”表示方块电阻的单位区域;S7. Use the magnetron sputtering evaporation process to evaporate the high resistivity metal resistance film to form a negative feedback resistor. The resistance value of the negative feedback resistor is controlled by controlling the rate and time of the magnetron sputtering. unit area of resistance;
S8、重复剥离工艺和蒸发工艺,制作与负反馈电阻两端相连的焊盘和P电极,负反馈电阻的一端通过P电极与P型掺杂区相连,另一端与焊盘相连;S8, repeating the peeling process and the evaporation process to make a pad and a P electrode connected to both ends of the negative feedback resistor, one end of the negative feedback resistor is connected to the P-type doped region through the P electrode, and the other end is connected to the pad;
S9、采用介质膜工艺在负反馈电阻、焊盘以及P电极上继续沉积介质膜;S9. Continue to deposit a dielectric film on the negative feedback resistor, the pad and the P electrode by using the dielectric film process;
S10、采用光刻工艺刻蚀P电极及焊盘上的介质膜;S10, using a photolithography process to etch the P electrode and the dielectric film on the pad;
S11、根据背面进光需求减薄抛光外延片衬底,并采用介质膜工艺在衬底上沉积一层增透膜,采用光刻工艺刻蚀衬底上与掺杂区同轴心以外区域的增透膜形成入射光窗;S11. Thinning and polishing the epitaxial wafer substrate according to the light input requirements from the back side, depositing an anti-reflection film on the substrate using a dielectric film process, and using a photolithography process to etch the area on the substrate that is not concentric with the doped region The anti-reflection coating forms the incident light window;
S12、采用蒸发工艺制作与衬底相连的金属N电极。S12, an evaporation process is used to fabricate a metal N electrode connected to the substrate.
本发明的有益效果:Beneficial effects of the present invention:
本发明采用半封闭回旋环状结构的负反馈电阻与单光子雪崩光电二极管单片集设计,通过单片集成的方式降低寄生参数的影响;由于集成负反馈电阻的分压作用,不仅有利于降低盖革雪崩时间,减少深能级缺陷对载流子的俘获作用,降低器件的后脉冲概率,提升器件的参数性能;而且还有利于实现SPAD芯片的自由运行,实现到达时间不预测光子的探测功能;此外,本发明的集成负反馈结构设计利用集成设计减小寄生参数,可以提升SPAD的淬灭及恢复时间,实现快速淬灭、快速恢复,提升SPAD高速探测的应用需求;在阵列化芯片中,可实现各像元的独立工作需要,满足激光焦平面的多回波探测器技术需求。The invention adopts the negative feedback resistance of the semi-closed gyroscopic ring structure and the monolithic design of the single-photon avalanche photodiode, and reduces the influence of parasitic parameters by means of monolithic integration; Geiger avalanche time can reduce the trapping effect of deep-level defects on carriers, reduce the probability of post-pulse of the device, and improve the parameter performance of the device; it is also conducive to the free running of the SPAD chip and the detection of photons that do not predict the arrival time. In addition, the integrated negative feedback structure design of the present invention uses integrated design to reduce parasitic parameters, which can improve the quenching and recovery time of SPAD, realize rapid quenching and rapid recovery, and improve the application requirements of high-speed detection of SPAD; It can realize the independent work needs of each pixel and meet the technical requirements of multi-echo detectors of the laser focal plane.
附图说明Description of drawings
下面结合附图和具体实施方式对本发明做进一步详细的说明。The present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.
图1为本发明实施例的NFAD剖面结构示意图;1 is a schematic diagram of a cross-sectional structure of an NFAD according to an embodiment of the present invention;
图2为本发明实施例的NFAD俯视图;2 is a top view of an NFAD according to an embodiment of the present invention;
图3为本发明实施例的外延结构图;3 is an epitaxial structure diagram of an embodiment of the present invention;
图4为本发明实施例的NFAD等效电路;Fig. 4 is the NFAD equivalent circuit of the embodiment of the present invention;
图5为本发明实施例的集成电阻结构示意图;5 is a schematic diagram of an integrated resistor structure according to an embodiment of the present invention;
图6为本发明实施例的扩散电阻集成结构示意图;FIG. 6 is a schematic diagram of a diffused resistor integrated structure according to an embodiment of the present invention;
图7为本发明实施例的一种负反馈型单光子雪崩光电二极管制作方法的工艺流程图。7 is a process flow diagram of a method for fabricating a negative feedback single-photon avalanche photodiode according to an embodiment of the present invention.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
图1-2为本发明的NFAD结构示意图,一种负反馈型单光子雪崩光电二极管,包括:衬底、缓冲层、吸收层、渐变层、电荷层和帽层,所述衬底下方设置有入射光窗和N电极,且N电极对称设置在入射光窗周围;所述衬底上方依次设置缓冲层、吸收层、电荷层和帽层;所述帽层上部中间位置设置有P型掺杂区,所述P型掺杂区上表面的中间位置设置有P电极;所述帽层上表面设置有一层介质膜,且所述介质膜覆盖所述P电极;P电极上方的介质膜的中部设置有半封闭回旋环状结构的负反馈电阻,介质膜用于减小负反馈电阻受外界因素的损伤,保护负反馈电阻的参数稳定,所述介质膜上表面设置有焊盘,所述负反馈电阻一端与P电极相连接,另一端与焊盘相连接。1-2 are schematic diagrams of the structure of the NFAD of the present invention, a negative feedback type single-photon avalanche photodiode, including: a substrate, a buffer layer, an absorption layer, a gradient layer, a charge layer and a cap layer, and the substrate is provided with an incident light window and an N electrode, and the N electrode is symmetrically arranged around the incident light window; a buffer layer, an absorption layer, a charge layer and a cap layer are sequentially arranged above the substrate; a P-type doping layer is arranged in the middle of the upper part of the cap layer The upper surface of the P-type doped region is provided with a P electrode in the middle position; a dielectric film is provided on the upper surface of the cap layer, and the dielectric film covers the P electrode; the middle part of the dielectric film above the P electrode A negative feedback resistor with a semi-closed convoluted ring structure is provided. The dielectric film is used to reduce the damage of the negative feedback resistor by external factors and to protect the parameters of the negative feedback resistor from being stable. The upper surface of the dielectric film is provided with a pad, and the negative feedback resistor is One end of the feedback resistor is connected to the P electrode, and the other end is connected to the pad.
在一个实施例中,所述衬底采用掺杂的磷化铟InP材料,掺杂浓度不小于2×1018cm-3,衬底的厚度为0.2~1um。In one embodiment, the substrate is made of doped indium phosphide InP material, the doping concentration is not less than 2×10 18 cm −3 , and the thickness of the substrate is 0.2˜1 μm.
进一步的,在一个实施例中,所述衬底为n型衬底,所述缓冲层为n型掺杂,掺杂浓度不大于2×1018cm-3,生长厚度为0.2~1um。Further, in one embodiment, the substrate is an n-type substrate, the buffer layer is n-type doped, the doping concentration is not greater than 2×10 18 cm −3 , and the growth thickness is 0.2˜1 μm.
在一个实施例中,所述吸收层采用非掺杂的铟镓砷InGaAs材料,吸收层的生长厚度为0.4~3um。In one embodiment, the absorption layer is made of undoped InGaAs InGaAs material, and the growth thickness of the absorption layer is 0.4-3um.
在一个实施例中,所述渐变层采用非掺杂的选用铟镓砷磷In(1-x)GaxAsyP(1-y)渐变层,以实现禁带宽度从吸收层到电荷层渐变,每一层的单层厚度为0.01~0.05um。In one embodiment, the graded layer adopts a non-doped graded layer of Indium Gallium Arsenide Phosphorus In (1-x) Ga x As y P (1-y) , so as to realize the forbidden band width from the absorption layer to the charge layer Gradient, the thickness of each layer is 0.01-0.05um.
在一个实施例中,所述电荷层又成为电场控制层,电荷层采用掺杂的磷化铟lnP材料,掺杂浓度为1×1016~5×1017cm-3,电荷层的生长厚度为0.08~0.4um。In one embodiment, the charge layer becomes the electric field control layer again, the charge layer is made of doped indium phosphide lnP material, the doping concentration is 1×10 16 to 5×10 17 cm -3 , and the growth thickness of the charge layer is It is 0.08~0.4um.
在一个实施例中,所述帽层采用非掺杂的磷化铟InP材料,帽层的生长厚度为2~4um。In one embodiment, the cap layer is made of non-doped indium phosphide InP material, and the growth thickness of the cap layer is 2-4um.
本发明基于吸收、电荷、倍增分离型(SACM)外延结构的SPAD芯片,在焊盘与P型掺杂区间设置负反馈电阻,以实现盖革雪崩过程的淬灭和负反馈功能,该结构的寄生参数小,具有快速淬灭、快速恢复的功能。The invention is based on the SPAD chip of the absorption, charge, multiplication and separation type (SACM) epitaxial structure, and a negative feedback resistance is set between the pad and the P-type doping area to realize the quenching and negative feedback functions of the Geiger avalanche process. The parasitic parameters are small, and it has the functions of fast quenching and fast recovery.
进一步的,所述负反馈电阻为集成负反馈电阻,选用高电阻率材料。为了满足SPAD芯片有源区的几十微米量级的尺寸、兆欧姆量级电阻、mA量级电流通过的可靠性需要,负反馈电阻需要选用高电阻率材料。高电阻率材料在相同薄膜厚度和宽度的条件下,能够减小电阻的长度、电阻环状面积,减小SPAD的寄生电容。CrSi、NiCr、a-Si等材料的电阻率在10-6Ω·m量级,工艺制作薄膜电阻的方块电阻值不小于1KΩ/□量级,且能满足小尺寸、高可靠性的设计要求,因此,负反馈电阻可供选择的材料包括:CrSi、NiCr、a-Si中的一种或多种的组合。本发明采用集成负反馈结构设计,利用集成负反馈电阻的分压作用,不仅有利于降低盖革雪崩时间,减少深能级缺陷对载流子的俘获作用,降低器件的后脉冲概率,提升器件的参数性能;而且还有利于实现SPAD芯片的自由运行,实现到达时间不预测光子的探测功能;此外,本发明的集成负反馈结构设计利用集成设计减小寄生参数,可以提升SPAD的淬灭及恢复时间,实现高速探测的应用需求;在阵列化芯片中,可实现各像元的独立工作需要,满足激光焦平面的多回波探测器技术需求。Further, the negative feedback resistor is an integrated negative feedback resistor, and a high resistivity material is selected. In order to meet the reliability requirements of the active area of the SPAD chip with a size of tens of microns, a resistance of the order of megaohms, and a current of the order of mA, the negative feedback resistor needs to use high resistivity materials. Under the condition of the same film thickness and width, the high resistivity material can reduce the length of the resistor, the area of the resistor ring, and reduce the parasitic capacitance of the SPAD. The resistivity of CrSi, NiCr, a-Si and other materials is in the order of 10 -6 Ω·m, and the sheet resistance value of the thin film resistor produced by the process is not less than the order of 1KΩ/□, and can meet the design requirements of small size and high reliability , therefore, the optional materials for the negative feedback resistor include: one or more combinations of CrSi, NiCr, and a-Si. The invention adopts the design of integrated negative feedback structure and utilizes the voltage dividing effect of the integrated negative feedback resistor, which is not only beneficial to reduce the Geiger avalanche time, reduce the trapping effect of deep energy level defects on carriers, reduce the post-pulse probability of the device, and improve the device Moreover, it is also beneficial to realize the free operation of the SPAD chip and realize the detection function of photons that do not predict the arrival time; in addition, the integrated negative feedback structure design of the present invention uses the integrated design to reduce parasitic parameters, which can improve the quenching and quenching of the SPAD. The recovery time can meet the application requirements of high-speed detection; in the array chip, the independent work requirements of each pixel can be realized, and the technical requirements of multi-echo detectors of the laser focal plane can be met.
进一步的,P电极与P型掺杂区间的负反馈电阻为半封闭回旋环状结构,负反馈电阻的形状需同时满足电阻值、电容、电感的应用需要,与SPAD匹配的集成负反馈电阻的设计阻值在兆欧姆量级,而电阻材料的电阻率在10-6Ω·m量级,因此,在选用可靠性满足要求的薄膜厚度条件下,需要通过环状图形延长电阻长度。如图5所示,考虑到高速工作对低电感的要求,本发明设置半封闭回旋环状结构的负反馈电阻,不仅可以抵消相邻电阻环上相反的电流方向所产生的寄生电感,还可以提高电阻值、降低寄生参数。Further, the negative feedback resistor between the P electrode and the P-type doping interval is a semi-closed convoluted ring structure, and the shape of the negative feedback resistor should meet the application requirements of resistance value, capacitance and inductance at the same time. The designed resistance is in the order of megaohms, and the resistivity of the resistance material is in the order of 10 -6 Ω·m. Therefore, under the condition of selecting a film thickness that meets the requirements of reliability, it is necessary to extend the resistance length through a ring pattern. As shown in Fig. 5, considering the requirement of low inductance for high-speed operation, the present invention provides a negative feedback resistor with a semi-closed gyroscopic ring structure, which can not only offset the parasitic inductance generated by the opposite current directions on the adjacent resistance rings, but also can Increase the resistance value and reduce parasitic parameters.
进一步的,所述负反馈电阻上沉积有一层介质膜,该介质膜可以减小负反馈电阻受外界因素的干扰损伤,保护负反馈电阻的参数稳定,提升SPAD的性能稳定及可靠性。Further, a layer of dielectric film is deposited on the negative feedback resistor, which can reduce the interference and damage of the negative feedback resistor by external factors, protect the stability of the parameters of the negative feedback resistor, and improve the performance stability and reliability of the SPAD.
进一步的,所述负反馈电阻的半封闭回旋环内侧端通过P电极与P型掺杂区连接,所述负反馈电阻的的半封闭回旋环外侧端与焊盘连接,以便信号引出,如图6所示。Further, the inner end of the semi-closed gyroscopic ring of the negative feedback resistor is connected to the P-type doped region through the P electrode, and the outer end of the semi-closed gyroscopic ring of the negative feedback resistor is connected to the pad for signal extraction, as shown in the figure. 6 shown.
进一步的,在一个实施例中,所述P电极为金属材质,生长在P型掺杂区,用于与P型掺杂区连接。Further, in one embodiment, the P electrode is made of metal, grown on the P-type doped region, and used for connecting with the P-type doped region.
进一步的,在一个实施例中,所述P电极设置于负反馈电阻的半封闭回旋环状结构的内侧,即半封闭回旋环状结构负反馈电阻分布在P电极周围,且负反馈电阻的半封闭回旋环内侧端与P电极连接。Further, in one embodiment, the P electrode is arranged inside the semi-closed gyroscopic ring structure of the negative feedback resistor, that is, the negative feedback resistance of the semi-closed gyroscopic annular structure is distributed around the P electrode, and the half of the negative feedback resistor is half closed. The inner end of the closed convoluted ring is connected to the P electrode.
在一个可选的实施例中,通过扩散低掺杂浓度的方式在SACM结构SPAD芯片帽层制作10-6Ω·m量级电阻率的扩散电阻,可以作为负反馈电阻材料替代方案,此种方法也能实现小尺寸、高可靠快的设计需求。In an optional embodiment, a diffusion resistor with a resistivity of the order of 10 -6 Ω·m is fabricated on the cap layer of the SACM structure SPAD chip by diffusing a low doping concentration, which can be used as an alternative to the negative feedback resistor material. The method can also meet the design requirements of small size, high reliability and speed.
图4所示为本发明实施例的NFAD等效电路。外加工作偏压,器件未产生盖革雪崩时,流过等效电路中集成负反馈电阻中的电流很小(nA量级),因此外加工作偏压主要加在盖革雪崩光电二极管(SPAD)上,在SPAD内形成盖革雪崩电场。当光生载流子或暗载流子触发盖革雪崩电场,放大电流信号,增加流过负反馈电阻中的电流(μA量级),因而在负反馈电阻上产生较大的电压压降,降低SPAD两端的偏压,淬灭盖革雪崩,即NFAD器件的自淬灭过程。盖革雪崩淬灭后,雪崩电流将降低到nA量级,外加偏压在SPAD内建立盖革雪崩电场,实现器件自恢复。FIG. 4 shows an equivalent circuit of an NFAD according to an embodiment of the present invention. When a working bias is applied, when the device does not generate a Geiger avalanche, the current flowing through the integrated negative feedback resistor in the equivalent circuit is very small (nA level), so the external working bias is mainly applied to the Geiger avalanche photodiode (SPAD). , a Geiger avalanche electric field is formed within the SPAD. When the photo-generated carriers or dark carriers trigger the Geiger avalanche electric field, amplify the current signal and increase the current (in the order of μA) flowing through the negative feedback resistor, thus generating a large voltage drop across the negative feedback resistor, reducing the The bias voltage across the SPAD quenches the Geiger avalanche, which is the self-quenching process of the NFAD device. After the Geiger avalanche is quenched, the avalanche current will be reduced to the level of nA, and the applied bias voltage will establish a Geiger avalanche electric field in the SPAD to realize the self-recovery of the device.
本发明的负反馈型单光子雪崩光电二极管通过单片集成负反馈电阻降低寄生参数的影响,能够实现单光子雪崩光电二极管(SPAD)盖革雪崩的快速淬灭、快速恢复,提升SPAD的光子探测速率、降低后脉冲效应,且具备到达时间不预测光子探测功能。The negative feedback type single-photon avalanche photodiode of the present invention reduces the influence of parasitic parameters by monolithically integrating the negative feedback resistance, can realize the rapid quenching and rapid recovery of the Geiger avalanche of the single-photon avalanche photodiode (SPAD), and improves the photon detection of the SPAD speed, reduce post-pulse effects, and have the function of photon detection that does not predict the arrival time.
一种负反馈型单光子雪崩光电二极管制作方法,包括但不限于以下步骤:A method for fabricating a negative feedback single-photon avalanche photodiode, including but not limited to the following steps:
S1、利用外延设备生长SACM结构外延片,包括:在InP衬底上依次生长InP缓冲层、InGaAs吸收层、渐变层、InP电荷层和InP帽层,其中,InP缓冲层的生长厚度为0.2~1um,InP缓冲层的掺杂浓度小于或等于2×1018cm-3;非掺杂的InGaAs作为吸收层,其生长厚度为0.4~3um;渐变层采用非掺杂的铟镓砷磷InGaAsP材料,生长多层,单层厚度为0.01~0.05um;InP电荷层的生长厚度为0.08~0.4um,掺杂浓度为1×1016~5×1017cm-3;InP帽层采用非掺磷化铟材料,其生长厚度为2~4um;S1. Using epitaxial equipment to grow a SACM structure epitaxial wafer, including: sequentially growing an InP buffer layer, an InGaAs absorber layer, a graded layer, an InP charge layer and an InP cap layer on an InP substrate, wherein the growth thickness of the InP buffer layer is 0.2~ 1um, the doping concentration of the InP buffer layer is less than or equal to 2×10 18 cm -3 ; the non-doped InGaAs is used as the absorber layer, and its growth thickness is 0.4-3um; the graded layer adopts the non-doped InGaAsP material , grow multilayer, the thickness of single layer is 0.01~0.05um; the growth thickness of InP charge layer is 0.08~0.4um, and the doping concentration is 1×10 16 ~ 5×10 17 cm -3 ; InP cap layer adopts non-phosphorus doped Indium oxide material, its growth thickness is 2-4um;
S2、在倍增外延结构的InP帽层上表面沉积扩散掩膜层,即生长一层介质膜;S2, depositing a diffusion mask layer on the upper surface of the InP cap layer of the multiplication epitaxial structure, that is, growing a dielectric film;
S3、采用光刻工艺在掩膜层上,制作设计的图形并腐蚀图形内的介质膜,裸露InP帽层,形成扩散窗口;S3, using the photolithography process on the mask layer to make the designed pattern and etch the dielectric film in the pattern, exposing the InP cap layer to form a diffusion window;
S4、采用扩散工艺,在扩散窗口内将P型杂质源扩散至帽层的InP材料中,形成P型掺杂区;S4, using a diffusion process to diffuse the P-type impurity source into the InP material of the cap layer in the diffusion window to form a P-type doping region;
S5、重复S2-S4此步骤,通过光刻工艺逐次减小扩散窗口,通过扩散工艺逐次增加扩散深度,形成阶梯型P型掺杂区S5. Repeat the steps S2-S4, reduce the diffusion window successively through the photolithography process, and gradually increase the diffusion depth through the diffusion process to form a stepped P-type doped region
S6、采用剥离工艺在P型掺杂区的介质膜上制作负反馈电阻的剥离光刻胶膜。采用高分辨率的图形反转正/负改变型光刻胶,在P型掺杂区的介质膜上上制作剥离光刻胶膜,其主要步骤包括:基片烘焙,涂胶,前烘,曝光,反转烘烤,泛曝光,显影,后烘;光刻胶膜层的厚度为0.5-1.0μm;S6, a stripping photoresist film of a negative feedback resistor is formed on the dielectric film of the P-type doped region by a stripping process. Using high-resolution pattern inversion positive/negative change photoresist, a peeling photoresist film is fabricated on the dielectric film in the P-type doped region. The main steps include: substrate baking, gluing, pre-baking, Exposure, reverse baking, flood exposure, development, post-baking; the thickness of the photoresist film layer is 0.5-1.0μm;
S7、采用磁控溅射蒸发工艺蒸发高电阻率的金属电阻薄膜,形成负反馈电阻,通过控制磁控溅射的速率、时间控制负反馈电阻的电阻值为1KΩ/□,其中,“□”表示方块电阻的单位区域;S7. Use the magnetron sputtering evaporation process to evaporate the high resistivity metal resistance film to form a negative feedback resistor. The resistance value of the negative feedback resistor is controlled to 1KΩ/□ by controlling the rate and time of the magnetron sputtering, where "□" Represents the unit area of the sheet resistance;
S8、重复剥离工艺和蒸发工艺,制作与负反馈电阻两端相连的焊盘和P电极,负反馈电阻的一端通过P电极与P型掺杂区相连,另一端与焊盘相连;S8, repeating the peeling process and the evaporation process to make a pad and a P electrode connected to both ends of the negative feedback resistor, one end of the negative feedback resistor is connected to the P-type doped region through the P electrode, and the other end is connected to the pad;
S9、采用介质膜工艺在负反馈电阻、焊盘以及P电极上继续沉积介质膜;S9. Continue to deposit a dielectric film on the negative feedback resistor, the pad and the P electrode by using the dielectric film process;
S10、采用光刻工艺刻蚀P电极及焊盘上的介质膜;S10, using a photolithography process to etch the P electrode and the dielectric film on the pad;
S11、根据背面进光需求减薄抛光外延片衬底,并采用介质膜工艺在衬底上沉积一层增透膜,采用光刻工艺刻蚀衬底上与掺杂区同轴心以外区域的增透膜形成入射光窗;S11. Thinning and polishing the epitaxial wafer substrate according to the light input requirements from the back side, depositing an anti-reflection film on the substrate using a dielectric film process, and using a photolithography process to etch the area on the substrate that is not concentric with the doped region The anti-reflection coating forms the incident light window;
S12、采用蒸发工艺制作与衬底相连的金属N电极。S12, an evaporation process is used to fabricate a metal N electrode connected to the substrate.
为了使本发明的方法更加清楚完整,接下来以背面入射光负反馈型铟镓砷/磷化铟(InGaAs/InP)雪崩二极管为例对负反馈型单光子雪崩光电二极管的制备过程进行进一步说明。In order to make the method of the present invention clearer and more complete, the preparation process of the negative feedback single-photon avalanche photodiode is further described by taking the negative feedback type indium gallium arsenide/indium phosphide (InGaAs/InP) avalanche diode as an example for the back incident light. .
1.如图7所示,首先利用外延设备生长图3所示的InP基SACM结构外延片,包括:n型InP衬底;n型InP缓冲层,其生长厚度为0.2~1um,掺杂浓度不大于2×1018cm-3;非掺杂的InGaAs作为吸收层,其生长厚度为0.4~3um;非掺杂的铟镓砷磷(InGaAsP)作为渐变层,由多层组成,单层厚度为0.01~0.05um;n型InP电场控制层,即InP电荷层,其生长厚度为0.08~0.4um,掺杂浓度为1×1016~5×1017cm-3;非掺磷化铟帽层,n型InP帽层,其生长厚度为2~4um。1. As shown in Figure 7, the InP-based SACM structure epitaxial wafer shown in Figure 3 is first grown using epitaxial equipment, including: an n-type InP substrate; an n-type InP buffer layer, the growth thickness of which is 0.2-1um, and the doping concentration Not more than 2×10 18 cm -3 ; undoped InGaAs is used as the absorber layer, and its growth thickness is 0.4-3um; undoped indium gallium arsenide phosphorus (InGaAsP) is used as the graded layer, which is composed of multiple layers with a single layer thickness 0.01~0.05um; n-type InP electric field control layer, namely InP charge layer, its growth thickness is 0.08~0.4um, and the doping concentration is 1×10 16 ~5×10 17 cm -3 ; non-doped indium phosphide cap layer, n-type InP cap layer, its growth thickness is 2 ~ 4um.
2.在倍增外延结构的InP帽层上表面沉积扩散掩膜层,即生长一层介质膜。2. A diffusion mask layer is deposited on the upper surface of the InP cap layer of the multiplication epitaxial structure, that is, a layer of dielectric film is grown.
3.采用光刻工艺在掩膜层上,制作设计的图形并腐蚀图形内的介质膜,裸露InP帽层,形成扩散窗口。3. On the mask layer, a photolithography process is used to make the designed pattern and etch the dielectric film in the pattern to expose the InP cap layer to form a diffusion window.
4.采用扩散工艺,在扩散窗口内将P型杂质源扩散至帽层的InP材料中,形成P型掺杂区。4. Using a diffusion process, the P-type impurity source is diffused into the InP material of the cap layer in the diffusion window to form a P-type impurity region.
5.重复1-4此步骤,通过光刻工艺逐次减小扩散窗口,通过扩散工艺逐次增加扩散深度,形成阶梯型P型掺杂区。5. Repeat steps 1-4, successively reduce the diffusion window through the photolithography process, and gradually increase the diffusion depth through the diffusion process to form a stepped P-type doped region.
6.采用剥离工作,在P型掺杂区的介质膜上制作CrSi合金电阻的剥离光刻胶膜。采用高分辨率的图形反转正/负改变型光刻胶,在扩散完成的外延片上制作蒸发用剥离光刻胶膜层,其主要步骤包括:基片烘焙,涂胶,前烘,曝光,反转烘烤,泛曝光,显影,后烘等。为了控制剥离后合金薄膜电阻的线宽,同时考虑到剥离工作的可操作性,要求光刻胶膜层的厚度控制在0.5至1.0μm之间。6. Using peeling work, a peeling photoresist film of CrSi alloy resistor is made on the dielectric film of the P-type doped region. Using high-resolution pattern inversion positive/negative change photoresist, a stripped photoresist film layer for evaporation is fabricated on the epitaxial wafer after diffusion. The main steps include: substrate baking, gluing, pre-baking, exposure, Reverse bake, flood exposure, develop, post bake, etc. In order to control the line width of the alloy sheet resistance after stripping, and taking into account the operability of stripping work, the thickness of the photoresist film layer is required to be controlled between 0.5 and 1.0 μm.
7.采用磁控溅射蒸发工艺,完成CrSi的蒸发,控制合金薄膜的方块电阻值约为1KΩ/□。在CrSi靶材组分固定的情况下,CrSi薄膜电阻的方块电阻值主要与薄膜的厚度相关,增加厚度将降低薄膜电阻的方块电阻值;减少厚度能够获得更高的方块电阻值,但导致负反馈电阻上流过的电流密度过度,不能满足可靠性的设计要求。通过精确控制磁控溅射的速率、时间,获得CrSi的方块电阻值约为1KΩ/□。7. The magnetron sputtering evaporation process is used to complete the evaporation of CrSi, and the sheet resistance value of the control alloy film is about 1KΩ/□. When the composition of CrSi target material is fixed, the sheet resistance value of CrSi thin film resistor is mainly related to the thickness of the film. Increasing the thickness will reduce the sheet resistance value of the thin film resistor; reducing the thickness can obtain a higher sheet resistance value, but it will lead to negative The current density flowing through the feedback resistor is too high to meet the reliability design requirements. By precisely controlling the rate and time of magnetron sputtering, the sheet resistance of CrSi is about 1KΩ/□.
8.重复剥离工艺、采用蒸发工艺,制作与CrSi电阻两端相连的TiPtAu电极及焊盘。CrSi电阻的一端通过TiPtAu金属电极,与P型掺杂区相连形成P电极,另一端与TiPtAu金属相连,形成焊盘。8. Repeat the stripping process and use the evaporation process to make TiPtAu electrodes and pads connected to both ends of the CrSi resistor. One end of the CrSi resistor is connected to the P-type doped region through the TiPtAu metal electrode to form a P electrode, and the other end is connected to the TiPtAu metal to form a pad.
9.在CrSi上,沉积介质膜。采用介质膜工艺,在CrSi、电极和焊盘上沉积SiO2或SiNX介质膜,用于保护CiSi电阻,减少外界环境对其的影响。9. On CrSi, deposit a dielectric film. The dielectric film process is used to deposit SiO 2 or SiN X dielectric film on CrSi, electrodes and pads to protect the CiSi resistance and reduce the influence of the external environment on it.
10.采用光刻工艺,选择性的刻蚀P电极及焊盘上介质膜,用于NFAD的电连接。10. Using the photolithography process, the P electrode and the dielectric film on the pad are selectively etched for the electrical connection of the NFAD.
11.根据背面进光需求减薄抛光外延片衬底,并采用介质膜工艺在衬底上沉积一层增透膜,采用光刻工艺刻蚀衬底上与掺杂区同轴心以外区域的增透膜形成入射光窗。11. Thinning and polishing the epitaxial wafer substrate according to the light input requirements from the back side, depositing an anti-reflection film on the substrate using a dielectric film process, and using a photolithography process to etch the area on the substrate other than the concentric area of the doping area. The AR coating forms the incident light window.
12.采用蒸发工艺制作与衬底相连的金属N电极。12. The metal N electrode connected to the substrate is fabricated by an evaporation process.
当介绍本申请的各种实施例的元件时,冠词“一”、“一个”、“这个”和“所述”都意图表示有一个或多个元件。词语“包括”、“包含”和“具有”都是包括性的并意味着除了列出的元件之外,还可以有其它元件。When introducing elements of various embodiments of the present application, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the elements. The words "comprising", "comprising" and "having" are all inclusive and mean that there may be additional elements other than the listed elements.
在本发明的描述中,需要理解的是,术语“上”、“上方”、“下”、“下方”、“中部”、“顶中间”、“一端”、“另一端”、“上部”、“上表面”、“下表面”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。In the description of the present invention, it should be understood that the terms "upper", "upper", "lower", "lower", "middle", "top middle", "one end", "the other end", "upper" , "upper surface", "lower surface", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying the indicated device or Elements must have a particular orientation, be constructed and operate in a particular orientation and are therefore not to be construed as limitations of the invention.
尽管已经示出和描述了本发明的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型,本发明的范围由所附权利要求及其等同物限定。Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, and substitutions can be made in these embodiments without departing from the principle and spirit of the invention and modifications, the scope of the present invention is defined by the appended claims and their equivalents.
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