CN111900992B - Analog-to-digital converter based on delta modulation - Google Patents
Analog-to-digital converter based on delta modulation Download PDFInfo
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- CN111900992B CN111900992B CN202010922012.5A CN202010922012A CN111900992B CN 111900992 B CN111900992 B CN 111900992B CN 202010922012 A CN202010922012 A CN 202010922012A CN 111900992 B CN111900992 B CN 111900992B
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- 238000001914 filtration Methods 0.000 claims abstract description 49
- 238000009825 accumulation Methods 0.000 claims abstract description 41
- 238000005070 sampling Methods 0.000 claims abstract description 17
- 238000000605 extraction Methods 0.000 claims description 6
- 239000013598 vector Substances 0.000 claims description 3
- 238000013139 quantization Methods 0.000 description 11
- 238000004364 calculation method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000006978 adaptation Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000013075 data extraction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/02—Delta modulation, i.e. one-bit differential modulation
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- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
The invention discloses an analog-to-digital converter based on delta modulation, which comprises an anti-aliasing filter, a delta modulator and a digital decimation filter module; the input end of the anti-aliasing filter receives an analog signal to be converted, the output end of the anti-aliasing filter is connected with the delta modulator, and the output end of the delta modulator externally outputs an obtained digital signal through the digital decimation filter module. When the delta modulator is designed, the first integrator is used for integrating the input signal, so that the amplitude of the high-frequency component of the signal is reduced, the slope of the signal is reduced, and then the delta modulator is used for carrying out delta modulation, so that the problem of overload of the slope of the signal is effectively avoided; when the digital decimation filter module is designed, repeated cascade accumulation operation is carried out on data at a high sampling rate, then data decimation is carried out in a downsampling mode, and repeated cascade differential operation is carried out, so that effective combination of digital filtering and decimation is realized, and the stability of data processing can be ensured.
Description
Technical Field
The present invention relates to analog-to-digital conversion, and more particularly, to an analog-to-digital converter based on delta modulation.
Background
In an ADC (sigma-delta ADC) comprising a sigma-delta modulator (also called an integrated delta modulator), for a continuous signal, if the sampling interval is small, the signal amplitude between adjacent sampling points will not change too much, and if the difference between the two points is quantized, the information contained in the continuous signal can be replaced as well. In a delta modulator, a quantizer is used to quantize the difference between the two samples and the quantized difference is summed by an integrator to form the final sample. The quantization noise of the delta modulator is composed of two parts, namely a normal quantization noise and an overload quantization noise. When the sampling interval is small enough, the signal amplitude variation does not exceed the quantization step delta, the quantization noise is a normal quantization noise. In a sampling interval, the signal amplitude changes beyond quantization steps, namely when slope overload exists, and when the integrator cannot track the change of the signal, quantization noise is overload noise, and obviously, the slope overload of the signal affects the performance of the delta modulator;
Meanwhile, for the signal output by the delta modulator, after the sigma-delta modulator shapes the quantization noise, the quantization noise is moved out of the frequency band of interest, and the shaped quantization noise can be filtered by a digital filter. In sigma-delta ADCs, decimation is often combined with digital filtering. Doing so may increase computational efficiency. It is well known that Finite Impulse Response (FIR) filters simply perform a flow weighted average calculation on the input sample values (the weight size is determined by the individual coefficients of the filter, respectively). In general, each input sample value should correspond to a filter output. However, if it is desired to decimate the filter output, i.e., resample the filter output with a lower frequency, it is not necessary to perform the filter output calculation for each sampled input. In this case, only the calculation is performed at the extraction rate, so that the efficiency of the calculation process can be greatly improved. However, if an Infinite Impulse Response (IIR) filter is used, digital filtering cannot be combined with decimation due to the feedback contained therein.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides an analog-to-digital converter based on delta modulation, can effectively avoid the influence of signal slope overload on the delta modulator, realizes the effective combination of digital filtering and extraction, and ensures the stability of data processing.
The aim of the invention is realized by the following technical scheme: an analog-to-digital converter based on delta modulation comprises an anti-aliasing filter, a delta modulator and a digital decimation filter module;
The input end of the anti-aliasing filter receives an analog signal to be converted, the output end of the anti-aliasing filter is connected with the delta modulator, and the output end of the delta modulator externally outputs an obtained digital signal through the digital decimation filter module.
Wherein the delta modulator comprises a first integrator, a differential amplifier, a quantizer, a second integrator, a differentiator, a third integrator and a 1-bit DAC;
The input end of the first integrator is connected with an analog signal output by the anti-aliasing filter, the output end of the first integrator is connected with the in-phase input end of the differential amplifier, the output end of the differential amplifier is connected with the quantizer, the output end of the quantizer is respectively connected with the second integrator and the third integrator, the output end of the third integrator is connected to the inverting input end of the differential amplifier through a 1-bit DAC, the output end of the second integrator is connected with the differentiator, and the differentiator outputs the signal outwards and transmits the signal to the digital extraction filtering module.
The digital decimation filter module comprises a downsampler, an accumulation filter module and a differential filter module;
the accumulation filter module comprises a plurality of cascaded accumulation filter units; each accumulation filter unit comprises an adder and a first low-pass filter;
in each accumulation filter unit, a first input end of an adder is connected with a signal input port of the accumulation filter unit, an output end of the adder is connected with a first low-pass filter, an output end of the first low-pass filter is connected with a signal output port of the accumulation filter unit, and an output end of the first low-pass filter is also connected with a second output end of the adder;
In any two adjacent accumulation filter units, the signal output port of the last accumulation filter unit is connected with the signal input port of the next accumulation filter unit, the signal input port of the first accumulation filter unit receives the signal from the delta modulator, and the output port of the last accumulation filter unit is connected with the downsampler; the output end of the downsampler is connected with the differential filtering module;
The differential filtering module comprises a plurality of cascaded differential filtering units, and each differential filtering unit comprises a differentiator and a second low-pass filter;
In each differential filtering unit, the input end of the second low-pass filter and the non-inverting input end of the differential device are connected to the input port of the differential filtering unit, the output end of the second low-pass filter is connected with the inverting input end of the differential device, and the output end of the differential device is connected to the output port of the differential filtering unit;
In the differential filtering units of any two vectors, the output port of the last differential filtering unit is connected to the input port of the next differential filtering unit, the input port of the first differential filtering unit is connected with the output end of the downsampler, and the output port of the last differential filtering unit outputs the processed signal to the outside.
The beneficial effects of the invention are as follows: when the delta modulator is designed, the input signal is integrated through the first integrator, so that the amplitude of the high-frequency component of the signal is reduced, the slope of the signal is reduced, then the delta modulator is performed, the problem of overload of the slope of the signal is effectively avoided, the signal is differentiated once through the differentiator before the final result is output, and the frequency loss caused by integration is effectively compensated; when the digital decimation filter module is designed, repeated cascade accumulation operation is carried out on data at a high sampling rate, then data decimation is carried out in a downsampling mode, a signal with a low sampling rate is obtained, and repeated cascade differential operation is carried out, so that effective combination of digital filtering and decimation is realized, and the stability of data processing can be ensured.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
FIG. 2 is a schematic diagram of a delta modulator;
Fig. 3 is a functional block diagram of a digital decimation filter module.
Detailed Description
The technical solution of the present invention will be described in further detail with reference to the accompanying drawings, but the scope of the present invention is not limited to the following description.
As shown in fig. 1, an analog-to-digital converter based on delta modulation includes an anti-aliasing filter, a delta modulator, and a digital decimation filter module;
The input end of the anti-aliasing filter receives an analog signal to be converted, the output end of the anti-aliasing filter is connected with the delta modulator, and the output end of the delta modulator externally outputs an obtained digital signal through the digital decimation filter module.
As shown in fig. 2, the delta modulator includes a first integrator, a differential amplifier, a quantizer, a second integrator, a differentiator, a third integrator, a 1-bit DAC;
The input end of the first integrator is connected with an analog signal output by the anti-aliasing filter, the output end of the first integrator is connected with the in-phase input end of the differential amplifier, the output end of the differential amplifier is connected with the quantizer, the output end of the quantizer is respectively connected with the second integrator and the third integrator, the output end of the third integrator is connected to the inverting input end of the differential amplifier through a 1-bit DAC, the output end of the second integrator is connected with the differentiator, and the differentiator outputs the signal outwards and transmits the signal to the digital extraction filtering module.
In an embodiment of the application, the quantizer employs a latch comparator and functions as a 1-bit ADC through the latch comparator. The non-inverting input end of the latch comparator is connected with the output end of the differential amplifier, the inverting input end of the latch comparator is grounded, and the provenance end of the latch comparator is respectively connected with the second integrator and the third integrator. The delta modulator further comprises a sampling clock input port connected to the clock port of the latching comparator for receiving an external sampling clock to provide a clock basis for the latching comparator.
As shown in fig. 3, the digital decimation filtering module includes a downsampler, an accumulation filtering module, and a differential filtering module;
the accumulation filter module comprises a plurality of cascaded accumulation filter units; each accumulation filter unit comprises an adder and a first low-pass filter;
in each accumulation filter unit, a first input end of an adder is connected with a signal input port of the accumulation filter unit, an output end of the adder is connected with a first low-pass filter, an output end of the first low-pass filter is connected with a signal output port of the accumulation filter unit, and an output end of the first low-pass filter is also connected with a second output end of the adder;
In any two adjacent accumulation filter units, the signal output port of the last accumulation filter unit is connected with the signal input port of the next accumulation filter unit, the signal input port of the first accumulation filter unit receives the signal from the delta modulator, and the output port of the last accumulation filter unit is connected with the downsampler; the output end of the downsampler is connected with the differential filtering module;
The differential filtering module comprises a plurality of cascaded differential filtering units, and each differential filtering unit comprises a differentiator and a second low-pass filter;
In each differential filtering unit, the input end of the second low-pass filter and the non-inverting input end of the differential device are connected to the input port of the differential filtering unit, the output end of the second low-pass filter is connected with the inverting input end of the differential device, and the output end of the differential device is connected to the output port of the differential filtering unit;
In the differential filtering units of any two vectors, the output port of the last differential filtering unit is connected to the input port of the next differential filtering unit, the input port of the first differential filtering unit is connected with the output end of the downsampler, and the output port of the last differential filtering unit outputs the processed signal to the outside.
The invention carries on the filter process to the input analog signal through the anti-aliasing filter, then carries on the integral (equivalent to the low-pass filter) to the signal obtained through the first integrator, makes the signal high-frequency component amplitude drop, reduces the signal slope, then carries on the increment modulation, must carry on the differential to compensate the frequency loss caused by the integral before the final result is output; assuming that the externally output sampling clock is Kfs, the quantizer converts the input signal into modulated pulses of a continuous serial bit stream consisting of 1 and 0 at Kfs sample rate; at a certain sampling point, the signal output by the quantizer is transmitted to the differentiator through the second differentiator, and is output by the differentiator; after the signals output by the quantizer are simultaneously transmitted to the third integrator for integration, the signals are converted by the 1-bit DAC and fed back to the inverting input end of the differential amplifier, and the differential amplifier is used for transmitting the difference value between the fed-back signals and the signals of the next sampling point to the quantizer; all information of signal amplitude is contained in the modulation pulse output by the modulator, the information is expressed as the duty ratio of the modulation pulse, and the digital signal (modulation pulse) obtained by modulation is transmitted to the digital decimation filtering module; in the digital decimation filter module, the accumulation filter module is composed of a plurality of cascade accumulation filter units, each stage accumulates input data, the obtained signals are sent to a down sampler for down sampling, the down sampled signals are sent to a differential filter module, and the final filter result is obtained through three differential processes in the differential filter module. Because the cascade accumulation operation is carried out on the data at the high sampling rate for a plurality of times, the data extraction is carried out in a downsampling mode to obtain a signal with a low sampling rate, and the differential operation is carried out for a plurality of times, the effective combination of digital filtering and extraction is realized, and the stability of data processing can be ensured.
Finally, it should be noted that the above is only a preferred embodiment of the present invention, and it should be noted that it will be apparent to those skilled in the art that several modifications and adaptations can be made without departing from the principle of the present invention, and these modifications and adaptations should and are intended to be comprehended within the scope of the present invention.
Claims (4)
1. An analog-to-digital converter based on delta modulation, characterized by: the device comprises an anti-aliasing filter, a delta modulator and a digital decimation filter module;
the input end of the anti-aliasing filter receives an analog signal to be converted, the output end of the anti-aliasing filter is connected with a delta modulator, and the output end of the delta modulator externally outputs an obtained digital signal through a digital decimation filter module;
the delta modulator comprises a first integrator, a differential amplifier, a quantizer, a second integrator, a differentiator, a third integrator and a 1-bit DAC;
The input end of the first integrator is connected with an analog signal output by the anti-aliasing filter, the output end of the first integrator is connected with the in-phase input end of the differential amplifier, the output end of the differential amplifier is connected with the quantizer, the output end of the quantizer is respectively connected with the second integrator and the third integrator, the output end of the third integrator is connected to the inverting input end of the differential amplifier through a 1-bit DAC, the output end of the second integrator is connected with the differentiator, and the differentiator outputs the signal outwards and transmits the signal to the digital extraction filtering module;
The delta modulator further comprises a sampling clock input port connected to the clock port of the latching comparator for receiving an external sampling clock to provide a clock basis for the latching comparator.
2. A delta-modulation based analog-to-digital converter as claimed in claim 1, wherein: the quantizer adopts a latch comparator and realizes the function of a 1-bit ADC through the latch comparator.
3. A delta-modulation based analog-to-digital converter as claimed in claim 2, wherein: the non-inverting input end of the latch comparator is connected with the output end of the differential amplifier, the inverting input end of the latch comparator is grounded, and the provenance end of the latch comparator is respectively connected with the second integrator and the third integrator.
4. A delta-modulation based analog-to-digital converter as claimed in claim 1, wherein: the digital decimation filter module comprises a downsampler, an accumulation filter module and a differential filter module;
the accumulation filter module comprises a plurality of cascaded accumulation filter units; each accumulation filter unit comprises an adder and a first low-pass filter;
in each accumulation filter unit, a first input end of an adder is connected with a signal input port of the accumulation filter unit, an output end of the adder is connected with a first low-pass filter, an output end of the first low-pass filter is connected with a signal output port of the accumulation filter unit, and an output end of the first low-pass filter is also connected with a second output end of the adder;
In any two adjacent accumulation filter units, the signal output port of the last accumulation filter unit is connected with the signal input port of the next accumulation filter unit, the signal input port of the first accumulation filter unit receives the signal from the delta modulator, and the output port of the last accumulation filter unit is connected with the downsampler; the output end of the downsampler is connected with the differential filtering module;
The differential filtering module comprises a plurality of cascaded differential filtering units, and each differential filtering unit comprises a differentiator and a second low-pass filter;
In each differential filtering unit, the input end of the second low-pass filter and the non-inverting input end of the differential device are connected to the input port of the differential filtering unit, the output end of the second low-pass filter is connected with the inverting input end of the differential device, and the output end of the differential device is connected to the output port of the differential filtering unit;
In the differential filtering units of any two vectors, the output port of the last differential filtering unit is connected to the input port of the next differential filtering unit, the input port of the first differential filtering unit is connected with the output end of the downsampler, and the output port of the last differential filtering unit outputs the processed signal to the outside.
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| CN115694511B (en) * | 2022-12-30 | 2023-03-17 | 深圳芯盛思技术有限公司 | Continuous time Sigma-Delta analog-to-digital conversion system and operation method and application thereof |
| CN117526957B (en) * | 2024-01-04 | 2024-03-19 | 秦玄汉(苏州)信息科技有限公司 | Analog-to-digital converter with optimal quantization bit number |
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| CN101640539A (en) * | 2009-06-19 | 2010-02-03 | 浙江大学 | Sigma-delta analog-to-digital converter |
| CN212486486U (en) * | 2020-09-04 | 2021-02-05 | 成都泰格微波技术股份有限公司 | Analog-digital converter based on incremental modulation |
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| US5148167A (en) * | 1990-04-06 | 1992-09-15 | General Electric Company | Sigma-delta oversampled analog-to-digital converter network with chopper stabilization |
| US5103229A (en) * | 1990-04-23 | 1992-04-07 | General Electric Company | Plural-order sigma-delta analog-to-digital converters using both single-bit and multiple-bit quantization |
| CN101499282B (en) * | 2008-02-03 | 2012-03-07 | 深圳艾科创新微电子有限公司 | Voice A/D conversion method and device |
| CN101510756A (en) * | 2009-03-06 | 2009-08-19 | 山东大学 | Digital signal down variable frequency processing system based on MIMO real time test platform |
| US20120041695A1 (en) * | 2010-08-16 | 2012-02-16 | Csi Technology, Inc. | Integrated vibration measurement and analysis system |
| CN103580647B (en) * | 2013-11-26 | 2016-08-10 | 无锡市纳微电子有限公司 | A kind of filter construction |
| CN109672448A (en) * | 2018-12-20 | 2019-04-23 | 四川长虹电器股份有限公司 | The modulator of 2-1 type MASH structure |
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| CN101640539A (en) * | 2009-06-19 | 2010-02-03 | 浙江大学 | Sigma-delta analog-to-digital converter |
| CN212486486U (en) * | 2020-09-04 | 2021-02-05 | 成都泰格微波技术股份有限公司 | Analog-digital converter based on incremental modulation |
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