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CN111900152B - Integrated unit diode chip - Google Patents

Integrated unit diode chip Download PDF

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Publication number
CN111900152B
CN111900152B CN201910372220.XA CN201910372220A CN111900152B CN 111900152 B CN111900152 B CN 111900152B CN 201910372220 A CN201910372220 A CN 201910372220A CN 111900152 B CN111900152 B CN 111900152B
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integrated unit
diode chip
light
diode
units
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CN111900152A (en
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闫春辉
蒋振宇
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Naweilang Technology Shenzhen Co ltd
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    • H10W90/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/831Electrodes characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/8506Containers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/855Optical field-shaping means, e.g. lenses
    • H10H20/856Reflecting means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls

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Abstract

本发明提供一种集成单元发光二极管,包括:第一导电类型电极,第二导电类型电极,第二导电类型焊盘及n个二极管单元,所述n个二极管单元沿Y轴方向长度小于电流扩散长度,其中,n≥2;所示n个二极管单元包括孔结构。本发明解决了现有技术存在的二极管结构在流明效率、流明密度输出、流明成本三个重要的参数上极大局限性的技术问题,提高了单位面积芯片的流明输出,降低了流明成本。

The present invention provides an integrated unit light-emitting diode, comprising: electrodes of a first conductivity type, electrodes of a second conductivity type, pads of a second conductivity type and n diode units, the length of the n diode units along the Y axis direction being less than the current diffusion length, wherein, n≥2; the n diode units shown include a hole structure. The invention solves the technical problem that the diode structure in the prior art has great limitations on the three important parameters of lumen efficiency, lumen density output and lumen cost, improves the lumen output of the chip per unit area, and reduces the lumen cost.

Description

一种集成单元二极管芯片An integrated unit diode chip

技术领域technical field

本发明涉及半导体材料和器件工艺领域,特别是半导体光电器件。The invention relates to the field of semiconductor materials and device technology, in particular to semiconductor optoelectronic devices.

背景技术Background technique

常规的垂直结构LED芯片中,电流扩散主要依靠n电极侧,有电极引线型引线或钻孔型的引线,但总体电流扩散仍不均匀,导致发光效率的损失,散热也不均匀,从而影响单元二极管芯片的效率和稳定性。从而限制了垂直大功率LED芯片提供单位面积流明输出更高的产品。电流扩散的不均匀、热扩散的不均匀和光提取的不均匀,导致其在流明效率、流明密度输出、流明成本三个重要的参数上有极大的局限性,目前市场上的垂直LED芯片技术无法提供有效的解决方案。In conventional vertical structure LED chips, the current diffusion mainly depends on the n-electrode side, and there are electrode lead-type leads or drill-type leads, but the overall current diffusion is still uneven, resulting in loss of luminous efficiency and uneven heat dissipation, thus affecting the unit. Efficiency and stability of diode chips. This restricts vertical high-power LED chips from providing products with higher lumen output per unit area. Uneven current diffusion, uneven thermal diffusion, and uneven light extraction lead to great limitations in the three important parameters of lumen efficiency, lumen density output, and lumen cost. The vertical LED chip technology currently on the market An effective solution cannot be provided.

现有技术一为Proc.of SPIE Vol.10021 100210X-1 2016会议论文,如图1-3所示,其中,图1为垂直LED芯片的结构图,其中p型电极与背面的电极相连(back metal Au),黑色部分边缘的方框与中间3根手指型引线代表了n型电极,通过下方的两个大的N-pad打线引出。因此整个芯片的电流扩散,主要为n型金属线所限制。Existing technology one is Proc.of SPIE Vol.10021 100210X-1 2016 conference paper, as shown in Figure 1-3, wherein Figure 1 is a structural diagram of a vertical LED chip, in which the p-type electrode is connected to the electrode on the back (back metal Au), the box on the edge of the black part and the three finger-shaped leads in the middle represent the n-type electrodes, which are drawn out through the two large N-pads below. Therefore, the current diffusion of the entire chip is mainly limited by the n-type metal wires.

图2展示了现有技术一的垂直芯片的近场分析图和中线上归一化的电流分布图,芯片的尺寸为1.2mm×1.2mm。近场图中可见,芯片的电流分布仍然十分不均匀,靠近n电极线的区域光强很大,电流密度大,而远离n电极线的区域光强较小,电流密度小。归一化的分布图显示,电流密度较小的区域不到较大区域的70%。因此,大电流下的LED光效、散热和稳定性都会受到严重的限制。FIG. 2 shows the near-field analysis diagram and the normalized current distribution diagram on the center line of the vertical chip in the prior art 1, and the size of the chip is 1.2mm×1.2mm. It can be seen from the near-field diagram that the current distribution of the chip is still very uneven. The area close to the n-electrode line has a large light intensity and a high current density, while the area far away from the n-electrode line has a small light intensity and a low current density. The normalized profile shows that the area with less current density is less than 70% of the larger area. Therefore, LED light efficiency, heat dissipation and stability under high current will be severely limited.

发明内容Contents of the invention

本发明为解决现有技术存在的二极管结构流明效率、流明密度输出、流明成本三个重要的参数上有极大局限性的技术问题,提出一种流明效率高、流明密度输出大的集成单元二极管。In order to solve the technical problems of the prior art that have great limitations on the three important parameters of diode structure lumen efficiency, lumen density output and lumen cost, the invention proposes an integrated unit diode with high lumen efficiency and large lumen density output .

为实现上述目的,本发明提供一种集成单元二极管芯片,包括:第一导电类型电极,第二导电类型电极,第二导电类型焊盘及n个二极管单元,所述n个二极管单元沿Y轴方向长度小于电流扩散长度,其中,n≥2;所示n个二极管单元包括孔结构。To achieve the above object, the present invention provides an integrated unit diode chip, comprising: electrodes of the first conductivity type, electrodes of the second conductivity type, pads of the second conductivity type and n diode units, the n diode units along the Y axis The direction length is smaller than the current diffusion length, wherein, n≥2; the n diode units shown include hole structures.

优选的,所述第二导电类型电极由线条形电极线组成。Preferably, the electrodes of the second conductivity type are composed of strip-shaped electrode lines.

优选的,所述线条型线条形电极线采用直线布局,部分或全部设计采用非直线布局。Preferably, the linear electrode wires adopt a linear layout, and some or all of them adopt a non-linear layout.

优选的,所述非直线布局包括折线布局,曲线布局。Preferably, the non-linear layout includes broken line layout and curved layout.

优选的,所述孔结构包括1个~1000000个孔单元,所述孔单元直径为0.001微米~20微米。Preferably, the pore structure includes 1 to 1,000,000 pore units, and the diameter of the pore units is 0.001 micron to 20 microns.

优选的,所述二极管单元和衬底之间具有反射镜。Preferably, there is a mirror between the diode unit and the substrate.

优选的,所述反射镜材料为银、铝或分布式布拉格反射镜。Preferably, the reflector material is silver, aluminum or distributed Bragg reflector.

优选的,所述孔单元对称排列,非对称排列,周期性排列,非周期性排列或随机排列。Preferably, the pore units are arranged symmetrically, asymmetrically, periodically, non-periodically or randomly.

优选的,所述每个二极管单元上含有1个~1000000个孔单元,孔单元形状为三角形、正方形、长方形、五边形、六边形、圆形、以及其他任意定义形状。Preferably, each diode unit contains 1 to 1,000,000 hole units, and the shapes of the hole units are triangles, squares, rectangles, pentagons, hexagons, circles, and other arbitrary defined shapes.

优选的,所述二极管单元的连接方式为并联、串联或设定比例的串并联混合。Preferably, the connection mode of the diode units is parallel connection, series connection or a series-parallel combination with a set ratio.

优选的,所述二极管单元形状为:三角形、正方形、长方形、五边形、六边形、圆形、任意自定义形状。Preferably, the shape of the diode unit is: triangle, square, rectangle, pentagon, hexagon, circle, any custom shape.

优选的,所述二极管单元数量为2个~1000亿个。Preferably, the number of the diode units is 2 to 100 billion.

优选的,所述二极管单元沿Y轴方向长度为0.001微米~200微米。Preferably, the length of the diode unit along the Y-axis is 0.001 micron to 200 micron.

优选的,所述二极管单元按照均匀对称排列分布。Preferably, the diode units are distributed in a uniform and symmetrical arrangement.

优选的,所述二极管单元大小不等、不均匀分布设置。Preferably, the diode units are arranged in different sizes and distributed unevenly.

优选的,所述线条型线条形电极线采用线条形金属和/或氧化铟锡材料;所述线条形金属材料为铝、银、钛、镍、金、铂、铬,或以上任意两种及以上的金属的合金。Preferably, the line-shaped electrode line is made of line-shaped metal and/or indium tin oxide material; the line-shaped metal material is aluminum, silver, titanium, nickel, gold, platinum, chromium, or any two of the above and Alloys of the above metals.

优选的,所述的集成单元二极管芯片包括:背面电极、衬底,保护金属层,反射镜,第一导电类型层,量子阱有源区,第二导电类型层。Preferably, the integrated unit diode chip includes: a back electrode, a substrate, a protective metal layer, a mirror, a first conductivity type layer, a quantum well active region, and a second conductivity type layer.

优选的,所述背面电极材料为铝、银、钛、镍、金、铂、铬、锡,或以上任意两种及以上的金属的合金。Preferably, the back electrode material is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, or an alloy of any two or more of the above metals.

优选的,所述保护金属层材料为铝、银、钛、镍、金、铂、铬、锡、钨,或以上任意两种及以上的金属的合金。Preferably, the material of the protective metal layer is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, tungsten, or an alloy of any two or more of the above metals.

优选的,所述反射镜材料为银、铝、分布式布拉格反射镜。Preferably, the reflector material is silver, aluminum, distributed Bragg reflector.

优选的,所述集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光、红光或红外光。Preferably, the light emitted by the integrated unit diode chip is UVC, UVB, UVA, violet, blue, green, yellow, red or infrared.

优选的,所述集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光或红光时发光材料为Alx1Iny1Gaz1N,1≥x1,y1,z1≥0;所述衬底为平面衬底,或图形化衬底;所述衬底材料为蓝宝石、碳化硅、氮化镓、氮化铝、氧化镓或硅。Preferably, when the light emitted by the integrated unit diode chip is UVC, UVB, UVA, violet, blue, green, yellow or red, the luminescent material is Al x1 In y1 Ga z1 N, 1≥x1, y1, z1≥ 0; the substrate is a planar substrate or a patterned substrate; the substrate material is sapphire, silicon carbide, gallium nitride, aluminum nitride, gallium oxide or silicon.

优选的,所述单元二极管芯片发光光波为黄光、红光、红外光时发光材料为Alx2Iny2Gaz2P,1≥x2,y2,z2≥0,Alx3Iny3Gaz3As,1≥x3,y3,z3≥0,Alx4Iny4Gaz4AsuPv,1≥x4,y4,z4,u,v≥0;所述衬底为平面衬底,或图形化衬底,衬底材料为磷化铟、砷化镓、蓝宝石或硅。Preferably, when the unit diode chip emits light waves of yellow light, red light, and infrared light, the luminescent material is Al x2 In y2 Ga z2 P, 1≥x2, y2, z2≥0, Al x3 In y3 Ga z3 As, 1 ≥x3,y3,z3≥0,Al x4 In y4 Ga z4 As u P v ,1≥x4,y4,z4,u,v≥0; the substrate is a planar substrate, or a patterned substrate, a substrate The bottom material is indium phosphide, gallium arsenide, sapphire or silicon.

优选的,所述集成单元二极管芯片尺寸为0.1微米×0.1微米至100000微米×100000微米。Preferably, the size of the integrated unit diode chip is 0.1 micron×0.1 micron to 100000 micron×100000 micron.

优选的,所述集成单元二极管芯片的功率为0.0001W~1000W。Preferably, the power of the integrated unit diode chip is 0.0001W-1000W.

本发明所采用的集成单元二极管芯片,通过纳微米尺寸结构效应,在光、电、热三个层面突破现有垂直LED技术的局限性。单元二极管芯片的尺寸设计控制在电流扩散长度以内,其较高自由度的几何优化设计方式,可同时解决困扰LED单元二极管芯片设计的n-电极和p-电极电流扩散不均匀的问题,从而得到更高的光电转换效率/流明效率;每个二极管单元的纳米微结构,以及台面内部的孔结构可增加有效出光面积,从而提升光萃取效率;集成单元二极管芯片尺寸的缩小和台面内部的孔结构,带来更大的散热面积,具备更佳的散热性能,可以允许超大电流密度的注入而不影响其稳定性,从而极大的提高单位面积集成单元二极管芯片的流明输出,降低流明成本。The integrated unit diode chip used in the present invention breaks through the limitations of the existing vertical LED technology in three levels of light, electricity and heat through the nano-micron size structure effect. The size design of the unit diode chip is controlled within the current diffusion length, and its high-degree-of-freedom geometric optimization design method can simultaneously solve the problem of uneven current diffusion of the n-electrode and p-electrode that plagues the design of the LED unit diode chip, thus obtaining Higher photoelectric conversion efficiency/lumen efficiency; the nano-microstructure of each diode unit, and the hole structure inside the mesa can increase the effective light output area, thereby improving the light extraction efficiency; the size reduction of the integrated unit diode chip and the hole structure inside the mesa , bring a larger heat dissipation area, have better heat dissipation performance, allow the injection of ultra-high current density without affecting its stability, thereby greatly improving the lumen output per unit area of the integrated unit diode chip and reducing the lumen cost.

附图说明Description of drawings

图1是现有技术的二极管单元结构图。FIG. 1 is a structural diagram of a diode unit in the prior art.

图2是现有技术的二极管单元结构图。Fig. 2 is a structural diagram of a diode unit in the prior art.

图3是本发明实施例1提供的集成单元二极管芯片的俯视图。FIG. 3 is a top view of the integrated unit diode chip provided by Embodiment 1 of the present invention.

图4是本发明实施例2提供的集成单元二极管芯片的俯视图。Fig. 4 is a top view of the integrated unit diode chip provided by Embodiment 2 of the present invention.

图5是本发明实施例1-2提供的集成单元二极管芯片示意图。FIG. 5 is a schematic diagram of an integrated unit diode chip provided by Embodiment 1-2 of the present invention.

第二导电类型电极1,第二导电类型层2,量子阱有源区3,第一导电类型层4,反射镜5,保护金属层6,衬底7,背面电极8,第二导电类型焊盘9,二极管单元10,孔结构11。Second conductivity type electrode 1, second conductivity type layer 2, quantum well active region 3, first conductivity type layer 4, mirror 5, protective metal layer 6, substrate 7, back electrode 8, second conductivity type solder Disc 9 , diode unit 10 , hole structure 11 .

具体实施方式Detailed ways

下面结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护范围。The technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

鉴于现有的二极管结构流明效率、流明密度输出、流明成本三个重要的参数上极大的局限性,本发明实施例提供一种流明效率高、流明密度输出大的集成单元二极管,以下结合附图对本发明进行详细说明。In view of the great limitations of the three important parameters of the existing diode structure, lumen efficiency, lumen density output, and lumen cost, the embodiment of the present invention provides an integrated unit diode with high lumen efficiency and large lumen density output. The figures illustrate the invention in detail.

本发明提供一种集成单元二极管芯片,包括:The invention provides an integrated unit diode chip, comprising:

第一导电类型电极,第二导电类型电极,第二导电类型焊盘及n个二极管单元,所述n个二极管单元沿Y轴方向长度小于电流扩散长度,其中,n≥2;所示n个二极管单元包括孔结构。Electrodes of the first conductivity type, electrodes of the second conductivity type, pads of the second conductivity type and n diode units, the length of the n diode units along the Y-axis direction is less than the current diffusion length, wherein n≥2; n shown The diode unit includes a hole structure.

优选的,所述第二导电类型电极由线条形电极线组成。Preferably, the electrodes of the second conductivity type are composed of strip-shaped electrode lines.

优选的,所述线条形电极线采用直线布局,部分或全部设计采用非直线布局,其中非直线布局包括折线布局,曲线布局,线条形电极线宽度为0.001微米~20微米,厚度为0.001微米~10微米,采用线条形金属和/或氧化铟锡材料,其中线条形金属材料为铝、银、钛、镍、金、铂、铬,或以上任意两种及以上的金属的合金。Preferably, the line-shaped electrode line adopts a linear layout, and part or all of the design adopts a non-linear layout, wherein the non-linear layout includes a broken line layout and a curved line layout. 10 microns, using linear metal and/or indium tin oxide material, wherein the linear metal material is aluminum, silver, titanium, nickel, gold, platinum, chromium, or an alloy of any two or more of the above metals.

n个二极管单元结构包括孔结构,孔结构包括1个~1000000个孔单元,所述孔单元直径为0.001微米~20微米,孔单元对称排列,非对称排列,周期性排列,非周期性排列或随机排列,每个二极管单元上含有1个~1000000个孔单元,孔单元形状为三角形、正方形、长方形、五边形、六边形、圆形、以及其他任意定义形状。The n diode unit structures include a hole structure, and the hole structure includes 1 to 1,000,000 hole units, and the diameter of the hole units is 0.001 micron to 20 microns, and the hole units are arranged symmetrically, asymmetrically, periodically, non-periodically, or Arranged randomly, each diode unit contains 1 to 1,000,000 hole units, and the shape of the hole units is triangle, square, rectangle, pentagon, hexagon, circle, and other arbitrary defined shapes.

二极管单元和衬底之间具有反射镜,反射镜材料为银、铝或分布式布拉格反射镜。二极管单元的连接方式为并联,二极管单元形状为:三角形、正方形、长方形、五边形、六边形、圆形、任意自定义形状。二极管单元数量为2个~1000亿个。二极管单元沿Y轴方向长度为0.001微米~200微米。二极管单元按照均匀对称排列分布。二极管单元大小不等、不均匀分布设置。A reflection mirror is provided between the diode unit and the substrate, and the material of the reflection mirror is silver, aluminum or a distributed Bragg reflection mirror. The connection mode of the diode unit is parallel connection, and the shape of the diode unit is: triangle, square, rectangle, pentagon, hexagon, circle, any custom shape. The number of diode cells is 2 to 100 billion. The length of the diode unit along the Y-axis direction is 0.001 micron to 200 micron. The diode units are arranged in a uniform and symmetrical arrangement. Diode units are set in different sizes and unevenly distributed.

集成单元二极管芯片还包括:背面电极、衬底,保护金属层,反射镜,第一导电类型层,量子阱有源区,第二导电类型层。背面电极材料为铝、银、钛、镍、金、铂、铬、锡,或以上任意两种及以上的金属的合金。保护金属层材料为铝、银、钛、镍、金、铂、铬、锡、钨,或以上任意两种及以上的金属的合金。反射镜材料为银、铝、分布式布拉格反射镜。The integrated unit diode chip also includes: a back electrode, a substrate, a protective metal layer, a mirror, a first conductivity type layer, a quantum well active region, and a second conductivity type layer. The back electrode material is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, or an alloy of any two or more of the above metals. The material of the protective metal layer is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, tungsten, or an alloy of any two or more of the above metals. Mirror material is silver, aluminum, distributed Bragg reflector.

集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光、红光或红外光,当发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光或红光时发光材料为Alx1Iny1Gaz1N,1≥x1,y1,z1≥0;衬底为平面衬底,或图形化衬底;衬底材料为蓝宝石、碳化硅、氮化镓、氮化铝、氧化镓或硅。当片发光光波为黄光、红光、红外光时发光材料为Alx2Iny2Gaz2P,1≥x2,y2,z2≥0,Alx3Iny3Gaz3As,1≥x3,y3,z3≥0,Alx4Iny4Gaz4AsuPv,1≥x4,y4,z4,u,v≥0;衬底为平面衬底,或图形化衬底,衬底材料为磷化铟、砷化镓、蓝宝石或硅。The integrated unit diode chip emits light waves of UVC, UVB, UVA, purple, blue, green, yellow, red or infrared. When the light wave is UVC, UVB, UVA, purple, blue, green, yellow or red The light-emitting material is Al x1 In y1 Ga z1 N, 1≥x1, y1, z1≥0; the substrate is a planar substrate, or a patterned substrate; the substrate material is sapphire, silicon carbide, gallium nitride, nitrogen aluminum oxide, gallium oxide, or silicon. When the light wave of the sheet is yellow light, red light and infrared light, the luminescent material is Al x2 In y2 Ga z2 P, 1≥x2, y2, z2≥0, Al x3 In y3 Ga z3 As, 1≥x3, y3, z3 ≥0,Al x4 In y4 Ga z4 As u P v ,1≥x4,y4,z4,u,v≥0; the substrate is a planar substrate, or a patterned substrate, and the substrate material is indium phosphide, arsenic gallium chloride, sapphire or silicon.

集成单元二极管芯片尺寸为0.1微米×0.1微米至100000微米×100000微米。集成单元二极管芯片的功率为0.0001W~1000W。The size of the integrated unit diode chip is 0.1 micron×0.1 micron to 100000 micron×100000 micron. The power of the integrated unit diode chip is 0.0001W-1000W.

实施例1Example 1

本实施例提供一种集成单元二极管芯片,如图3所示,包括:第二导电类型电极1,第二导电类型焊盘9和二极管单元10。其中,第二导电类型电极1为n型电极,第二导电类型焊盘9为n型焊盘。This embodiment provides an integrated unit diode chip, as shown in FIG. 3 , including: a second conductivity type electrode 1 , a second conductivity type pad 9 and a diode unit 10 . Wherein, the second conductivity type electrode 1 is an n-type electrode, and the second conductivity type pad 9 is an n-type pad.

二极管单元为大小部分相同的长方形,呈7排7个部分等均匀分布的二极管单元沿Y轴纵向方向的长度为80微米,小于电流扩散长度。二极管单元间连接方式为并联。每个二极管单元增设孔结构11,共有81个圆形孔单元。其中靠近长边的4个二极管单元,每个二极管单元有12个孔单元,中间的3个二极管单元,每个二极管单元有11个孔单元,孔单元直径为1nm~20微米。孔单元对称排列。孔单元排列方式还可以为非对称排列,周期性排列,非周期性排列或随机排列,孔单元形状还可以为三角形、正方形、长方形、五边形、六边形、圆形、以及其它任意定义形状,并不局限于图3中展示的排列方式和形状。n型电极为线条形电极线,采用直线布局,电极线的宽度为0.001~10微米,厚度为0.001~20微米,电极线材料为铝或银或以上两种金属的合金。The diode unit is a rectangle with the same size and part, and the length of the evenly distributed diode unit along the Y-axis longitudinal direction is 80 microns, which is smaller than the current diffusion length. Diode units are connected in parallel. A hole structure 11 is added to each diode unit, and there are 81 circular hole units in total. The 4 diode units near the long side each have 12 hole units, and the 3 diode units in the middle each have 11 hole units with a diameter of 1 nm to 20 microns. The pore units are arranged symmetrically. The arrangement of hole units can also be asymmetric arrangement, periodic arrangement, non-periodic arrangement or random arrangement, and the shape of hole units can also be triangular, square, rectangular, pentagonal, hexagonal, circular, and other arbitrary definitions The shape is not limited to the arrangement and shape shown in FIG. 3 . The n-type electrode is a line-shaped electrode line, which adopts a straight line layout. The width of the electrode line is 0.001-10 microns, and the thickness is 0.001-20 microns. The material of the electrode line is aluminum or silver or an alloy of the above two metals.

在一些优选的实施例中,二极管单元沿Y轴纵向方向的长度为100微米;在另一些优选实施例中,二极管单元沿Y轴纵向方向的长度为10微米;在另一些优选实施例中,二极管单元沿Y轴纵向方向的长度为1微米。In some preferred embodiments, the length of the diode unit along the Y-axis longitudinal direction is 100 microns; in other preferred embodiments, the length of the diode unit along the Y-axis longitudinal direction is 10 microns; in other preferred embodiments, The length of the diode unit along the Y-axis longitudinal direction is 1 μm.

如图5所示,一种集成单元二极管芯片还包括第二导电类型层2,量子阱有源区3,第一导电类型层4,反射镜5,保护金属层6,衬底7,背面电极8。其中第二导电类型层2为n-GaN层,第一导电类型层4为-GaN层。背面电极材料为铝、银、钛、镍、金、铂、铬、锡,或以上任意两种及以上的金属的合金。保护金属层材料为铝、银、钛、镍、金、铂、铬、锡、钨,或以上任意两种及以上的金属的合金。反射镜材料为银、铝、分布式布拉格反射镜。集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光、红光时:单元二极管芯片材料为Alx1Iny1Gaz1N,1≥x1,y1,z1≥0,衬底为平面衬底,衬底材料为蓝宝石。集成单元二极管芯片发光光波为黄光、红光、红外光时,单元二极管芯片材料为Alx2Iny2Gaz2P,1≥x2,y2,z2≥0,Alx3Iny3Gaz3As,1≥x3,y3,z3≥0,Alx4Iny4Gaz4AsuPv,1≥x4,y4,z4,u,v≥0;衬底为平面衬底,衬底材料为磷化铟。As shown in Figure 5, an integrated unit diode chip also includes a second conductivity type layer 2, a quantum well active region 3, a first conductivity type layer 4, a mirror 5, a protective metal layer 6, a substrate 7, and a back electrode 8. Wherein the second conductivity type layer 2 is an n-GaN layer, and the first conductivity type layer 4 is a -GaN layer. The back electrode material is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, or an alloy of any two or more of the above metals. The material of the protective metal layer is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, tungsten, or an alloy of any two or more of the above metals. Mirror material is silver, aluminum, distributed Bragg reflector. When the light wave of the integrated unit diode chip is UVC, UVB, UVA, violet, blue, green, yellow, and red: the material of the unit diode chip is Al x1 In y1 Ga z1 N, 1≥x1, y1, z1≥0, The substrate is a planar substrate, and the substrate material is sapphire. When the integrated unit diode chip emits yellow light, red light, and infrared light, the material of the unit diode chip is Al x2 In y2 Ga z2 P, 1≥x2, y2, z2≥0, Al x3 In y3 Ga z3 As, 1≥ x3,y3,z3≥0,Al x4 In y4 Ga z4 As u P v ,1≥x4,y4,z4,u,v≥0; the substrate is a planar substrate, and the substrate material is indium phosphide.

由于二极管芯片的电流扩散长度与电流密度的平方根成反比,因此在大电流的注入下,电流的扩散长度更短,导致芯片的电流扩散更加的不均匀,效率更低,散热更加困难。采用集成单元发光二极管结构设计,可以灵活的改变二极管的尺寸、形状,可以获得指定工作电流下最佳的电流扩散和散热性能,并极大的提升芯片的注入电流密度,从而提升单位面积的流明输出。Since the current diffusion length of the diode chip is inversely proportional to the square root of the current density, under the injection of high current, the current diffusion length is shorter, resulting in more uneven current diffusion of the chip, lower efficiency, and more difficult heat dissipation. The integrated unit light-emitting diode structure design can flexibly change the size and shape of the diode, and can obtain the best current diffusion and heat dissipation performance under the specified working current, and greatly improve the injection current density of the chip, thereby increasing the lumen per unit area output.

实施例2Example 2

本实施例提供一种集成单元二极管芯片,如图4所示,包括:第二导电类型电极1,第二导电类型焊盘9和二极管单元10。其中,第二导电类型电极1为n型电极,由线条形电极线组成,第二导电类型焊盘9为n型焊盘。This embodiment provides an integrated unit diode chip, as shown in FIG. 4 , including: a second conductivity type electrode 1 , a second conductivity type pad 9 and a diode unit 10 . Wherein, the second conductivity type electrode 1 is an n-type electrode, which is composed of a strip-shaped electrode line, and the second conductivity type pad 9 is an n-type pad.

二极管单元为大小相同的正方形,呈7排16列106个等均匀分布,沿Y轴方向长度为40微米。二极管单元采用长方形排列,沿Y轴方向长度小于电流扩散的长度,二极管单元间连接方式为并联。每个二极管单元增设孔结构11,共有212个圆形孔单元。其中每个二极管单元包括2个孔单元,孔单元直径为1nm~20微米。孔单元对称排列。孔单元排列方式还可以为非对称排列,周期性排列,非周期性排列或随机排列,孔单元形状还可以为三角形、正方形、长方形、五边形、六边形、圆形、以及其它任意定义形状,并不局限于图4展示的排列方式和形状。n型电极为线条形电极线,采用直线布局,电极线的宽度为0.001~10微米,厚度为0.001~10微米,电极线材料为铝、银、钛、镍、金、铂、铬,或以上任意两种及以上的金属的合金。The diode units are squares of the same size, distributed uniformly in 7 rows, 16 columns, and 106, with a length of 40 microns along the Y-axis direction. The diode units are arranged in a rectangle, and the length along the Y-axis direction is smaller than the length of the current diffusion, and the diode units are connected in parallel. A hole structure 11 is added to each diode unit, and there are 212 circular hole units in total. Each diode unit includes two hole units, and the diameter of the hole units is 1 nm to 20 microns. The pore units are arranged symmetrically. The arrangement of hole units can also be asymmetric arrangement, periodic arrangement, non-periodic arrangement or random arrangement, and the shape of hole units can also be triangle, square, rectangle, pentagon, hexagon, circle, and other arbitrary definitions The shape is not limited to the arrangement and shape shown in FIG. 4 . The n-type electrode is a line-shaped electrode line, which adopts a straight line layout. The width of the electrode line is 0.001-10 microns, and the thickness is 0.001-10 microns. The electrode line material is aluminum, silver, titanium, nickel, gold, platinum, chromium, or above. An alloy of any two or more metals.

在一些优选的实施例中,二极管单元单元的直径为10纳米;在另一些优选实施例中,二极管单元直径为100纳米。In some preferred embodiments, the diameter of the diode unit is 10 nanometers; in other preferred embodiments, the diameter of the diode unit is 100 nanometers.

如图5所示,一种集成单元二极管芯片还包括第二导电类型层2,量子阱有源区3,第一导电类型层4,反射镜5,保护金属层6,衬底7,背面电极8。其中第二导电类型层2为n-GaN层,第一导电类型层4为p-GaN层。背面电极材料为铝、银、钛、镍、金、铂、铬、锡,或以上任意两种及以上的金属的合金。保护金属层材料为铝、银、钛、镍、金、铂、铬、锡、钨,或以上任意两种及以上的金属的合金。反射镜材料为银、铝、分布式布拉格反射镜。集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光、红光时:单元二极管芯片材料为Alx1Iny1Gaz1N,1≥x1,y1,z1≥0,衬底为平面衬底,衬底材料为蓝宝石。集成单元二极管芯片发光光波为黄光、红光、红外光时,单元二极管芯片材料为Alx2Iny2Gaz2P,1≥x2,y2,z2≥0,Alx3Iny3Gaz3As,1≥x3,y3,z3≥0,Alx4Iny4Gaz4AsuPv,1≥x4,y4,z4,u,v≥0;衬底为平面衬底,衬底材料为磷化铟。As shown in Figure 5, an integrated unit diode chip also includes a second conductivity type layer 2, a quantum well active region 3, a first conductivity type layer 4, a mirror 5, a protective metal layer 6, a substrate 7, and a back electrode 8. Wherein the second conductivity type layer 2 is an n-GaN layer, and the first conductivity type layer 4 is a p-GaN layer. The back electrode material is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, or an alloy of any two or more of the above metals. The material of the protective metal layer is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, tungsten, or an alloy of any two or more of the above metals. Mirror material is silver, aluminum, distributed Bragg reflector. When the light wave of the integrated unit diode chip is UVC, UVB, UVA, violet, blue, green, yellow, and red: the material of the unit diode chip is Al x1 In y1 Ga z1 N, 1≥x1, y1, z1≥0, The substrate is a planar substrate, and the substrate material is sapphire. When the integrated unit diode chip emits yellow light, red light, and infrared light, the material of the unit diode chip is Al x2 In y2 Ga z2 P, 1≥x2, y2, z2≥0, Al x3 In y3 Ga z3 As, 1≥ x3,y3,z3≥0,Al x4 In y4 Ga z4 As u P v ,1≥x4,y4,z4,u,v≥0; the substrate is a planar substrate, and the substrate material is indium phosphide.

由于二极管芯片的电流扩散长度与电流密度的平方根成反比,因此在大电流的注入下,电流的扩散长度更短,导致芯片的电流扩散更加的不均匀,效率更低,散热更加困难。采用集成单元发光二极管结构设计,可以灵活的改变二极管的尺寸、形状,可以获得指定工作电流下最佳的电流扩散和散热性能,并极大的提升芯片的注入电流密度,从而提升单位面积的流明输出。Since the current diffusion length of the diode chip is inversely proportional to the square root of the current density, under the injection of high current, the current diffusion length is shorter, resulting in more uneven current diffusion of the chip, lower efficiency, and more difficult heat dissipation. The integrated unit light-emitting diode structure design can flexibly change the size and shape of the diode, and can obtain the best current diffusion and heat dissipation performance under the specified working current, and greatly improve the injection current density of the chip, thereby increasing the lumen per unit area output.

本发明的实施例提供的集成单元发光二极管,具有以下有益效果:The integrated unit light emitting diode provided by the embodiment of the present invention has the following beneficial effects:

(1)本发明的二极管单元的长度设计控制在电流扩散长度以内,优化的具备一定自由度的几何设计可以更进一步的提升出光效率,可同时解决困扰LED单元二极管芯片设计的n型电极和p型电极电流扩散不均匀的问题,从而得到更高的光电转换效率/流明效率。(1) The length design of the diode unit of the present invention is controlled within the current diffusion length, and the optimized geometric design with a certain degree of freedom can further improve the light extraction efficiency, and can simultaneously solve the n-type electrode and p The problem of non-uniform current diffusion of type electrodes can be obtained, so as to obtain higher photoelectric conversion efficiency/lumen efficiency.

(2)本发明的集成单元二极管芯片的设计,可以实现超均匀的电流注入,因此而获得更高的效率、更好的波长均匀性、发光谱更窄的半高宽、更好的散热均匀性和更好的器件稳定性。(2) The design of the integrated unit diode chip of the present invention can realize ultra-uniform current injection, thereby obtaining higher efficiency, better wavelength uniformity, narrower half-width of emission spectrum, and better heat dissipation uniformity and better device stability.

(3)本发明的集成单元二极管芯片适于UVC、UVA、UVB、紫光、蓝光、绿光、黄光、红光、红外光等各色系的LED产品,可用于LED照明,背光,显示,植物照明,医疗和其他半导体发光器件应用领域。(3) The integrated unit diode chip of the present invention is suitable for LED products of various colors such as UVC, UVA, UVB, purple light, blue light, green light, yellow light, red light, infrared light, etc., and can be used for LED lighting, backlight, display, plant Lighting, medical and other semiconductor light emitting device applications.

以上所述的具体实施例,对本发明的目的,技术方案和有益效果进行了进一步详细说明,所应理解的是,以上所述仅为本发明的具体实施例,并不用于限定本发明的保护范围,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The specific embodiments described above have further described the purpose of the present invention, technical solutions and beneficial effects in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the protection of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims (21)

1.一种集成单元二极管芯片,其特征在于,包括:1. An integrated unit diode chip, characterized in that, comprising: 背面电极,衬底,保护金属层,反射镜,第一导电类型层,量子阱有源区,第二导电类型层,第一导电类型电极,第二导电类型电极,第二导电类型焊盘及n个二极管单元,所述n个二极管单元沿Y轴方向长度小于电流扩散长度,其中,n≥2;所示n个二极管单元包括孔结构;所述第二导电类型电极由线条形电极线组成;所述线条形电极线采用直线布局,部分或全部设计采用非直线布局;所述二极管单元和衬底之间具有反射镜。back electrode, substrate, protective metal layer, mirror, first conductivity type layer, quantum well active region, second conductivity type layer, first conductivity type electrode, second conductivity type electrode, second conductivity type pad and n diode units, the length of the n diode units along the Y-axis direction is less than the current diffusion length, wherein, n≥2; the n diode units shown include a hole structure; the second conductivity type electrode is composed of a linear electrode line ; The line-shaped electrode line adopts a linear layout, and part or all of the design adopts a non-linear layout; there is a mirror between the diode unit and the substrate. 2.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述非直线布局包括折线布局,曲线布局。2. An integrated unit diode chip as claimed in claim 1, wherein the non-linear layout includes a broken line layout and a curved layout. 3.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述孔结构包括1个~1000000个孔单元,所述孔单元直径为0.001微米~20微米。3 . An integrated unit diode chip according to claim 1 , wherein the hole structure comprises 1 to 1,000,000 hole units, and the diameter of the hole units is 0.001 μm to 20 μm. 4.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述反射镜材料为银、铝或分布式布拉格反射镜。4. An integrated unit diode chip as claimed in claim 1, characterized in that the reflector material is silver, aluminum or a distributed Bragg reflector. 5.一种如权利要求1或3所述的集成单元二极管芯片,其特征在于,所述孔单元对称排列,非对称排列,周期性排列,非周期性排列或随机排列。5. An integrated unit diode chip according to claim 1 or 3, characterized in that the hole units are arranged symmetrically, asymmetrically, periodically, non-periodically or randomly. 6.一种如权利要求3所述的集成单元二极管芯片,其特征在于,所述每个二极管单元上含有1个~1000000个孔单元,孔单元形状为三角形、正方形、长方形、五边形、六边形、圆形、以及其他任意定义形状。6. An integrated unit diode chip as claimed in claim 3, wherein each diode unit contains 1 to 1,000,000 hole units, and the shape of the hole units is triangle, square, rectangle, pentagon, Hexagons, circles, and other arbitrarily defined shapes. 7.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述二极管单元的连接方式为并联、串联或设定比例的串并联混合。7. An integrated unit diode chip as claimed in claim 1, characterized in that, the connection mode of the diode units is parallel connection, series connection or a combination of series and parallel connection with a set ratio. 8.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述二极管单元形状为:三角形、正方形、长方形、五边形、六边形、圆形、任意自定义形状。8. An integrated unit diode chip as claimed in claim 1, wherein the shape of the diode unit is: triangle, square, rectangle, pentagon, hexagon, circle, any custom shape. 9.一种如权利要求1或8所述的集成单元二极管芯片,其特征在于,所述二极管单元数量为2个~1000亿个。9. An integrated unit diode chip according to claim 1 or 8, characterized in that the number of said diode units is 2-100 billion. 10.一种如权利要求1或8所述的集成单元二极管芯片,其特征在于,所述二极管单元沿Y轴方向长度为0.001微米~100微米。10. An integrated unit diode chip according to claim 1 or 8, characterized in that, the length of the diode unit along the Y-axis direction is 0.001 μm to 100 μm. 11.一种如权利要求1或9所述的集成单元二极管芯片,其特征在于,所述二极管单元按照均匀对称排列分布。11. An integrated unit diode chip according to claim 1 or 9, characterized in that, the diode units are distributed in a uniform and symmetrical arrangement. 12.一种如权利要求1或9所述的集成单元二极管芯片,其特征在于,所述二极管单元大小不等、不均匀分布设置。12. An integrated unit diode chip according to claim 1 or 9, characterized in that the diode units are of different sizes and arranged in an uneven distribution. 13.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述线条形电极线采用线条形金属和/或氧化铟锡材料;所述线条形金属材料为铝、银、钛、镍、金、铂、铬,或以上任意两种及以上的金属的合金。13. A kind of integrated unit diode chip as claimed in claim 1, is characterized in that, described strip-shaped electrode line adopts strip-shaped metal and/or indium tin oxide material; Described strip-shaped metal material is aluminum, silver, titanium , nickel, gold, platinum, chromium, or alloys of any two or more of the above metals. 14.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述背面电极材料为铝、银、钛、镍、金、铂、铬、锡,或以上任意两种及以上的金属的合金。14. An integrated unit diode chip as claimed in claim 1, wherein the back electrode material is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, or any two or more of the above Alloys of metals. 15.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述保护金属层材料为铝、银、钛、镍、金、铂、铬、锡、钨,或以上任意两种及以上的金属的合金。15. An integrated unit diode chip as claimed in claim 1, wherein the material of the protective metal layer is aluminum, silver, titanium, nickel, gold, platinum, chromium, tin, tungsten, or any two of the above Alloys of metals and above. 16.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述反射镜材料为银、铝、分布式布拉格反射镜。16. An integrated unit diode chip according to claim 1, characterized in that, the material of the reflector is silver, aluminum, or a distributed Bragg reflector. 17.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光、红光或红外光。17. An integrated unit diode chip as claimed in claim 1, characterized in that, the light emitted by the integrated unit diode chip is UVC, UVB, UVA, purple light, blue light, green light, yellow light, red light or infrared light . 18.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述集成单元二极管芯片发光光波为UVC、UVB、UVA、紫光、蓝光、绿光、黄光或红光时发光材料为Alx1Iny1Gaz1N,1≥x1,y1,z1≥0;所述衬底为平面衬底,或图形化衬底;所述衬底材料为蓝宝石、碳化硅、氮化镓、氮化铝、氧化镓或硅。18. A kind of integrated unit diode chip as claimed in claim 1, it is characterized in that, when described integrated unit diode chip emits light wave and is UVC, UVB, UVA, purple light, blue light, green light, yellow light or red light, light emitting material Al x1 In y1 Ga z1 N, 1≥x1, y1, z1≥0; the substrate is a planar substrate, or a patterned substrate; the substrate material is sapphire, silicon carbide, gallium nitride, nitride aluminum oxide, gallium oxide, or silicon. 19.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述单元二极管芯片发光光波为黄光、红光、红外光时发光材料为Alx2Iny2Gaz2P,1≥x2,y2,z2≥0,Alx3Iny3Gaz3As,1≥x3,y3,z3≥0,Alx4Iny4Gaz4AsuPv,1≥x4,y4,z4,u,v≥0;所述衬底为平面衬底,或图形化衬底,衬底材料为磷化铟、砷化镓、蓝宝石或硅。19. An integrated unit diode chip as claimed in claim 1, characterized in that, when the unit diode chip emits light waves of yellow light, red light, and infrared light, the luminescent material is Al x2 In y2 Ga z2 P, 1≥ x2,y2,z2≥0,Al x3 In y3 Ga z3 As,1≥x3,y3,z3≥0,Al x4 In y4 Ga z4 As u P v ,1≥x4,y4,z4,u,v≥0 ; The substrate is a planar substrate, or a patterned substrate, and the substrate material is indium phosphide, gallium arsenide, sapphire or silicon. 20.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述集成单元二极管芯片尺寸为0.1微米×0.1微米至100000微米×100000微米。20. An integrated unit diode chip according to claim 1, characterized in that the size of the integrated unit diode chip is 0.1 micron×0.1 micron to 100000 micron×100000 micron. 21.一种如权利要求1所述的集成单元二极管芯片,其特征在于,所述集成单元二极管芯片的功率为0.0001W~1000W。21. An integrated unit diode chip according to claim 1, wherein the power of the integrated unit diode chip is 0.0001W˜1000W.
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