Low-cost MOSFET module
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a low-cost MOSFET module.
Background
MOSFETs are often used in motor controller applications in multiple single tube parallel or MOSFET module schemes to achieve greater power output. The single-tube parallel scheme is that a plurality of single-tube MOSFETs are connected in parallel to improve the overcurrent capacity of the designed product. Different single tubes may be different batches, so that the electrical characteristics are different, the failure rate of MOSFET devices can be increased in parallel use, the development difficulty and cost of products and the development period of the products are increased, and the production cost and the production period of the products are increased. The single-tube parallel scheme has the defects of high thermal resistance, poor electrical characteristics due to inconsistent single-tube characteristics, multiple mounting procedures, and the like, although the cost is low. These drawbacks are often solved using MOSFET modules, which are however relatively costly. The MOSFET modularization scheme is characterized in that wafers of a plurality of MOSFETs are packaged together in parallel, and pins with the same electrical characteristics are led out, so that the overcurrent capacity of a product is improved, and the difficulty of application and development is reduced. The development of the MOSFET module needs to open a die, so that the product development period is long and the development cost is high in initial development. The MOSFET module can not be changed once being shaped, has poor flexibility, and needs to be redeveloped if new requirements exist. Under the background, a novel low-cost MOSFET module solution is provided, so that the problems of high single-tube parallel thermal resistance, multiple procedures, poor electrical characteristics and the like can be solved, and the advantages of the MOSFET module can be possessed.
Disclosure of Invention
The invention aims to solve the problem of MOSFET application in a high-current scene, and provides a low-cost MOSFET module.
The technical scheme of the invention is that the low-cost MOSFET module comprises an MOSFET wafer, an MOSFET substrate and binding wires;
The MOSFET chip is fixedly connected with the MOSFET substrate through the bonding wire, and the MOSFET chip is in communication connection with the MOSFET substrate.
Further, the MOSFET die includes a first upper bridge die, a second upper bridge die, a first lower bridge die, and a second lower bridge die;
the first upper bridge wafer, the second upper bridge wafer, the first lower bridge wafer and the second lower bridge wafer have the same structure and comprise MOSFET drain electrodes, MOSFET source electrodes and MOSFET gate electrodes, the first upper bridge wafer and the second upper bridge wafer form an upper bridge arm of the MOSFET module, and the first lower bridge wafer and the second lower bridge wafer form a lower bridge arm of the MOSFET module.
Further, the MOSFET substrate comprises a conductive material layer, an insulating heat-insulating material layer and a heat-dissipating material layer which are fixedly connected in sequence from top to bottom;
the conductive material layer and the insulating heat-insulating material layer are fixedly connected in an adhesive mode.
Further, the conductive material layer comprises a bus positive electrode end, an upper bridge gate electrode control signal end, a phase line signal output end, a lower bridge source electrode control signal output end, a lower bridge gate electrode control signal end, a phase line power output end and a bus negative electrode end which are sequentially arranged.
Further, the MOSFET drain electrode of the first upper bridge wafer and the MOSFET drain electrode of the second upper bridge wafer are fixedly connected with the positive end of the bus through welding, the first upper bridge wafer and the second upper bridge wafer are in communication connection with the positive end of the bus, the MOSFET drain electrode of the first lower bridge wafer and the MOSFET drain electrode of the second lower bridge wafer are fixedly connected with the phase line power output end through welding, and the first lower bridge wafer and the second lower bridge wafer are in communication connection with the phase line power output end.
Further, the MOSFET source of the first upper bridge wafer and the MOSFET source of the second upper bridge wafer are both in communication connection with the phase line signal output end and the phase line power output end through binding wires, and the MOSFET source of the first lower bridge wafer and the MOSFET source of the second lower bridge wafer are both in communication connection with the negative electrode end of the bus through binding wires.
Further, the MOSFET gate electrode of the first upper bridge wafer and the MOSFET gate electrode of the second upper bridge wafer are both in communication connection with the upper bridge gate control signal end through binding lines, and the MOSFET gate electrode of the first lower bridge wafer and the MOSFET gate electrode of the second lower bridge wafer are both in communication connection with the lower bridge gate control signal end through binding lines.
Further, the low cost MOSFET module further comprises an encapsulation material, and the MOSFET wafer and the binding wires are encapsulated by the encapsulation material.
The beneficial effects of the invention are as follows:
(1) The wafer consistency is good, the electrical characteristics of the packaged module are good, and the method has the advantages of short product development period, low development cost and flexible development.
(2) The device has the advantages of small volume, low stray inductance and low cost, and saves most of packaging cost, such as a die, a MOSFET frame, plastic packaging materials and the like.
(3) Low thermal resistance, the chip is directly attached to the substrate, reducing the number of intermediate layers such as frames.
(4) Multiple-scene and flexible application occasions can be laid out differently according to requirements. And the mold opening is not needed, and the development period is short.
Drawings
Fig. 1 is an internal structural view of a MOSFET module;
Fig. 2 (a) is a front view structural diagram of a MOSFET module;
fig. 2 (b) is a rear structure diagram of the MOSFET module;
Fig. 3 is a structural diagram of a MOSFET substrate;
Fig. 4 is a packaging structure diagram of a MOSFET module;
Fig. 5 is a diagram showing an arrangement structure of conductor materials of a MOSFET module;
In the figure, 1, a MOSFET wafer, 1-1, a first upper bridge wafer, 1-2, a second upper bridge wafer, 1-3, a first lower bridge wafer, 1-4, a second lower bridge wafer, 2, a MOSFET drain electrode, 3, a MOSFET source electrode, 4, a MOSFET gate electrode, 5, a packaging material, 6, a conductive material layer, 6-1, a bus positive electrode terminal, 6-2, an upper bridge gate electrode control signal terminal, 6-3, a phase line signal output terminal, 6-4, a lower bridge source electrode control signal output terminal, 6-5, a lower bridge gate electrode control signal terminal, 6-6, a phase line power output terminal, 6-7, a bus negative electrode terminal, 7, an insulating heat insulation material layer, 8, a heat dissipation material layer, 9, a binding line, 11 and a MOSFET substrate.
Detailed Description
Embodiments of the present invention are further described below with reference to the accompanying drawings.
As shown in fig. 1, the present invention provides a low cost MOSFET module comprising a MOSFET die 1, a MOSFET substrate 11, and bond wires 9;
The MOSFET die 1 is fixedly connected to the MOSFET substrate 11 by bonding wires 9, and the MOSFET die 1 is communicatively connected to the MOSFET substrate 11.
In the embodiment of the invention, as shown in FIG. 1, a MOSFET wafer 1 comprises a first upper bridge wafer 1-1, a second upper bridge wafer 1-2, a first lower bridge wafer 1-3 and a second lower bridge wafer 1-4;
The first upper bridge wafer 1-1, the second upper bridge wafer 1-2, the first lower bridge wafer 1-3 and the second lower bridge wafer 1-4 have the same structure, and as shown in fig. 2, each comprises a MOSFET drain electrode 2, a MOSFET source electrode 3 and a MOSFET gate electrode 4, wherein the first upper bridge wafer 1-1 and the second upper bridge wafer 1-2 form an upper bridge arm of the MOSFET module, and the first lower bridge wafer 1-3 and the second lower bridge wafer 1-4 form a lower bridge arm of the MOSFET module.
In the embodiment of the invention, the number of the upper bridge wafers and the lower bridge wafers can be determined according to actual conditions.
In the embodiment of the present invention, as shown in fig. 3, the MOSFET substrate 11 includes a conductive material layer 6, an insulating and heat-insulating material layer 7, and a heat-dissipating material layer 8 fixedly connected in this order from top to bottom;
the conductive material layer 6 and the insulating and heat insulating material layer 7 are fixedly connected through bonding between the insulating and heat insulating material layer 7 and the heat radiating material layer 8.
In the embodiment of the invention, as shown in fig. 1, the conductive material layer 6 includes a bus positive terminal 6-1, an upper bridge gate control signal terminal 6-2, a phase line signal output terminal 6-3, a lower bridge source control signal output terminal 6-4, a lower bridge gate control signal terminal 6-5, a phase line power output terminal 6-6 and a bus negative terminal 6-7.
In the embodiment of the invention, as shown in fig. 1, a MOSFET drain 2 of a first upper bridge wafer 1-1 and a MOSFET drain 2 of a second upper bridge wafer 1-2 are fixedly connected with a bus positive terminal 6-1 by welding, the first upper bridge wafer 1-1 and the second upper bridge wafer 1-2 are both in communication connection with the bus positive terminal 6-1, a MOSFET drain 2 of a first lower bridge wafer 1-3 and a MOSFET drain 2 of a second lower bridge wafer 1-4 are both fixedly connected with a phase line power output terminal 6-6 by welding, and the first lower bridge wafer 1-3 and the second lower bridge wafer 1-4 are both in communication connection with the phase line power output terminal 6-6.
In the embodiment of the invention, as shown in fig. 1, a MOSFET source 3 of a first upper bridge wafer 1-1 and a MOSFET source 3 of a second upper bridge wafer 1-2 are both in communication connection with a phase line signal output end 6-3 and a phase line power output end 6-6 through a binding line 9, and a MOSFET source 3 of a first lower bridge wafer 1-3 and a MOSFET source 3 of a second lower bridge wafer 1-4 are both in communication connection with a bus negative end 6-7 through a binding line 9.
In the embodiment of the invention, as shown in fig. 1, the MOSFET gate 4 of the first upper bridge chip 1-1 and the MOSFET gate 4 of the second upper bridge chip 1-2 are both in communication connection with the upper bridge gate control signal terminal 6-2 through a bonding wire 9, and the MOSFET gate 4 of the first lower bridge chip 1-3 and the MOSFET gate 4 of the second lower bridge chip 1-4 are both in communication connection with the lower bridge gate control signal terminal 6-5 through the bonding wire 9.
In an embodiment of the present invention, as shown in fig. 4, the low cost MOSFET module further includes an encapsulation material 5, and the MOSFET die 1 and the bonding wires 9 are encapsulated by the encapsulation material 5.
The working principle and the working process of the invention are that in the application and development, the low-cost MOSFET module is subjected to insulation treatment, so that the module can be directly welded or pressed on a radiator. The upper bridge gate control signal end 6-2, the phase line signal output end 6-3, the lower bridge source control signal output end 6-4 and the lower bridge gate control signal end 6-5 can be welded or crimped with conductors to connect driving signals, and the phase line power output end 6-6, the bus negative electrode end 6-7 and the bus positive electrode end 6-1 can be welded or crimped with conductors to connect power wires. The bond wire 9 has no electrical connection relationship elsewhere than at the bond wire bond point.
Meanwhile, the shapes of the modules and the shapes of the conductor materials can be changed according to specific application occasions, and the parallel connection of the wafers is not limited to 2 and can be multiple.
As shown in fig. 5, there is another arrangement of conductor materials (not limited to the two types that appear). The leading-out directions of signals and power are different from those of fig. 4, and the method is suitable for different application scenes.
The beneficial effects of the invention are as follows:
(1) The wafer consistency is good, the electrical characteristics of the packaged module are good, and the method has the advantages of short product development period, low development cost and flexible development.
(2) The device has the advantages of small volume, low stray inductance and low cost, and saves most of packaging cost, such as a die, a MOSFET frame, plastic packaging materials and the like.
(3) Low thermal resistance, the chip is directly attached to the substrate, reducing the number of intermediate layers such as frames.
(4) Multiple-scene and flexible application occasions can be laid out differently according to requirements. And the mold opening is not needed, and the development period is short.
Those of ordinary skill in the art will recognize that the embodiments described herein are for the purpose of aiding the reader in understanding the principles of the present invention and should be understood that the scope of the invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific modifications and combinations from the teachings of the present disclosure without departing from the spirit thereof, and such modifications and combinations remain within the scope of the present disclosure.