[go: up one dir, main page]

CN111865243B - A variable gain amplifier suitable for biomedical signal acquisition analog front end - Google Patents

A variable gain amplifier suitable for biomedical signal acquisition analog front end Download PDF

Info

Publication number
CN111865243B
CN111865243B CN202010832877.2A CN202010832877A CN111865243B CN 111865243 B CN111865243 B CN 111865243B CN 202010832877 A CN202010832877 A CN 202010832877A CN 111865243 B CN111865243 B CN 111865243B
Authority
CN
China
Prior art keywords
pmos tube
tube
pmos
source
nmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010832877.2A
Other languages
Chinese (zh)
Other versions
CN111865243A (en
Inventor
岳宏卫
肖鑫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guilin University of Electronic Technology
Original Assignee
Guilin University of Electronic Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guilin University of Electronic Technology filed Critical Guilin University of Electronic Technology
Priority to CN202010832877.2A priority Critical patent/CN111865243B/en
Publication of CN111865243A publication Critical patent/CN111865243A/en
Application granted granted Critical
Publication of CN111865243B publication Critical patent/CN111865243B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3005—Automatic control in amplifiers having semiconductor devices in amplifiers suitable for low-frequencies, e.g. audio amplifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Amplifiers (AREA)

Abstract

本发明公开一种适用于生物医学信号采集模拟前端的可变增益放大器，包括电容C1、C2，NMOS管M1、M2、M5、M6，PMOS管M3、M4、MFB1、MFB2、MFB3、MFB4，电阻Rcm1、Rcm2、Rs，电流源IL1、IL2，以及跨导放大器A1、A2。NMOS管M1、M2作为输入管，PMOS管M3、M4作为有源负载，电阻Rcm不仅为电路输出共模电压Vcm，而且也同时调整PMOS管M3、M4的栅极电压和输出电压Vout，PMOS管MFB1、MFB2以及跨导放大器A1将输出电压转换为小信号电流输出并与NMOS管M5、M6的栅极相连，形成负反馈网络。本发明能够实现较高的环路增益和低的总谐波失真，拥有较好的线性度，在输入信号幅度0～30mV范围内，最大输入信号幅度对应的总谐波失真不大于0.5％。

The invention discloses a variable gain amplifier suitable for a biomedical signal acquisition analog front end, comprising capacitors C1 and C2, NMOS tubes M1, M2, M5 and M6, PMOS tubes M3, M4, M FB1 , M FB2 , M FB3 and M FB4 , resistors R cm1 , R cm2 and Rs, current sources IL1 and IL2 , and transconductance amplifiers A1 and A2. The NMOS tubes M1 and M2 are used as input tubes, the PMOS tubes M3 and M4 are used as active loads, the resistor Rcm not only outputs a common mode voltage Vcm for the circuit, but also adjusts the gate voltage and output voltage Vout of the PMOS tubes M3 and M4 at the same time, the PMOS tubes MFB1 and MFB2 and the transconductance amplifier A1 convert the output voltage into a small signal current output and are connected to the gates of the NMOS tubes M5 and M6 to form a negative feedback network. The present invention can achieve higher loop gain and lower total harmonic distortion, and has better linearity. Within the range of input signal amplitude of 0 to 30 mV, the total harmonic distortion corresponding to the maximum input signal amplitude is no more than 0.5%.

Description

Variable gain amplifier suitable for biomedical signal acquisition analog front end
Technical Field
The invention relates to the technical field of integrated circuit design, in particular to a variable gain amplifier suitable for a biomedical signal acquisition analog front end.
Background
With the development of microelectronic technology, medical devices are rapidly evolving toward portability. How to effectively extract biomedical signals is an important point and difficulty in the research of portable equipment. The basic structure of the biomedical signal acquisition analog front end is shown in figure 1. The ac-coupled capacitive feedback amplifier amplifies and filters the signal obtained from the sensor while suppressing baseline wander. Considering that biomedical signals are low-frequency and low-amplitude signals, a low cut-off point needs to be arranged at a lower frequency point (0.5 Hz), in order to achieve a large time constant, a pseudo-resistance structure Rpseu is adopted in the analog front end, an MOS tube in the pseudo-resistance structure works in a subthreshold region, and the resistance value of the pseudo-resistance can reach more than 10 12 omega. The biomedical signal is amplified by an OTA amplifier and then enters a Variable gain amplifier (Variable GAIN AMPLIFIER, VGA), the Variable gain amplifier changes the gain according to the amplitude of the input signal so as to keep a quite constant output voltage range, the signal is amplified by the gain and then is sent to a Buffer amplifier for amplification, then the analog signal is converted into a digital signal by an ADC (analog-to-digital converter), and the digital signal is output by a series of DSPs (digital signal processing and computing) to obtain the required biomedical signal.
In the analog front end, the variable gain amplifier plays a role of changing gain, stabilizing output signals and ensuring the requirements of large bandwidth, low power consumption and high linearity of the circuit. As shown in fig. 2 (a) and (b), a variable gain amplifier with a source negative feedback Rs is widely used at present, and both of the variable gain amplifiers can change the gain by changing the resistance of Rs. But since the loop gain of both variable gain amplifiers is relatively low, the linearity of both variable gain amplifiers is low.
Disclosure of Invention
The invention aims to solve the problem that the linearity and loop gain of the existing variable gain amplifier are low, and provides a variable gain amplifier suitable for the biomedical signal acquisition analog front end.
In order to solve the problems, the invention is realized by the following technical scheme:
A variable gain amplifier suitable for biomedical signal acquisition analog front end comprises capacitors C1 and C2, NMOS transistors M1, M2, M5 and M6, PMOS transistors M3, M4 and M FB1、MFB2、MFB3、MFB4, resistors R cm1、Rcm2 and Rs, a current source I L1、IL2, a transconductance amplifier A1, A2. The grid electrode of the NMOS tube M1 forms a positive input end V in+ of the variable gain amplifier, the source electrode of the NMOS tube M1 and one end of a resistor Rs are connected with the drain electrode of the NMOS tube M5, and the drain electrode of the NMOS tube M1, the drain electrode of the PMOS tube M3, one end of a resistor R cm1, the grid electrode of the PMOS tube M FB1 and one end of a capacitor C 1 are connected to form a positive output end V out+ of the variable gain amplifier. The grid electrode of the PMOS tube M2 forms a negative input end V in -of the variable gain amplifier, the source electrode of the PMOS tube M2 and the other end of the resistor Rs are connected with the drain electrode of the NMOS tube M6, and the drain electrode of the PMOS tube M2, the drain electrode of the PMOS tube M4, one end of the resistor R cm2, the grid electrode of the PMOS tube M FB2 and one end of the capacitor C 2 are connected to form a negative output end V out -of the variable gain amplifier. The positive input end of the transconductance amplifier A1 and the positive input end of the transconductance amplifier A2 are connected with a voltage VB, the drain electrode of the PMOS tube M FB1, the source electrode of the PMOS tube M FB3 are connected with the negative input end of the transconductance amplifier A1, the drain electrode of the PMOS tube M FB2, The source of the PMOS tube M FB4 is connected with the negative input end of the transconductance amplifier A2, the grid of the PMOS tube M FB3 is connected with the output end of the transconductance amplifier A1, and the grid of the PMOS tube M FB4 is connected with the output end of the transconductance amplifier A2. The grid electrode of the PMOS tube M3, the grid electrode of the PMOS tube M4, one end of the resistor R cm1 and one end of the resistor R cm2 are connected, the drain electrode of the PMOS tube M FB3, the grid electrode of the NMOS tube M5 and one end of the current source I L1 are connected, the drain electrode of the PMOS tube M FB4, The gate of the NMOS tube M6 is connected with one end of the current source I L2. The source of the PMOS tube M3, the source of the PMOS tube M4, the source of the MOS tube M FB1 and the source of the PMOS tube M FB2 are connected with the power supply voltage VDD, the source of the NMOS tube M5, the source of the NMOS tube M6 and the other end of the capacitor C 1, the other end of C 2, the other end of current source I L1, and the other end of current source I L2 are grounded.
In the above scheme, the types of the capacitors C 1 and C 2 are the same, the types of the resistors R cm1 and R cm2 are the same, the types of the NMOS transistors M1 and M2 are the same, the types of the NMOS transistors M5 and M6 are the same, the types of the PMOS transistors M3 and M4 are the same, the types of the PMOS transistors M FB1 and M FB2 are the same, the types of the PMOS transistors M FB3 and M FB4 are the same, and the types of the current sources I L1 and I L2 are the same.
In the above scheme, the transconductance amplifier A1 and the transconductance amplifier A2 have the same structure, and each transconductance amplifier includes NMOS transistors M9, M10, M11, and M12, PMOS transistors M7, M8, M13, M14, M15, and M16, and a current source I L3. The grid electrode of the PMOS tube M7 forms the positive input end V in+ of the transconductance amplifier, and the grid electrode of the PMOS tube M8 forms the negative input end V in- of the transconductance amplifier to be connected. The drain electrode of the PMOS tube M7 and the grid electrode of the NMOS tube M10 are connected with the drain electrode and the grid electrode of the NMOS tube M9, and the drain electrode of the PMOS tube M8 and the grid electrode of the NMOS tube M11 are connected with the drain electrode and the grid electrode of the NMOS tube M12. The source electrode of the PMOS tube M7 is connected with the substrate, the source electrode of the PMOS tube M8 is connected with the substrate and the drain electrode of the PMOS tube M16, and the drain electrode of the NMOS tube M12 is connected with the drain electrode of the PMOS tube to form the output end V out of the transconductance amplifier. The drain electrode of the NMOS tube M9 and the drain electrode of the PMOS tube M13 are connected with the grid electrode and the grid electrode of the PMOS tube M14, and the grid electrode of the PMOS tube M16 and the grid electrode of the PMOS tube M15 are connected with the drain electrode and one end of the current source I L3. The source of the PMOS tube M13, the source of the PMOS tube M14, the source of the PMOS tube M15 and the source of the PMOS tube M16 are connected with a power supply voltage V DD. The source of NMOS tube M9, the source of NMOS tube M10, the source of NMOS tube M11, the source of NMOS tube M12 and the other end of current source I L3 are grounded.
In the above scheme, the models of the PMOS transistors M7 and M8 are the same, the models of the PMOS transistors M13 and M14 are the same, the models of the PMOS transistors M15 and M16 are the same, and the models of the NMOS transistors M9, M10, M11 and M12 are the same.
Compared with the prior art, the variable gain amplifier can realize higher loop gain and low total harmonic distortion, has better linearity, and has the total harmonic distortion corresponding to the maximum input signal amplitude of not more than 0.5% within the range of 0-30 mV of the input signal amplitude.
Drawings
FIG. 1 is a basic block diagram of an analog front end for biomedical signal acquisition;
FIGS. 2 (a) and (b) are schematic circuit diagrams of two prior art variable gain amplifiers;
FIG. 3 is a schematic circuit diagram of a variable gain amplifier of the present invention adapted for use in a biomedical signal acquisition analog front end;
FIG. 4 is a schematic circuit diagram of the transconductance amplifiers A1, A2 of FIG. 3;
FIG. 5 is a graph comparing total harmonic distortion curves;
Fig. 6 is a graph comparing the results of the dual frequency test.
Detailed Description
The invention will be further described in detail below with reference to specific examples and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the invention more apparent.
The whole circuit structure of the variable gain amplifier suitable for the biomedical signal acquisition analog front end is shown in figure 3, and the circuit comprises capacitors C1 and C2, NMOS tubes M1, M2, M5 and M6, PMOS tubes M3, M4 and M FB1、MFB2、MFB3、MFB4, resistors R cm1、Rcm2 and Rs, a current source I L1、IL2, a transconductance amplifier A1, A2. The gate of NMOS tube M1 forms the positive input V in+ of the variable gain amplifier. The source of NMOS tube M1, one end of resistor Rs is connected with the drain of NMOS tube M5. the drain electrode of the NMOS tube M1, the drain electrode of the PMOS tube M3, one end of the resistor R cm1, the grid electrode of the PMOS tube M FB1 and one end of the capacitor C 1 are connected to form a positive output end V out+ of the variable gain amplifier. The gate of the PMOS tube M2 forms the negative input end V in -of the variable gain amplifier. The source electrode of the PMOS tube M2 and the other end of the resistor Rs are connected with the drain electrode of the NMOS tube M6. The drain electrode of the PMOS tube M2, the drain electrode of the PMOS tube M4, one end of the resistor R cm2, the grid electrode of the PMOS tube M FB2 and one end of the capacitor C 2 are connected to form a negative output end V out -of the variable gain amplifier. The positive input of the transconductance amplifier A1 and the positive input of the transconductance amplifier A2 are connected to the voltage VB. The drain of the PMOS tube M FB1 and the source of the PMOS tube M FB3 are connected with the negative input end of the transconductance amplifier A1. The drain of the PMOS tube M FB2 and the source of the PMOS tube M FB4 are connected with the negative input end of the transconductance amplifier A2. the grid of the PMOS tube M FB3 is connected with the output end of the transconductance amplifier A1. The grid of the PMOS tube M FB4 is connected with the output end of the transconductance amplifier A2. The grid electrode of the PMOS tube M3, the grid electrode of the PMOS tube M4, one end of the resistor R cm1 and one end of the resistor R cm2 are connected. The drain of the PMOS tube M FB3, the gate of the NMOS tube M5 and one end of the current source I L1 are connected. The drain of the PMOS tube M FB4, the gate of the NMOS tube M6 and one end of the current source I L2 are connected. The source of the PMOS tube M3, the source of the PMOS tube M4, the source of the MOS tube M FB1 and the source of the PMOS tube M FB2 are connected with the power supply voltage VDD. The source of NMOS tube M5, the source of NMOS tube M6, the other end of capacitor C 1, the other end of C 2, the other end of current source I L1 and the other end of current source I L2 are grounded. The capacitors C 1 and C 2 are the same in model, the resistors R cm1 and R cm2 are the same in model, the NMOS transistors M1 and M2 are the same in model, the NMOS transistors M5 and M6 are the same in model, the PMOS transistors M3 and M4 are the same in model, the PMOS transistors M FB1 and M FB2 are the same in model, the PMOS transistors M FB3 and M FB4 are the same in model, and the current sources I L1 and I L2 are the same in model.
The transconductance amplifiers A1 and A2 have the same structure, and the circuit structure is shown in FIG. 4, and the circuit comprises NMOS tubes M9, M10, M11 and M12, PMOS tubes M7, M8, M13, M14, M15 and M16 and a current source I L3. The gate of the PMOS tube M7 forms the positive input end V in+ -of the transconductance amplifier. The grid electrode of the PMOS tube M8 is connected with the negative input end V in- of the transconductance amplifier. The drain electrode of the PMOS tube M7 and the grid electrode of the NMOS tube M10 are connected with the drain electrode and the grid electrode of the NMOS tube M9. The drain electrode of the PMOS tube M8 and the grid electrode of the NMOS tube M11 are connected with the drain electrode and the grid electrode of the NMOS tube M12. The source electrode of the PMOS tube M7 is connected with the substrate, and the source electrode of the PMOS tube M8 is connected with the substrate and the drain electrode of the PMOS tube M16. The drain electrode of the NMOS tube M12 is connected with the drain electrode of the PMOS tube to form an output end V out of the transconductance amplifier. The drain electrode of the NMOS tube M9 and the drain electrode of the PMOS tube M13 are connected with the grid electrode and the grid electrode of the PMOS tube M14. The grid electrode of the PMOS tube M16 and the grid electrode of the PMOS tube M15 are connected with the drain electrode and one end of the current source I L3. The source of the PMOS tube M13, the source of the PMOS tube M14, the source of the PMOS tube M15 and the source of the PMOS tube M16 are connected with a power supply voltage V DD. The source of NMOS tube M9, the source of NMOS tube M10, the source of NMOS tube M11, the source of NMOS tube M12 and the other end of current source I L3 are grounded. The models of the PMOS pipes M7 and M8 are the same, the models of the PMOS pipes M13 and M14 are the same, the models of the PMOS pipes M15 and M16 are the same, and the models of the NMOS pipes M9, M10, M11 and M12 are the same.
The variable gain amplifier shown in fig. 2 (a) can change the gain of the amplifier by adjusting the resistance value of the negative feedback resistor Rs. As can be seen from equation (1), the negative feedback resistor Rs not only increases the loop gain of the amplifier to gm 1,2 Rs, but also increases the linearity of the amplifier.
The source of the variable gain amplifier shown in fig. 2 (a) is connected to two tail power sources I L to reduce the difference between the dc voltages across the resistor Rs. However, this circuit configuration has some problems in that the noise of the circuit will be higher than that without the negative feedback resistor Rs. Because there is no negative feedback resistor Rs, the noise of the tail power supplies I L is output as a common mode signal, while there is a negative feedback resistor Rs, each tail power supply generates some noise. The impedances looking into the M1 source and the degeneration resistor Rs from the tail power supply I L are 1/gm1,2 and Rs+1/gm1,2, respectively, so the output reference current noise is equal to:
The variable gain amplifier shown in fig. 2 (b) is designed in such a way that the loop gain is increased by adding an additional feedback path through the negative feedback resistor Rs. The grid electrode of the PMOS tube MFB is connected with the output, and small signal current is fed back to the sources of the input tubes M1 and M2, and the loop gain is as follows:
Because of the addition of negative feedback, the variable gain amplifier of fig. 2 (b) has a lower common mode impedance than the variable gain amplifier of fig. 2 (a), and therefore, no additional common mode feedback loop is required. However, because the PMOS tube MFB is added, the circuit noise is increased slightly compared with the prior art. Since the operating point of the transistor changes with the change of the input signal, the distortion of the output signal increases with the increase of the amplitude of the input signal. As the amplitude of the input signal increases, so does the total harmonic distortion. Since the loop gain of the variable gain amplifier of fig. 2 (a) is low, the linearity is not good for the variable gain amplifier of fig. 2 (b), and the total harmonic distortion is higher than that of the variable gain amplifier of fig. 2 (b).
In the variable gain amplifier structure of the present invention, the NMOS transistors M1 and M2 are used as input transistors, the PMOS transistors M3 and M4 are used as active loads, the resistor Rcm is not only the circuit output common mode voltage Vcm, but also the gate voltages and the output voltages Vout of the PMOS transistors M3 and M4 are adjusted simultaneously, the PMOS transistors MFB1 and MFB2 and the transconductance amplifier A1 convert the output voltages into small signal currents to be output and connected with the gates of the NMOS transistors M5 and M6, so as to form a negative feedback network, and the loop gain is:
LG=A1·(gmro)1(gmro)FB1(gmro)FB2(gmro)5 (4)
From equation (4), it can be seen that the loop gain of the present invention is increased by A1 times, which is much higher than the two variable gain amplifiers of fig. 2. Since the loop gain of the present invention is much larger than that of fig. 2 (b), the distortion of the circuit will be reduced as shown in equation (5):
Simulation of the design environment using CADENCE SPECTRE and TSMC 0.18um for simulation of technical parameters verifies the feasibility of the invention.
Fig. 5 is a graph comparing the total harmonic distortion curves of the variable gain amplifier of the present invention and the conventional variable gain amplifier shown in fig. 2 (a) and (b). In the range of 0-30 mV of input signal amplitude, the total harmonic distortion of the variable gain amplifier is only 0.44% under the maximum signal amplitude, and the total harmonic distortion of the variable gain amplifier in fig. 2 (a) and (b) under the maximum signal amplitude is 4.6% and 2.8%, respectively. For the biomedical signal acquisition analog front end with high sensitivity, the total harmonic distortion corresponding to the maximum input signal amplitude is less than 2.5%. It is apparent that the linearity of conventional variable gain amplifiers does not meet the requirements of biomedical signal acquisition analog front ends. The variable gain amplifier can realize higher loop gain and low total harmonic distortion, has better linearity, and has the total harmonic distortion corresponding to the maximum input signal amplitude of not more than 0.5% within the range of 0-30 mV of the input signal amplitude.
Fig. 6 is a graph comparing the results of the dual frequency test of the variable gain amplifier of the present invention and the conventional variable gain amplifier shown in fig. 2 (b). The input signals were 9.5kHz and 10.5kHz, respectively, and at a frequency of 11.5kHz, it can be seen that the third order harmonic distortion of the variable gain amplifier of the present invention was reduced by 14dB relative to the variable gain amplifier of fig. 2 (b).
It should be noted that, although the examples described above are illustrative, this is not a limitation of the present invention, and thus the present invention is not limited to the above-described specific embodiments. Other embodiments, which are apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein, are considered to be within the scope of the invention as claimed.

Claims (4)

1.一种适用于生物医学信号采集模拟前端的可变增益放大器，其特征是，包括电容C 1、C 2，NMOS管M1、M2、M5、M6，PMOS管M3、M4、MFB1、MFB2、MFB3、MFB4，电阻R cm1、R cm2、Rs，电流源I L1、I L2，以及跨导放大器A1、A2；1. A variable gain amplifier suitable for biomedical signal acquisition analog front end, characterized in that it includes capacitors C1 , C2 , NMOS tubes M1, M2, M5, M6, PMOS tubes M3, M4, MFB1 , MFB2 , MFB3 , MFB4 , resistors Rcm1 , Rcm2 , Rs , current sources IL1 , IL2 , and transconductance amplifiers A1 , A2 ; NMOS管M1的栅极形成可变增益放大器的正输入端V in+；NMOS管M1的源极、电阻Rs的一端和NMOS管M5的漏极相连；NMOS管M1的漏极、PMOS管M3的漏极、电阻R cm1的一端、PMOS管MFB1的栅极和电容C 1的一端相连后形成可变增益放大器的正输出端V out+；The gate of the NMOS tube M1 forms the positive input terminal V in+ of the variable gain amplifier; the source of the NMOS tube M1, one end of the resistor R s and the drain of the NMOS tube M5 are connected; the drain of the NMOS tube M1, the drain of the PMOS tube M3, one end of the resistor R cm1 , the gate of the PMOS tube M FB1 and one end of the capacitor C 1 are connected to form the positive output terminal V out+ of the variable gain amplifier; PMOS管M2的栅极形成可变增益放大器的负输入端V in-；PMOS管M2的源极、电阻Rs的另一端和NMOS管M6的漏极相连；PMOS管M2的漏极、PMOS管M4的漏极、电阻R cm2的一端、PMOS管MFB2的栅极和电容C 2的一端相连后形成可变增益放大器的负输出端V out-；The gate of the PMOS tube M2 forms the negative input terminal V in- of the variable gain amplifier; the source of the PMOS tube M2, the other end of the resistor R s and the drain of the NMOS tube M6 are connected; the drain of the PMOS tube M2, the drain of the PMOS tube M4, one end of the resistor R cm2 , the gate of the PMOS tube M FB2 and one end of the capacitor C 2 are connected to form the negative output terminal V out- of the variable gain amplifier; 跨导放大器A1的正输入端和跨导放大器A2的正输入端接电压VB；PMOS管MFB1的漏极、PMOS管MFB3的源极与跨导放大器A1的负输入端相连；PMOS管MFB2的漏极、PMOS管MFB4的源极与跨导放大器A2的负输入端相连；PMOS管MFB3的栅极与跨导放大器A1的输出端相连；PMOS管MFB4的栅极与跨导放大器A2的输出端相连；The positive input terminal of the transconductance amplifier A1 and the positive input terminal of the transconductance amplifier A2 are connected to the voltage VB; the drain of the PMOS tube M FB1 and the source of the PMOS tube M FB3 are connected to the negative input terminal of the transconductance amplifier A1; the drain of the PMOS tube M FB2 and the source of the PMOS tube M FB4 are connected to the negative input terminal of the transconductance amplifier A2; the gate of the PMOS tube M FB3 is connected to the output terminal of the transconductance amplifier A1; the gate of the PMOS tube M FB4 is connected to the output terminal of the transconductance amplifier A2; PMOS管M3的栅极、PMOS管M4的栅极、电阻Rcm1的一端和电阻Rcm2的一端相连；PMOS管MFB3的漏极、NMOS管M5的栅极和电流源I L1的一端相连；PMOS管MFB4的漏极、NMOS管M6的栅极和电流源I L2的一端和相连；The gate of the PMOS tube M3, the gate of the PMOS tube M4, one end of the resistor R cm1 and one end of the resistor R cm2 are connected; the drain of the PMOS tube M FB3 , the gate of the NMOS tube M5 and one end of the current source IL1 are connected; the drain of the PMOS tube M FB4 , the gate of the NMOS tube M6 and one end of the current source IL2 are connected; PMOS管M3的源极、PMOS管M4的源极、MOS管MFB1的源极和PMOS管MFB2的源极接电源电压VDD；NMOS管M5的源极、NMOS管M6的源极、电容C 1的另一端、电容C 2的另一端、电流源I L1的另一端和电流源I L2的另一端接地。The source of the PMOS tube M3, the source of the PMOS tube M4, the source of the MOS tube M FB1 and the source of the PMOS tube M FB2 are connected to the power supply voltage VDD; the source of the NMOS tube M5, the source of the NMOS tube M6 , the other end of the capacitor C1 , the other end of the capacitor C2 , the other end of the current source IL1 and the other end of the current source IL2 are grounded. 2.根据权利要求1所述的一种适用于生物医学信号采集模拟前端的可变增益放大器，其特征是，电容C 1和C 2的型号相同，电阻R cm1和R cm2的型号相同，NMOS管M1和M2的型号相同，NMOS管M5和M6的型号相同，PMOS管M3和M4的型号相同，PMOS管MFB1和MFB2的型号相同，PMOS管MFB3和MFB4的型号相同，电流源I L1和I L2的型号相同。2. A variable gain amplifier suitable for a biomedical signal acquisition analog front end according to claim 1, characterized in that the capacitors C1 and C2 are of the same model, the resistors R cm1 and R cm2 are of the same model, the NMOS tubes M1 and M2 are of the same model, the NMOS tubes M5 and M6 are of the same model, the PMOS tubes M3 and M4 are of the same model, the PMOS tubes M FB1 and M FB2 are of the same model, the PMOS tubes M FB3 and M FB4 are of the same model, and the current sources IL1 and IL2 are of the same model. 3.根据权利要求1所述的一种适用于生物医学信号采集模拟前端的可变增益放大器，其特征是，跨导放大器A1和跨导放大器A2的结构相同，均包括NMOS管M9、M10、M11、M12，PMOS管M7、M8、M13、M14、M15、M16，以及电流源I L3；3. A variable gain amplifier suitable for biomedical signal acquisition analog front end according to claim 1, characterized in that the transconductance amplifier A1 and the transconductance amplifier A2 have the same structure, both comprising NMOS tubes M9, M10, M11, M12, PMOS tubes M7, M8, M13, M14, M15, M16, and a current source IL3 ; PMOS管M7的栅极形成该跨导放大器的正输入端V in+；PMOS管M8的栅极形成该跨导放大器的负输入端V in- 相连；The gate of the PMOS tube M7 forms the positive input terminal V in+ of the transconductance amplifier; the gate of the PMOS tube M8 forms the negative input terminal V in- of the transconductance amplifier; PMOS管M7的漏极、NMOS管M10的栅极与漏极和NMOS管M9的栅极相连；PMOS管M8的漏极、NMOS管M11的栅极与漏极和NMOS管M12的栅极相连；The drain of the PMOS tube M7, the gate and drain of the NMOS tube M10 and the gate of the NMOS tube M9 are connected; the drain of the PMOS tube M8, the gate and drain of the NMOS tube M11 and the gate of the NMOS tube M12 are connected; PMOS管M7的源极与衬底、PMOS管M8的源极与衬底和PMOS管M16的漏极相连；NMOS管M12的漏极与PMOS管的漏极相连后形成该跨导放大器的输出端V out；The source of the PMOS tube M7 is connected to the substrate, the source of the PMOS tube M8 is connected to the substrate and the drain of the PMOS tube M16; the drain of the NMOS tube M12 is connected to the drain of the PMOS tube to form the output terminal V out of the transconductance amplifier; NMOS管M9的漏极、PMOS管M13的漏极与栅极和PMOS管M14的栅极相连；PMOS管M16的栅极、PMOS管M15的栅极与漏极和电流源I L3的一端相连；The drain of the NMOS tube M9, the drain and gate of the PMOS tube M13 and the gate of the PMOS tube M14 are connected; the gate and drain of the PMOS tube M16, the gate and drain of the PMOS tube M15 and one end of the current source IL3 are connected; PMOS管M13的源极、PMOS管M14的源极、PMOS管M15的源极和PMOS管M16的源极接电源电压V DD；The source of the PMOS tube M13, the source of the PMOS tube M14, the source of the PMOS tube M15 and the source of the PMOS tube M16 are connected to the power supply voltage V DD ; NMOS管M9的源极、NMOS管M10的源极、NMOS管M11的源极、NMOS管M12的源极和电流源I L3的另一端接地。The source of the NMOS transistor M9, the source of the NMOS transistor M10, the source of the NMOS transistor M11, the source of the NMOS transistor M12 and the other end of the current source IL3 are grounded. 4.根据权利要求3所述的一种适用于生物医学信号采集模拟前端的可变增益放大器，其特征是，PMOS管M7和M8的型号相同，PMOS管M13和M14的型号相同，PMOS管M15和M16的型号相同，NMOS管M9、M10、M11和M12的型号相同。4. A variable gain amplifier suitable for a biomedical signal acquisition analog front end according to claim 3, characterized in that the PMOS tubes M7 and M8 are of the same model, the PMOS tubes M13 and M14 are of the same model, the PMOS tubes M15 and M16 are of the same model, and the NMOS tubes M9, M10, M11 and M12 are of the same model.
CN202010832877.2A 2020-08-18 2020-08-18 A variable gain amplifier suitable for biomedical signal acquisition analog front end Active CN111865243B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010832877.2A CN111865243B (en) 2020-08-18 2020-08-18 A variable gain amplifier suitable for biomedical signal acquisition analog front end

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010832877.2A CN111865243B (en) 2020-08-18 2020-08-18 A variable gain amplifier suitable for biomedical signal acquisition analog front end

Publications (2)

Publication Number Publication Date
CN111865243A CN111865243A (en) 2020-10-30
CN111865243B true CN111865243B (en) 2025-03-18

Family

ID=72969236

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010832877.2A Active CN111865243B (en) 2020-08-18 2020-08-18 A variable gain amplifier suitable for biomedical signal acquisition analog front end

Country Status (1)

Country Link
CN (1) CN111865243B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114024511B (en) * 2021-10-11 2023-07-21 电子科技大学 A Digitally Controlled Broadband High Linearity Variable Gain Amplifier

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN212435654U (en) * 2020-08-18 2021-01-29 桂林电子科技大学 A Variable Gain Amplifier for Biomedical Signal Acquisition Analog Front End

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100554850B1 (en) * 2004-03-02 2006-02-24 삼성전자주식회사 Variable Gain Amplifier with Linear Decibel Transfer Conductance
KR100864898B1 (en) * 2006-12-28 2008-10-22 한국과학기술원 CMOS Adjustable Gain Amplifier
TW200932194A (en) * 2008-01-29 2009-08-01 Univ Nat Taiwan A feed-forward automatic-gain control amplifier (FFAGCA) for biomedical application
CN106301227B (en) * 2016-08-03 2018-10-02 东南大学 A kind of load Self-bias Current multiplication type passive frequency mixer
CN107612517B (en) * 2017-09-13 2020-05-08 东南大学 A Gain Programmable Amplifier Based on Dual Input Operational Transconductance Amplifier
CN111371413B (en) * 2020-03-20 2025-06-27 桂林电子科技大学 An analog front-end circuit suitable for human pulse signal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN212435654U (en) * 2020-08-18 2021-01-29 桂林电子科技大学 A Variable Gain Amplifier for Biomedical Signal Acquisition Analog Front End

Also Published As

Publication number Publication date
CN111865243A (en) 2020-10-30

Similar Documents

Publication Publication Date Title
CN108494370B (en) Chopper stabilized instrumentation amplifier
CN107104648B (en) amplifying circuit
CN105720927B (en) A kind of frequency compensated trsanscondutance amplifier
CN104320096B (en) Microcurrent and current feedback chopper modulation instrument amplifier
CN106788434B (en) Source follower buffer circuit
US8004350B2 (en) Impedance transformation with transistor circuits
US11617531B2 (en) Circuit applied to biopotential acquisition system
CN101826844A (en) Power amplifier and signal amplifying method based on power amplifier
CN111262537A (en) A transconductance amplifier
JPS61172416A (en) Cmos amplifier
CN111371413A (en) Analog front-end circuit suitable for human pulse signals
CN111865243B (en) A variable gain amplifier suitable for biomedical signal acquisition analog front end
CN116032283B (en) A programmable gain amplifier circuit with DCOC calibration and its implementation method
CN113728551B (en) Transconductor circuit with adaptive bias
US20100201446A1 (en) Class AB Output Stage
CN212435654U (en) A Variable Gain Amplifier for Biomedical Signal Acquisition Analog Front End
CN116317985A (en) Programmable negative capacitance circuit for improving input impedance of programmable gain chopper instrumentation amplifier
CN206611389U (en) Amplifier for physiology potential signal detection
CN211209670U (en) Analog front-end circuit suitable for human pulse signals
US12199575B2 (en) Super source follower
CN208190608U (en) Low noise low ripple type chopper-stabilized instrumentation amplifier circuit
CN115412041B (en) Low-noise fully-differential amplifier comprising common-mode feedback circuit
CN116185122B (en) Negative Output Voltage High PSRR Linear Regulator
CN217388659U (en) Differential operational amplifier and chip
JP4180411B2 (en) Transconductance amplifier

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant