Millimeter wave sensing chip and millimeter wave radar
Technical Field
The present invention relates to chip technology, and in particular, to a millimeter wave sensing chip and a millimeter wave radar.
Background
Millimeter waves refer to electromagnetic waves with wavelengths from 0.1 cm to 1cm, and the corresponding frequency range is 30 GHz to 300GHz. Millimeter wave radars are widely applied to the fields of vehicle-mounted radars, intelligent robots, vital sign measurement, gesture recognition and the like. Millimeter wave radar chips have also been developed.
The conventional millimeter wave radar chip generally only comprises a TR component to realize a simple transceiving function, such as a BGT24 series chip of infineon company, and a large number of other functional chips such as a frequency device chip or a voltage-controlled oscillator chip for generating radio frequency signals, an ADC chip for simulating baseband, a DSP chip for signal processing, etc. are required to be matched in the using process of the product. While increasing the cost of the system, the system is very complex, requiring a developer or user to know the specification parameters of the various chips clearly to design a useful system.
Another millimeter wave radar chip is represented by the IWR series of TI, and various functions required by the millimeter wave radar chip are all integrated into one chip. Taking the IWR1642 as an example, the analog baseband and the complex DSP signal processing are also completely integrated in the chip except for 2 rf transmitters and 4 rf receivers. One of the biggest problems in doing so is that the chip is too large in size, numerous in pins, and cumbersome to configure, and customers often need to spend great effort on how to use the chip.
Disclosure of Invention
The technical problem to be solved by the embodiment of the invention is how to solve the problems of complex millimeter wave radar chip system and inconvenient configuration in the prior art.
In order to solve the problems, the technical scheme provided by the invention is as follows:
The millimeter wave radar chip comprises a radio frequency receiving and transmitting end, an analog signal processing unit, a hardware acceleration circuit, a signal generator and a frequency synthesizer, wherein the radio frequency receiving and transmitting end is used for receiving and transmitting millimeter wave signals, the analog signal processing unit is used for carrying out low-pass or band-pass filtering on intermediate frequency signals generated by echo signals and generating corresponding digital baseband signals after analog-to-digital conversion, the hardware acceleration circuit comprises a distance FFT module and is used for calculating distance information of targets through fast Fourier transformation on the digital signals, when a plurality of target objects exist, the targets are subjected to distance sorting according to the energy of the received millimeter wave signals, the signal generator is used for generating frequency control words, and the frequency synthesizer is used for generating frequency signals of required frequency modulation continuous waves according to the frequency control words.
Preferably, in the millimeter wave radar chip, the signal generator is further configured to send an indication signal to perform timing control on the hardware acceleration circuit.
Preferably, in the millimeter wave radar chip, the indication signal includes a frame start flag for indicating that the data received next is a data frame until the next frame start flag is received, and a chirp signal start flag for indicating that the data received next is an analog-to-digital conversion generated by a chirp signal until the next chirp signal start flag is received.
Preferably, in the above millimeter wave radar chip, when there are a plurality of millimeter wave radar chips used in cascade, each millimeter wave radar chip receives the frame start mark sent by the main chip as a synchronization signal, and the data received after the identification is output from the same frame.
Preferably, in the millimeter wave radar chip, the parameters in the frequency control word include the number of chirps of the frequency modulated continuous wave, the shape and time of each chirp, the frequency scanning range, and how many chirps are in a frame.
Preferably, in the millimeter wave radar chip, the analog signal processing unit comprises an intermediate frequency filter for performing low-pass or band-pass filtering on the intermediate frequency signal, and an analog-to-digital conversion circuit for performing analog-to-digital conversion.
Preferably, in the millimeter wave radar chip, the hardware acceleration circuit further includes a doppler FFT module, configured to calculate speed information of the target object by performing fast fourier transform on the digital signal, and perform a sorting operation on speeds of a plurality of targets according to energy of the received millimeter wave signal when the plurality of target objects exist.
Preferably, in the millimeter wave radar chip, the hardware acceleration circuit further includes a downsampling module, configured to downsample the digital baseband signal to reduce a subsequent data processing scale.
Preferably, in the millimeter wave radar chip, the result generated by the hardware acceleration circuit is output to the MCU or an external circuit through an interface circuit.
In order to solve the technical problems, the invention also discloses a millimeter wave radar which comprises the millimeter wave radar chip.
Compared with the prior art, the technical scheme of the invention has the following advantages:
The millimeter wave radar chip provided by the invention has the advantages that the integrated radio frequency receiving and transmitting end, the analog signal processing unit, the hardware accelerating circuit, the signal generator and the frequency synthesizer for generating the frequency-modulated continuous wave frequency signal can realize the complete frequency-modulated continuous wave millimeter wave sensing function, so that the problems of complex whole system and high cost caused by the fact that a large number of matched chips are required in the traditional radar scheme are overcome, or the problems of overlarge scale and complex configuration of the chip are solved, and the purpose of flexibility and portability is achieved.
Drawings
Fig. 1 is a schematic structural diagram of a millimeter wave radar chip according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a digital DSP module in the millimeter wave radar chip of FIG. 1;
Fig. 3 is a timing sequence of Pattern Generator modules in the millimeter wave radar chip shown in fig. 1.
Reference numerals
Millimeter wave radar chip 100
Millimeter wave transmitting module 101
Phase locked loop 102
Pattern Generator module 103
Millimeter wave receiving module 104
Intermediate frequency filter 105
Analog-to-digital conversion circuit 106
Digital DSP module 107
Interface circuit 108
Downsampling submodule 201
Distance FFT sub-module 202
Doppler FFT sub-module 203
Interface circuit 204
Detailed Description
In the conventional millimeter wave radar sensor, since only one TR module is generally included to realize a simple transceiving function, a large number of other functional chips need to be matched in the use process, so that the system is very complex while the cost of the system is increased, and a developer or a user is required to know the specification parameters of various chips clearly, so that a good system can be designed. Or the chip integrates various functions required by the millimeter wave radar chip into one chip, so that the chip is huge in scale, multiple in pins and very troublesome in configuration, and a customer often needs to spend great effort to study how to use the chip. The embodiment of the invention provides a millimeter wave radar chip, which can realize a complete frequency modulation continuous wave millimeter wave sensing function by integrating a radio frequency receiving and transmitting end, an analog signal processing unit, a hardware accelerating circuit, a signal generator and a frequency synthesizer for generating frequency modulation continuous wave frequency signals, thereby solving the problems of complex whole system and high cost caused by a large number of matched chips required by the traditional radar scheme or the problems of overlarge scale and complex configuration of the chip, and achieving the purposes of flexibility and portability.
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
Example 1
Referring to fig. 1 to 3, a millimeter wave radar chip 100 of the present embodiment includes a radio frequency transceiver composed of a millimeter wave transmitting module 101, a millimeter wave receiving module 104 and a transceiver antenna, an intermediate frequency filter 105 and an analog-to-digital conversion circuit 106 forming an analog signal processing unit, a digital DSP module 107 serving as a hardware acceleration circuit, a Pattern Generator module 103 serving as a signal generator, and a phase-locked loop (PhaseLockedLoop, PLL) 102 serving as a frequency synthesizer.
Wherein the Pattern Generator module 103 is a digital module, mainly used for generating frequency control words, and by configuring the Pattern Generator module 103, the number of chirp of a frequency modulated continuous wave (Frequency Modulated Continuous Wave, FMCW) signal, each chirp shape, time, and frequency scanning range, and how many chirp is in a Frame, etc. all parameters related to FMCW can be set.
The phase-locked loop (PhaseLockedLoop, PLL) 102 generates the required FMCW signal by using the parameters generated by the Pattern Generator module 103, and the rf signal is transmitted through the millimeter wave transmitting module 101 at the rf transceiver end and through the antenna TX.
The transmitted signal is reflected back through millimeter wave receiving module 104 after hitting an object, and an intermediate frequency signal is generated. The intermediate frequency signal is low-pass or band-pass filtered by the intermediate frequency filter 105 and then enters the analog-to-digital conversion circuit 106 to generate the original ADC data. The subsequent digital DSP module 107 performs an operation based on the output of the ADC, and obtains a result of the 1D or 2D FFT, and outputs an MCU (not shown) or other external circuit (not shown) via the interface circuit 108.
Fig. 2 is a block diagram of one embodiment of the hardware-accelerated digital DSP block 107 of the present invention. The intermediate frequency signal is subjected to analog-to-digital conversion by the analog-to-digital conversion circuit 106 and then enters the digital DSP module 107. This module mainly comprises a downsampling submodule 201, a distance FFT submodule 202 and a doppler FFT submodule 203, which are used for calculating related information such as distance information and speed information of a target or multiple targets by performing fast fourier transform (Fast Fourier transform, FFT) on the digital signals. The downsampling submodule 201 downsamples the original data obtained by the analog-to-digital conversion circuit 106 to reduce the scale of the subsequent distance FFT and Doppler FFT, thereby saving hardware resources and power consumption. The downsampled data is provided to distance FFT submodule 202. The distance FFT sub-module 202 is also called a 1D-FFT sub-module, and has a main function of directly performing FFT operation on the down-sampled data to calculate distance information of the targets, and if multiple targets exist, the multiple targets can be further ordered according to the received energy. The output of the 1D-FFT is sent to the doppler FFT submodule 203.
The doppler FFT sub-module 203 is also called 2D-FFT, and the main function of this sub-module is to calculate the velocity information of the target object. If multiple targets exist, the speed of the multiple targets may also be ranked. The result of the Doppler FFT sub-module 203 can be sent directly to the interface circuit 204 and sent out of the chip. In addition, the original data and the distance FFT result may also be sent directly from the interface circuit 204. If the chip contains two or more receiving channels, angle information can be calculated from the output data.
In order to perform digital signal processing on the raw data of the ADC, the digital DSP block 107 must know some timing information. Such as when the ADC data is valid data, can be used for FFT analysis. Another function of Pattern Generator module 103 in fig. 1 is to control the timing of digital DSP module 107. Fig. 3 is an implementation of the timing diagram of the present invention. Pattern Generator module 103 generates, in addition to FMCW-related parameters, two indication signals, called a start of frame flag (FRAME HEAD) and a chirp start flag (CHIRP HEAD). FRAME HEAD is generated at the beginning of each frame, while CHIRP HEAD is generated at the beginning of each chirp. In fig. 3, a high level for a period of time may be used as a feature of FRAME HEAD and CHIRP HEAD. When received FRAME HEAD by the digital DSP module, this indicates that the next received data is a frame until the next FRAME HEAD signal is received. When the digital DSP block 107 receives CHIRP HEAD, it represents the data of an ADC generated by a chirp for the next data until the next CHIRP HEAD signal is received. The digital DSP block 107 may determine from the CHIRP HEAD signals when to start 1D-FFT signal processing of the raw data of the ADCs, and the corresponding digital DSP block may determine from the FRAME HEAD signals which ADCs to perform 2D-FFT signal processing of the raw data.
The FRAME HEAD signal may also be used to generate a synchronization signal. When a plurality of chips are used in cascade, all the chips can receive the sync synchronization signal sent by one main chip, and after the sync signal is received, the data of each chip is output from the same frame. And unified array signal processing is convenient to be carried out on the obtained data.
The foregoing is a detailed description of the implementations of the invention, but it will be understood by those skilled in the art that the foregoing embodiments are exemplary and for the purpose of clarity and understanding, and are not limited to the scope of the invention, and it is intended that all permutations, enhancements, equivalents, and improvements thereto, which fall within the spirit and scope of the present invention, will become apparent to those skilled in the art after reading the figures and studying the following drawings.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program to instruct related hardware, and the program may be stored in a computer readable storage medium, where the storage medium may include ROM, RAM, magnetic disk, optical disk, etc.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.