CN111831054A - Asynchronous system clock synchronization method, device, system and storage medium - Google Patents
Asynchronous system clock synchronization method, device, system and storage medium Download PDFInfo
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- CN111831054A CN111831054A CN201910316949.5A CN201910316949A CN111831054A CN 111831054 A CN111831054 A CN 111831054A CN 201910316949 A CN201910316949 A CN 201910316949A CN 111831054 A CN111831054 A CN 111831054A
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- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
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Abstract
The invention discloses a clock synchronization method, a clock synchronization device, a clock synchronization system and a storage medium of an asynchronous system, which are used for realizing time synchronization between different systems and sensors and improving the reliability of data processing results. In a first aspect, a method for synchronizing clocks of an asynchronous system is provided, which includes: the clock source system acquires a timestamp and starts a timer; sending the acquired timestamp to a second system through a first system; and when the timing time of the timer is over, sending an interrupt signal to the second system, wherein the interrupt signal is used for triggering the second system to synchronize the local time of the second system according to the timestamp and the timing duration of the timer.
Description
Technical Field
The invention relates to the technical field of intelligent equipment, in particular to a clock synchronization method, a clock synchronization device, a clock synchronization system and a clock synchronization storage medium of an asynchronous system.
Background
The intelligent device not only provides the user with the third-party expansion function, but also realizes the human-computer interaction experience by depending on the hardware foundation, such as screen rotation of the intelligent mobile phone, shaking of the mobile phone to switch the music and wallpaper, and the like. The intelligent equipment realizes the functions by relying on the sensor arranged inside the equipment, can sense the change of the intelligent mobile phone to light, distance, gravity, direction and the like, and interacts the change data sensed by the main system of the intelligent mobile phone, so that the intelligent equipment can realize the extended function according to the change data, and a user obtains more intelligent and humanized use experience.
In some smart device domains, such as the robot domain, there are different clock domains between the sensor and the robot master system, i.e. both are clocked by different clock source systems. For example, when the camera acquires data, if the host system does not acquire the timestamp from the host system where the camera is located, but holds the timestamp of the host system, the host system cannot determine the accurate time point of the camera acquired data when receiving the camera data. Similarly, the same problem exists between sensors or systems that track different clock source systems.
Due to the fact that data provided by different clock source systems are asynchronous in time dimension, a data receiver cannot accurately judge the accurate time point of data acquisition, in some application scenarios, the required accuracy of the data acquisition time point is high, and if the data acquisition time point obtained by a main system of the intelligent device is not accurate, the reliability of a data processing result is affected.
Disclosure of Invention
The embodiment of the invention provides a clock synchronization method and device of an asynchronous system and a storage medium, which are used for realizing time synchronization between different systems and sensors and improving the reliability of data processing results.
In a first aspect, a method for synchronizing clocks of an asynchronous system is provided, which includes:
the clock source system acquires a timestamp and starts a timer;
sending the acquired timestamp to a second system through a first system;
and when the timing time of the timer is over, sending an interrupt signal to the second system, wherein the interrupt signal is used for triggering the second system to synchronize the local time of the second system according to the timestamp and the timing duration of the timer.
In a possible implementation manner, the obtaining of the timestamp by the clock source system specifically includes:
the clock source system acquires a timestamp after receiving a timestamp acquisition request sent by a first system; and
sending the acquired timestamp to the second system through the first system specifically includes:
and sending a timestamp obtaining request response to the first system, wherein the timestamp obtaining request response carries the obtained timestamp, and the first system sends the timestamp to a second system.
In one possible implementation, the first system includes a smart device host operating system and the second system includes a sensor disposed in the smart device.
In a possible implementation manner, the clock source system is connected with the first system through a serial port or a serial peripheral interface; the first system is connected with the second system through a Mobile Industry Processor Interface (MIPI) or a Universal Serial Bus (USB); and the clock source system is connected with the second system through a general purpose input/output GPIO.
In one possible embodiment, the interrupt signal comprises an electrical signal.
In one possible implementation, the smart device includes a robot and the sensor includes a vision sensor.
In a second aspect, there is provided another asynchronous system clock synchronization method, including:
the method comprises the steps that a second system receives a time stamp sent by a first system, wherein the time stamp is sent to the first system by a clock source system;
receiving an interrupt signal sent by the clock source system, wherein the interrupt signal is sent by the clock source system when the timing time of a timer is over, and the timer is started when the clock source system acquires the timestamp;
and synchronizing the local time according to the timestamp and the timing duration of the timer.
In a possible implementation manner, the timestamp is obtained by the first system by sending a timestamp obtaining request to the clock source system.
In a third aspect, a method for synchronizing clocks of an asynchronous system is provided, including:
the first system receives a timestamp sent by a clock source system;
the timestamp is sent to a second system.
In a possible implementation manner, before the first system receives the timestamp sent by the clock source system, the method further includes:
sending a timestamp acquisition request to the clock source system; and
the receiving, by the first system, the timestamp sent by the clock source system specifically includes:
and the first system receives a timestamp acquisition request response sent by a clock source system, wherein the timestamp acquisition request response carries the timestamp.
In a fourth aspect, an asynchronous system clock synchronization apparatus is provided, including:
an acquisition unit configured to acquire a timestamp;
a starting unit configured to start a timer while the obtaining unit obtains the timestamp;
the first sending unit is used for sending the timestamp acquired by the acquiring unit to the second system through the first system;
and the second sending unit is used for sending an interrupt signal to the second system when the timing time of the timer is over, wherein the interrupt signal is used for triggering the second system to synchronize the local time according to the timestamp and the timing duration of the timer.
In a possible implementation manner, the obtaining unit is specifically configured to obtain the timestamp after receiving a timestamp obtaining request sent by the first system;
the first sending unit is specifically configured to send a timestamp obtaining request response to the first system, where the timestamp obtaining request response carries an obtained timestamp, and the first system sends the timestamp to a second system.
In a fifth aspect, there is provided another asynchronous system clock synchronization apparatus, including:
the first receiving unit is used for receiving a timestamp sent by a first system, wherein the timestamp is sent to the first system by a clock source system;
a second receiving unit, configured to receive an interrupt signal sent by the clock source system, where the interrupt signal is sent by the clock source system when a timer finishes timing, and the timer is started while the clock source system acquires the timestamp;
and the clock synchronization unit is used for synchronizing the local time according to the timestamp and the timing duration of the timer.
In a possible implementation manner, the timestamp is obtained by the first system by sending a timestamp obtaining request to the clock source system.
In a sixth aspect, there is provided a clock synchronization apparatus for an asynchronous system, comprising:
the receiving unit is used for receiving the time stamp sent by the clock source system;
and the first sending unit is used for sending the time stamp to the second system.
In a possible implementation, the method further includes a second sending unit, where:
the second sending unit is configured to send a timestamp obtaining request to the clock source system before the receiving unit receives the timestamp sent by the clock source system;
the receiving unit is specifically configured to receive a timestamp obtaining request response sent by a clock source system, where the timestamp obtaining request response carries the timestamp.
A seventh aspect provides an asynchronous system clock synchronization system, including a first system, a second system and a clock source system tracked by the first system, wherein:
the clock source system is used for acquiring a timestamp and starting a timer; sending the acquired timestamp to the first system; when the time counted by the timer is over, sending an interrupt signal to the second system;
the first system is used for sending the time stamp to the second system;
and the second system is used for synchronizing the local time according to the timestamp and the timing duration of the timer when the interrupt signal is received.
In a possible embodiment, the first system is further configured to send a timestamp obtaining request to the clock source system; after receiving a timestamp acquisition request response, sending a timestamp acquired by the clock source system to the second system;
the clock source system is specifically used for acquiring a timestamp after receiving a timestamp acquisition request sent by the first system; and sending a timestamp acquisition request response to the first system, wherein the timestamp acquisition request response carries the acquired timestamp.
In an eighth aspect, a computing device is provided, comprising at least one processor and at least one memory, wherein the memory stores a computer program that, when executed by the processor, causes the processor to perform the steps of any of the above asynchronous system clock synchronization methods.
In a ninth aspect, there is provided a computer readable medium storing a computer program executable by a computing device, the program, when run on the computing device, causing the computing device to perform the steps of any of the asynchronous system clock synchronization methods described above.
In a tenth aspect, a computer program product is provided, the computer program product comprising a computer program stored on a computer storage medium, the computer program comprising program instructions that, when executed by a processor, perform the steps of any of the above asynchronous system clock synchronization methods.
In the asynchronous system clock synchronization method, device, system and storage medium provided by the embodiments of the present invention, the clock source system starts the timer while acquiring the timestamp, and sends the acquired timestamp to the second system through the first system, and when the timing time of the timer is over, sends the interrupt signal to the second system, triggers the second system to synchronize the local time according to the received timestamp and the timing duration of the timer, and achieves the purpose of synchronizing the clock source tracked by the second system and the first system through the above processes, so that the first system can determine the accurate time of data acquisition by the second system, thereby ensuring the reliability of the data processing result of the first system.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic structural diagram of a clock synchronization system of an asynchronous system according to an embodiment of the present invention;
fig. 2 is a schematic flowchart of an implementation of a first asynchronous system clock synchronization method according to an embodiment of the present invention;
fig. 3 is a schematic flowchart of an implementation of a second asynchronous system clock synchronization method according to an embodiment of the present invention;
fig. 4 is a schematic flowchart of an implementation of a third asynchronous system clock synchronization method according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a clock synchronization apparatus of an asynchronous system according to a first embodiment of the present invention;
fig. 6 is a schematic structural diagram of a clock synchronization apparatus of a second asynchronous system according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a clock synchronization apparatus of a third asynchronous system according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a computing device according to an embodiment of the present invention.
Detailed Description
In order to solve the problem that the reliability of a data processing result is influenced due to inaccurate data acquisition time points in an asynchronous system, the embodiment of the invention provides a clock synchronization method, a clock synchronization device, a clock synchronization system and a storage medium of the asynchronous system.
The terms "first," "second," and the like in the description and in the claims, and in the drawings, in the embodiments of the invention are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein.
Reference herein to "a plurality or a number" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings of the specification, it being understood that the preferred embodiments described herein are merely for illustrating and explaining the present invention, and are not intended to limit the present invention, and that the embodiments and features of the embodiments in the present invention may be combined with each other without conflict.
As shown in fig. 1, which is a schematic structural diagram of a clock synchronization system of an asynchronous system according to an embodiment of the present invention, including a clock source system 10, a first system 11 and a second system 12, where the first system 11 tracks the clock source system 10, that is, the clock source system 10 provides time for the first system 11, and time of the first system 11 is synchronous with the clock source system 10. The first system may typically be a main operating system of the smart device, which is mainly responsible for executing the algorithm program, and the second system may be a sensor, such as a vision sensor, provided in the smart device for acquiring image data.
In a possible implementation manner, the clock source system and the first system may be connected through a Serial port or a Serial Peripheral Interface (SPI); the first system and the second system can be connected through a Mobile Industry Processor Interface (MIPI) or a Universal Serial Bus (USB); the clock source system is connected with the second system through General Purpose Input/Output (GPIO).
In specific implementation, the clock source system is used for acquiring the timestamp, sending the acquired timestamp to the first system, and the first system performs local time synchronization according to the received timestamp. Aiming at the problem that the accuracy of data processing results of a first system is affected because the first system cannot obtain the accurate time of data acquired by a second system due to the fact that the first system and the second system track different clock source systems, in order to guarantee the clock synchronization of the first system and the second system, in the embodiment of the invention, the clock source system tracked by the first system is used for carrying out clock time service on the second system, so that the second system and the first system track the same clock source system.
In a possible implementation manner, the clock source system may transmit a timestamp to the second system through the first system, that is, after acquiring the timestamp, the clock source system sends the acquired timestamp to the first system, and the first system sends the timestamp to the second system, and the second system synchronizes the local time according to the received timestamp. In the implementation, a certain delay may be generated in the transmission process due to the timestamp, so that a certain error still exists in the local time adjusted by the second system.
In view of this, in the embodiment of the present invention, when the clock source system acquires the timestamp, the timer is started, the acquired timestamp is sent to the first system, and the first system sends the timestamp to the second system, the second system does not immediately adjust the local time according to the received timestamp after receiving the timestamp, but waits for an interrupt signal sent by the clock source system when the timing time of the timer is over, and when the second system receives the interrupt signal, the local time is adjusted according to the received timestamp and the timing duration of the timer, so that an error caused by a delay in a timestamp transmission process can be avoided, and accuracy of a time synchronization result of the second system is ensured. Specifically, the second system determines that the sum of the received timestamp and the timing duration is the current time. In this embodiment, the timing duration of the timer may be preset in the second system, it should be understood that the timing duration should be greater than the transmission time of the timestamp, and in particular, the timing duration of one second may be used to ensure that the transmission of the timestamp can be completed within the timing duration.
In one possible embodiment, the clock source system may obtain the time stamp at a set period, in which embodiment the first system and the second system synchronize the local time at the period.
In another possible embodiment, the clock source system may also obtain the timestamp under the trigger of the first system. In such an embodiment, the first system may send a timestamp get request to the clock source system, for example, the first system may send the timestamp get request to the clock source system when the local time needs to be synchronized or before data needs to be obtained from the second system; the clock source system starts a timer when acquiring the timestamp and sends a timestamp acquisition request response to the first system, the timestamp acquisition request response carries the acquired timestamp, and the first system adjusts local time according to the received timestamp; in addition, the first system sends the received timestamp to the second system, the clock source system sends an interrupt signal to the second system when the timing time of the timer is over, the second system synchronizes the local time according to the received timestamp and the timing duration when receiving the interrupt signal, and the second system determines that the local time is 13: 52: 28 seconds by taking the timestamp time received by the second system as 13: 52: 26 seconds and the timing duration as 2 seconds as examples.
In specific implementation, the interrupt signal sent by the clock source system to the second system may be an electrical signal, for example, when the timing time of the timer is over, a high level signal or a low level signal is sent to the second system through the GPIO between the two signals, so as to trigger the second system to perform clock synchronization.
Accordingly, embodiments of the present invention respectively provide asynchronous system clock synchronization methods implemented by a clock source system, a first system, and a second system, which are respectively described below.
As shown in fig. 2, an implementation flow diagram of a method for implementing asynchronous system clock synchronization for a clock source system may include the following steps:
and S21, the clock source system acquires the timestamp and starts a timer.
In specific implementation, the clock source system may obtain the timestamp when the start time of each obtaining period reaches according to a preset period, or may obtain the timestamp after receiving a timestamp obtaining request sent by the first system, and start the timer while obtaining the timestamp.
And S22, the clock source system sends the acquired time stamp to the second system through the first system.
In specific implementation, if the clock source system obtains the timestamp after receiving the timestamp obtaining request sent by the first system, the clock source system returns a response of the request to the first system, and the returned response carries the obtained timestamp.
And S23, when the timer finishes the timing time, the clock source system sends an interrupt signal to the second system.
After sending the timestamp to the first system, the clock source system continues to wait until the timer times out, and triggers the clock source system to send an interrupt signal to the second system, where the signal may be an electrical signal, and in the specific implementation, the signal may be a high-level signal or a low-level signal. The interrupt signal is used for triggering the second system to synchronize the local time according to the received timestamp and the timing duration of the timer.
As shown in fig. 3, it is a schematic diagram of an implementation flow of the method for implementing asynchronous system clock synchronization by the second system, and includes:
and S31, the second system receives the time stamp sent by the first system.
The time stamp received by the second system is sent to the first system by the clock source system, and the clock source system may obtain the time stamp according to a set obtaining period and send the time stamp to the first system, or send the time stamp to the first system according to a request of the first system.
And S32, the second system receives the interrupt signal sent by the clock source system.
The interrupt signal is sent by the clock source system when the timing time of the timer is over, and the timer is started when the clock source system acquires the timestamp.
In the embodiment of the invention, the clock source system starts the timer while acquiring the timestamp, and the clock source system sends an interrupt signal to the second system when the timing time of the timer is over.
And S33, the second system synchronizes the local time according to the time stamp and the timing duration of the timer.
When receiving the interrupt signal, the second system generates a new timestamp according to the timestamp received in step S31 and the timing duration of the timer, and sets the system time of the second system according to the determined new timestamp, thereby achieving system time synchronization with the clock source.
As shown in fig. 4, it is a schematic diagram of an implementation flow of the method for implementing asynchronous system clock synchronization by the first system, and includes:
and S41, the first system receives the time stamp sent by the clock source system.
In a specific implementation, the clock source may obtain the timestamp according to a set period and send the timestamp to the first system, or the clock source system may also obtain the timestamp according to a timestamp obtaining request sent by the first system and send the timestamp to the first system, which is not limited in the embodiment of the present invention.
If the clock source system obtains the timestamp according to the timestamp obtaining request sent by the first system, the clock source system may carry the timestamp in the timestamp obtaining request response sent to the first system.
And S42, the first system sends the time stamp to the second system.
In particular, after receiving the timestamp request, the first system synchronizes the local time according to the received timestamp, and in addition, the first system may send the received timestamp to the second system.
The asynchronous system clock synchronization method provided by the embodiment of the invention can be applied to intelligent equipment, and the intelligent equipment can comprise a robot, an automatic driving control device and the like. When the system is applied to a robot, the second system may be a vision sensor such as a camera for providing image data to a host system, and the first system may be a robot host system for processing the image data provided by the vision sensor and outputting a processing result.
In the asynchronous system clock synchronization method provided by the embodiment of the invention, the clock source system tracked by the first system starts the timer while acquiring the timestamp, the acquired timestamp is sent to the second system through the first system, and when the timing duration of the timer is over, the interrupt signal is sent to the second system to trigger the second system to synchronize the local time of the second system according to the received timestamp and the timing duration of the timer.
Based on the same inventive concept, the embodiments of the present invention further provide clock synchronization devices of an asynchronous system, which are implemented by a clock source system, a first system, and a second system, respectively.
As shown in fig. 5, it is a schematic structural diagram of an asynchronous system clock synchronization apparatus implemented on a clock source system side, and includes:
an obtaining unit 51, configured to obtain the timestamp.
An activation unit 52 for activating the timer at the same time as the acquisition unit 51 acquires the time stamp.
A first sending unit 53, configured to send the timestamp acquired by the acquiring unit to the second system through the first system.
A second sending unit 54, configured to send an interrupt signal to the second system when the time counted by the timer is over, where the interrupt signal is used to trigger the second system to synchronize its local time according to the timestamp and the time duration counted by the timer.
In a possible implementation manner, the obtaining unit is specifically configured to obtain the timestamp after receiving a timestamp obtaining request sent by the first system;
the first sending unit is specifically configured to send a timestamp obtaining request response to the first system, where the timestamp obtaining request response carries an obtained timestamp, and the first system sends the timestamp to a second system.
As shown in fig. 6, it is a schematic structural diagram of an asynchronous system clock synchronization apparatus implemented on the second system side, and includes:
a first receiving unit 61, configured to receive a timestamp sent by a first system, where the timestamp is sent to the first system by a clock source system;
a second receiving unit 62, configured to receive an interrupt signal sent by the clock source system, where the interrupt signal is sent by the clock source system when a timer finishes timing, and the timer is started while the clock source system obtains the timestamp;
and the clock synchronization unit 63 is configured to synchronize local time according to the timestamp and the timing duration of the timer.
As shown in fig. 7, it is a schematic structural diagram of an asynchronous system clock synchronization apparatus implemented on the first system side, and includes:
a receiving unit 71, configured to receive a timestamp sent by the clock source system;
a first sending unit 72, configured to send the timestamp to the second system.
In a possible implementation, the method further includes a second sending unit, where:
the second sending unit is configured to send a timestamp obtaining request to the clock source system before the receiving unit receives the timestamp sent by the clock source system;
the receiving unit is specifically configured to receive a timestamp obtaining request response sent by a clock source system, where the timestamp obtaining request response carries the timestamp.
For convenience of description, the above parts are separately described as modules (or units) according to functional division. Of course, the functionality of the various modules (or units) may be implemented in the same or in multiple pieces of software or hardware in practicing the invention.
Having described the asynchronous system clock synchronization and apparatus of an exemplary embodiment of the present invention, a computing apparatus according to another exemplary embodiment of the present invention is next described.
As will be appreciated by one skilled in the art, aspects of the present invention may be embodied as a system, method or program product. Thus, various aspects of the invention may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.
In some possible embodiments, a computing device according to the present invention may include at least one processor, and at least one memory. Wherein the memory stores program code that, when executed by the processor, causes the processor to perform the steps in the asynchronous system clock synchronization according to various exemplary embodiments of the present invention described above in this specification. For example, the processor may perform the step S21, the clock source system acquiring the time stamp and starting the timer, as shown in fig. 2, and the step S22, transmitting the acquired time stamp to the second system through the first system; step S23, when the timer finishes counting time, an interrupt signal is sent to the second system; or the processor may execute step S31 shown in fig. 3, where the second system receives the timestamp sent by the first system; step S32, the second system receives the interrupt signal sent by the clock source system; step S33, the second system synchronizes the local time according to the time stamp and the timing duration of the timer; or the processor may execute step S41 shown in fig. 4, receiving the time stamp sent by the clock source system; and step S42, sending the time stamp to the second system.
The computing device 80 according to this embodiment of the invention is described below with reference to fig. 8. The computing device 80 shown in fig. 8 is only an example and should not impose any limitations on the functionality or scope of use of embodiments of the present invention.
As shown in fig. 8, the computing apparatus 80 is in the form of a general purpose computing device. Components of computing device 80 may include, but are not limited to: the at least one processor 81, the at least one memory 82, and a bus 83 connecting the various system components including the memory 82 and the processor 81.
The memory 82 may include readable media in the form of volatile memory, such as Random Access Memory (RAM)821 and/or cache memory 822, and may further include Read Only Memory (ROM) 823.
The computing apparatus 80 may also communicate with one or more external devices 84 (e.g., keyboard, pointing device, etc.), may also communicate with one or more devices that enable a user to interact with the computing apparatus 80, and/or may communicate with any devices (e.g., router, modem, etc.) that enable the computing apparatus 80 to communicate with one or more other computing devices. Such communication may be through input/output (I/O) interfaces 85. Also, computing device 80 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the Internet) through network adapter 86. As shown, network adapter 86 communicates with other modules for computing device 80 over bus 83. It should be understood that although not shown in the figures, other hardware and/or software modules may be used in conjunction with computing device 80, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.
The computing device provided by the embodiment of the invention can be arranged in intelligent equipment, such as a robot or an automatic driving control device.
In some possible embodiments, the aspects of asynchronous system clock synchronization provided by the present invention may also be implemented in the form of a program product, which includes program code for causing a computer device to perform the steps in asynchronous system clock synchronization according to various exemplary embodiments of the present invention described above in this specification when the program product runs on the computer device, for example, the computer device may perform step S21 shown in fig. 2, the clock source system obtains a timestamp and starts a timer, and step S22, the obtained timestamp is sent to a second system through a first system; step S23, when the timer finishes counting time, an interrupt signal is sent to the second system; or the processor may execute step S31 shown in fig. 3, where the second system receives the timestamp sent by the first system; step S32, the second system receives the interrupt signal sent by the clock source system; step S33, the second system synchronizes the local time according to the time stamp and the timing duration of the timer; or the processor may execute step S41 shown in fig. 4, receiving the time stamp sent by the clock source system; and step S42, sending the time stamp to the second system.
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The program product for resource exposure of embodiments of the present invention may employ a portable compact disk read only memory (CD-ROM) and include program code, and may be run on a computing device. However, the program product of the present invention is not limited in this regard and, in the present document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device over any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., over the internet using an internet service provider).
It should be noted that although several units or sub-units of the apparatus are mentioned in the above detailed description, such division is merely exemplary and not mandatory. Indeed, the features and functions of two or more of the units described above may be embodied in one unit, according to embodiments of the invention. Conversely, the features and functions of one unit described above may be further divided into embodiments by a plurality of units.
Moreover, while the operations of the method of the invention are depicted in the drawings in a particular order, this does not require or imply that the operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. A method for synchronizing clocks in an asynchronous system, comprising:
the clock source system acquires a timestamp and starts a timer;
sending the acquired timestamp to a second system through a first system;
and when the timing time of the timer is over, sending an interrupt signal to the second system, wherein the interrupt signal is used for triggering the second system to synchronize the local time of the second system according to the timestamp and the timing duration of the timer.
2. A method for synchronizing clocks in an asynchronous system, comprising:
the method comprises the steps that a second system receives a time stamp sent by a first system, wherein the time stamp is sent to the first system by a clock source system;
receiving an interrupt signal sent by the clock source system, wherein the interrupt signal is sent by the clock source system when the timing time of a timer is over, and the timer is started when the clock source system acquires the timestamp;
and synchronizing the local time according to the timestamp and the timing duration of the timer.
3. A method for synchronizing clocks in an asynchronous system, comprising:
the first system receives a timestamp sent by a clock source system;
the timestamp is sent to a second system.
4. An asynchronous system clock synchronization apparatus, comprising:
an acquisition unit configured to acquire a timestamp;
a starting unit configured to start a timer while the obtaining unit obtains the timestamp;
the first sending unit is used for sending the timestamp acquired by the acquiring unit to the second system through the first system;
and the second sending unit is used for sending an interrupt signal to the second system when the timing time of the timer is over, wherein the interrupt signal is used for triggering the second system to synchronize the local time according to the timestamp and the timing duration of the timer.
5. An asynchronous system clock synchronization apparatus, comprising:
the first receiving unit is used for receiving a timestamp sent by a first system, wherein the timestamp is sent to the first system by a clock source system;
a second receiving unit, configured to receive an interrupt signal sent by the clock source system, where the interrupt signal is sent by the clock source system when a timer finishes timing, and the timer is started while the clock source system acquires the timestamp;
and the clock synchronization unit is used for synchronizing the local time according to the timestamp and the timing duration of the timer.
6. An asynchronous system clock synchronization apparatus, comprising:
the receiving unit is used for receiving the time stamp sent by the clock source system;
and the first sending unit is used for sending the time stamp to the second system.
7. An asynchronous system clock synchronization system comprising a first system, a second system and a clock source system tracked by said first system, wherein:
the clock source system is used for acquiring a timestamp and starting a timer; sending the acquired timestamp to the first system; when the time counted by the timer is over, sending an interrupt signal to the second system;
the first system is used for sending the time stamp to the second system;
and the second system is used for synchronizing the local time according to the timestamp and the timing duration of the timer when the interrupt signal is received.
8. A computing device comprising at least one processor and at least one memory, wherein the memory stores a computer program that, when executed by the processor, causes the processor to perform the steps of the method of any of claims 1 to 3.
9. A computer-readable medium, in which a computer program is stored which is executable by a computing device, the program, when run on the computing device, causing the computing device to perform the steps of the method of any one of claims 1 to 3.
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