Disclosure of Invention
In order to improve the above problem, some aspects of the present disclosure provide a power conversion apparatus. The power conversion device comprises a plurality of resonance conversion circuits, a controller, a frequency processing circuit and a signal modulation circuit. The resonant conversion circuits are used for respectively generating a plurality of output voltages, wherein the outputs of the resonant conversion circuits are coupled in series to combine the output voltages into a total output voltage, and each resonant conversion circuit comprises a set of switching elements. The controller is used for generating a first switching frequency based on a first voltage difference and generating at least one offset frequency based on at least one second voltage difference, wherein the first voltage difference is a difference between a total output voltage and a first reference voltage, and the at least one second voltage difference is generated according to at least one first output voltage in the output voltages. The frequency processing circuit is used for generating at least one second switching frequency according to the at least one offset frequency and the first switching frequency. The signal modulation circuit is used for generating a first group of switching signals according to a first switching frequency and generating at least one second group of switching signals according to at least one second switching frequency so as to respectively control the switching elements of each of the plurality of resonance conversion circuits.
In some embodiments, the resonant converting circuits include a three-phase resonant converting circuit, a half-bridge resonant converting circuit, or a full-bridge resonant converting circuit.
In some embodiments, the controller comprises: a first proportional integral controller module for generating the first switching frequency based on the first voltage difference; and at least one second proportional-integral controller module for generating the at least one offset frequency based on the at least one second voltage difference.
In some embodiments, the frequency processing circuit comprises: at least one operational circuit for subtracting the at least one offset frequency from the first switching frequency to generate the at least one second switching frequency.
In some embodiments, the frequency processing circuit comprises a plurality of limiters for respectively limiting the first switching frequency and the at least one second switching frequency within a predetermined frequency range.
In some embodiments, the frequency processing circuit is further configured to adjust the first switching frequency according to the at least one offset frequency.
In some embodiments, the frequency processing circuit comprises: a first operation circuit for adding an average value of the at least one offset frequency and the first switching frequency to adjust the first switching frequency to a third switching frequency; and at least one second operational circuit for generating the at least one second switching frequency according to the at least one offset frequency and the third switching frequency.
In some embodiments, the power conversion apparatus further comprises: a first operational circuit for subtracting the total output voltage from the first reference voltage to generate the first voltage difference; an averaging circuit for generating an average voltage according to the total output voltage and a predetermined value, wherein the predetermined value is the number of the resonant converting circuits; and at least one second operational circuit for subtracting the at least one first output voltage from the average voltage to generate the at least one second voltage difference.
In some embodiments, the power conversion apparatus further comprises: at least one first operational circuit for subtracting a second output voltage from the at least one first output voltage to generate at least one comparison voltage difference; and at least one second operational circuit for subtracting the at least one comparison voltage difference from a second reference voltage to generate the at least one second voltage difference.
In some embodiments, the resonant converting circuit includes a first resonant converting circuit and at least one second resonant converting circuit, the first set of switching signals is used to control the set of switching elements of the first resonant converting circuit to adjust the second output voltage, and the at least one second set of switching signals is used to control the set of switching elements of the at least one second resonant converting circuit to adjust the at least one first output voltage.
A control method, comprising: combining the plurality of output voltages into a total output voltage; generating a first switching frequency based on a first voltage difference, and generating at least one offset frequency based on at least one second voltage difference, wherein the first voltage difference is a difference between a total output voltage and a first reference voltage, and the at least one second voltage difference is generated according to at least one first output voltage in the output voltages; generating at least one second switching frequency according to the at least one offset frequency and the first switching frequency; and generating a first group of switching signals according to the first switching frequency and generating at least one second group of switching signals according to at least one second switching frequency so as to respectively control the switching elements of each of the plurality of resonant conversion circuits.
In some embodiments, wherein generating the at least one second switching frequency further comprises: subtracting the at least one offset frequency from the first switching frequency to generate the at least one second switching frequency.
In some embodiments, the method further comprises: the first switching frequency and the at least one second switching frequency are limited within a predetermined frequency range.
In some embodiments, the control method further comprises: the first switching frequency is adjusted according to the at least one offset frequency.
In some embodiments, adjusting the first switching frequency further comprises: adding an average value of the at least one offset frequency to the first switching frequency to adjust the first switching frequency to a third switching frequency; and generating the at least one second switching frequency according to the at least one offset frequency and the third switching frequency.
In some embodiments, the control method further comprises: subtracting the total output voltage from the first reference voltage to generate the first voltage difference; generating an average voltage according to the total output voltage and a preset value, wherein the preset value is the number of the resonance conversion circuits; and subtracting the at least first output voltage from the average voltage to generate the at least one second voltage difference.
In some embodiments, the control method further comprises: subtracting a second output voltage from the at least one first output voltage to generate at least one comparison voltage difference; and subtracting the at least one comparison voltage difference from a second reference voltage to generate the at least one second voltage difference.
In some embodiments, the control method further comprises: the first group of switching signals and the at least one second group of switching signals are used for respectively controlling the group of switching elements of the resonance conversion circuit so as to adjust the output voltage.
In summary, the power conversion apparatus and the control method of the power conversion apparatus provided in the embodiments of the present disclosure can avoid the occurrence of uneven output voltages of each stage of the resonant conversion circuit.
Drawings
The drawings of the disclosure illustrate as follows:
fig. 1 is a schematic diagram of a power conversion device according to some embodiments of the present disclosure;
FIG. 2A is a schematic diagram of an arrangement of multiple resonant conversion circuits, according to some embodiments of the present disclosure;
fig. 2B is a partial circuit schematic diagram of a power conversion device according to some embodiments of the present disclosure;
FIG. 2C is a schematic diagram of a voltage generation circuit according to some embodiments of the present disclosure;
fig. 2D is a partial circuit schematic of a power conversion device according to some embodiments of the present disclosure;
FIG. 3A is a schematic diagram illustrating a plurality of three-phase resonant conversion circuits, in accordance with some embodiments of the present disclosure;
FIG. 3B is a schematic diagram of a half-bridge resonant conversion circuit according to some embodiments of the present disclosure;
FIG. 3C is a schematic diagram of a full bridge resonant conversion circuit according to some embodiments of the present disclosure; and
FIG. 4 is a flow chart illustrating a control method according to some embodiments of the present disclosure.
Wherein the reference numerals are as follows:
100: power supply conversion device
110: resonance converting circuit
120: controller
121: proportional integral controller module
122: proportional integral controller module
130: frequency processing circuit
132. 133: limiting device
140: signal modulation circuit
141. 142: signal modulator
210: voltage generation circuit
211. 213, 214, 215, 231, 234: arithmetic circuit
212: averaging circuit
310: switching element
320: resonant circuit
330: transformer device
340: rectifying circuit
S410, S420, S430, S440, S450, S460: operation of
Ns 1: primary winding
Ns2, Ns21, Ns 22: secondary winding
Cout: output capacitor
Vref: a first reference voltage
Vref 2: second reference voltage
Vin, Vin1, Vin 2: input voltage
VinN: nth input voltage
Vout: total output voltage
Vout1, Vout 2: output voltage
S1-S6: a first set of switching signals
S7-S12: second group of switching signals
Δ Vout, Δ Vout 2: voltage difference
Δ Vout 12: comparing the voltage differences
F11, F12, F21, F22, F11-1, F12-1: switching frequency
Δ f 2: offset frequency
Δ fav: offset frequency mean
Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10: switch with a switch body
Detailed Description
The words used throughout this document generally represent their ordinary meaning, and specific terms are defined below to provide additional guidance to the practitioner. For convenience, certain terminology may be specifically identified, e.g., using italics and/or quotation marks. The scope and meaning of the words used herein are not affected to any degree, regardless of whether they are specifically identified, and are intended to be equivalent to the scope and meaning of the ordinary words. It is to be understood that the same thing can be described in more than one way. Thus, alternative language and synonyms for one or more terms may be used herein, and are not intended to state that a term has any special meaning in what is discussed herein. Synonyms for certain words will be used, with repeated use of one or more synonyms not precluding use of other synonyms. Any examples discussed in this specification are intended for illustrative purposes only and are not intended to limit the scope or meaning of the invention or of the examples in any way. Likewise, the invention is not limited to the various embodiments set forth in this specification.
It will be understood that the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections. These elements, components, regions, layers and/or regions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure.
As used herein, the terms "a" and "an" can refer broadly to a single or a plurality of items, unless the context specifically states otherwise. It will be further understood that the terms "comprises," "comprising," "includes," "including," "has," "having," and similar language, when used herein, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Unless defined otherwise, all words (including technical and scientific terms) used herein have their ordinary meaning as is understood by those skilled in the art. Furthermore, the definitions of the above-mentioned words in commonly used dictionaries should be interpreted as having a meaning consistent with the context of the present invention. Unless specifically defined otherwise, these terms are not to be interpreted in an idealized or overly formal sense.
When an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or an additional element may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no additional elements present.
The term (terms) used throughout the specification and claims has the ordinary meaning as commonly understood in each term used in the art, in the disclosure herein, and in the specific context, unless otherwise indicated. Certain words used to describe the disclosure are discussed below or elsewhere in this specification to provide additional guidance to those skilled in the art in describing the disclosure.
In the following description, numerous implementation details are set forth in order to provide a more thorough understanding of the present disclosure. It should be understood, however, that these implementation details are not to be interpreted as limiting the invention. That is, in some embodiments of the disclosure, such practical details are not necessary. In addition, some conventional structures and elements are shown in the drawings in a simple schematic manner for the sake of simplifying the drawings.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a power conversion apparatus 100 according to some embodiments of the present disclosure. As shown in fig. 1, in some embodiments, the power conversion apparatus 100 includes a plurality of resonant conversion circuits 110, a controller 120, a frequency processing circuit 130, and a signal modulation circuit 140.
Structurally, the control input terminals of the resonant converting circuits 110 are electrically coupled to the signal modulating circuit 140 to receive the switching signals (e.g., S1-S6 and S7-S12 in fig. 2A) and control the output voltages (e.g., Vout1, Vout2, …, Voutn in fig. 2A) of the resonant converting circuits 110 according to the switching signals, which will be described in the following embodiments. The output terminals of the resonant converting circuits 110 are electrically coupled to the controller 120. The controller 120 receives the output voltages generated by the resonant converting circuits 110 and the first reference voltage Vref. The frequency processing circuit 130 is between the controller 120 and the signal modulation circuit 140 to generate a specific frequency. It should be noted that the controller 120, the frequency processing circuit 130 and the signal modulation circuit 140 may be implemented by discrete analog circuits or may be implemented by a processing Unit, and the processing Unit may be implemented by a Microcontroller (MCU), a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA) and other different manners.
In some embodiments, the resonant converting circuits 110 may include a three-phase resonant converting circuit, a half-bridge converting circuit, or a full-bridge converting circuit.
Referring to fig. 2A, fig. 2A is a schematic diagram illustrating an arrangement of the plurality of resonant conversion circuits 110 of fig. 1 according to some embodiments of the present disclosure. For ease of understanding, like elements in fig. 1 and 2A will be designated with like element numbers.
As shown in fig. 2A, an input voltage Vin is provided for the plurality of resonant conversion circuits 110 to generate a total output voltage Vout, and each resonant conversion circuit 110 has an input capacitor with voltages ranging from the input voltage Vin1, the input voltage Vin2 to the input voltage VinN in sequence. In some embodiments, N is a predetermined value, is a positive integer greater than or equal to 2, and is the number of the resonant converting circuits 110.
In some embodiments, the resonant converting circuit 110 receives the first set of switching signals S1-S6 to adjust the output voltage Vout1, and the resonant converting circuit 110 receives the second set of switching signals S7-S12 to adjust the output voltage Vout 2. And so on, the last resonant converting circuit 110 can generate an output voltage VoutN according to a corresponding set of switching signals (not shown) and the input voltage VinN. As shown in fig. 2A, the outputs of the plurality of resonant conversion circuits 110 are coupled in series. Thus, the output voltages Vout1 VoutN can be combined into the total output voltage Vout.
Referring to fig. 2B, fig. 2B is a schematic diagram illustrating a portion of the circuitry of the power conversion apparatus 100 of fig. 1 according to some embodiments of the present disclosure. For ease of understanding, similar elements in fig. 1-2B are designated with the same reference numerals.
For ease of explanation, the following example takes two resonant converting circuits 110 as an example, i.e., the preset value N is 2. In this example, the power conversion apparatus 100 further includes a voltage generation circuit 210. The voltage generating circuit 210 is used for generating at least one voltage signal to the controller 120 based on the total output voltage Vout and the first reference voltage Vref.
For example, the voltage generating circuit 210 includes an arithmetic circuit 211, at least one averaging circuit 212, and at least one arithmetic circuit 213. The operation circuit 211 subtracts the total output voltage Vout from the first reference voltage Vref to generate a voltage difference Δ Vout. The at least one averaging circuit 212 is used for generating an average voltage VA according to the total output voltage Vout and a predetermined value N. The at least one operational circuit 213 subtracts the output voltage Vout2 from the average voltage VA to generate a voltage difference Δ Vout 2.
In some embodiments, the first reference voltage Vref is an external input signal for assisting in adjusting the total output voltage Vout. In this case, the first reference voltage Vref may be a target voltage for which the total output voltage Vout is expected.
In some embodiments, the controller 120 receives the voltage difference Δ Vout and the voltage difference Δ Vout2 and calculates the switching frequency F11 and the offset frequency Δ F2, respectively.
In some embodiments, the controller 120 includes a plurality of proportional-integral-derivative (PID) controller modules. It should be understood that the pid controller module is a feedback loop circuit or algorithm in industrial control applications, and the relevant parameters inside the pid controller module can be set according to actual requirements to be a proportional controller module, an integral controller module, a derivative controller module or any combination thereof, and the controller 120 can also be implemented by various control methods known to those skilled in the art, such as fuzzy control. In this example, the controller 120 includes a Proportional Integral (PI) controller block 121 and a Proportional Integral (PI) controller block 122.
In some embodiments, the proportional integral controller module 121 is configured to generate the switching frequency F11 based on the voltage difference Δ Vout. In some embodiments, the proportional-integral controller module 122 is configured to generate the offset frequency Δ f2 based on the voltage difference Δ Vout 2. Here, since the resonant converting circuit 110 needs to be controlled, the output of the resonant converting circuit 110 is adjusted by generating a corresponding switching frequency according to the difference between the output voltage and the target voltage. For example, taking the resonant conversion circuit 110 as an LLC series resonant circuit as an example, the output voltage can be increased by lowering the switching frequency to increase the gain of the converter. Therefore, in the present embodiment, the voltage difference Δ Vout is not limited to be the subtraction of the total output voltage Vout from the first reference voltage Vref, and the total output voltage Vout may also be the subtraction of the first reference voltage Vref from the total output voltage Vout, as long as the proportional-integral controller module 121 is properly designed, and the output voltage approaches the first reference voltage Vref according to the corresponding adjustment direction generated by the voltage difference Δ Vout, which can be understood by those skilled in the art according to the basic feedback control theory, and will not be described herein again.
In some embodiments, the frequency processing circuit 130 generates the switching frequency F21 according to the switching frequency F11 and the offset frequency Δ F2. For example, the frequency processing circuit 130 includes at least one operation circuit 231 for subtracting the offset frequency Δ F2 from the switching frequency F11 to generate the switching frequency F21.
In some embodiments, the frequency processing circuit 130 further includes a limiter 132 and a limiter 133 for limiting the maximum value and the minimum value of the switching frequency F11 and the switching frequency F21, respectively, to output the switching frequency F12 and the switching frequency F22.
In some embodiments, the limiter 132 and the limiter 133 are only operated to ensure that all switching frequencies are within the predetermined frequency range. In some embodiments, the limiter 132 and the limiter 133 may be implemented by determining upper and lower limits of a value through software, but the disclosure is not limited thereto.
In some embodiments, the signal modulation circuit 140 receives the switching frequency F12 and the switching frequency F22. The signal modulation circuit 140 includes a plurality of signal modulators 141 and 142. The signal modulator 141 generates the first group of switching signals S1S 6 according to the switching frequency F12. The signal modulator 142 generates the second group of switching signals S7S 12 according to the switching frequency F21. The first group of switching signals S1-S6 and the second group of switching signals S7-S12 respectively control internal switching elements (such as a switching element 310 described later) of the two resonant converting circuits 110, wherein the two resonant converting circuits 110 respectively generate output voltages Vout1 and Vout 2. The specific number of each switching signal set may vary according to the type of resonant converting circuit 110, and thus may include one or more switching signals, but all are generated according to the switching frequency, as will be described in detail later.
In some embodiments, each of the signal modulators 141 and 142 may be implemented by a pulse width modulation circuit, but the disclosure is not limited thereto.
In some related technologies, a plurality of resonant converting circuits with outputs connected in series are controlled independently of each other to individually adjust the output voltage generated by each stage of the resonant converting circuit. However, the control method may cause the voltage output of each resonant converting circuit to be unequal. Compared with the above-mentioned technology, in the embodiment of the present disclosure, the switching frequency F11 and the offset frequency Δ F2 are adjusted in a linked manner, so that the total output voltage Vout meeting the requirement can be generated, and the output voltage Vout1 and the output voltage Vout2 can be balanced at the same time, so that the output voltage of each switching circuit can be balanced while the total output voltage is maintained even after the allowable deviation exists between the elements of each switching circuit or the load is dynamically switched. It should be noted that, in the embodiment of the disclosure, since the switching frequency F21 is generated by the switching frequency F11 and the offset frequency Δ F2, and the offset frequency Δ F2 is generated according to the voltage difference Δ Vout2, the switching frequency F11 and the switching frequency F21 are substantially equal, and it is easier to design the emi suppression circuit compared to the conventional independent control.
Referring to fig. 2C, fig. 2C is a schematic diagram of a voltage generation circuit 210 according to other embodiments of the present disclosure. For ease of understanding, similar elements in FIGS. 2B-2C are designated with the same reference numerals. In contrast to fig. 2B, in this example, the voltage generating circuit 210 generates the aforementioned voltage difference Δ Vout2 according to a second reference voltage Vref 2. Wherein the second reference voltage Vref2 may be fixed to 0. Thus, it is more intuitive and faster to set the second reference voltage Vref 2.
In this example, the voltage generating circuit 210 further includes an operation circuit 214 and an operation circuit 215. The operation circuit 214 subtracts the output voltage Vout1 from the output voltage Vout2 to generate a comparison voltage difference Δ Vout 12. The operation circuit 215 subtracts the comparison voltage difference Δ Vout12 from the second reference voltage Vref2 to generate the voltage difference Δ Vout 2.
Referring to fig. 2D, fig. 2D is a schematic circuit diagram illustrating a portion of the power conversion apparatus 100 of fig. 1 according to still other embodiments of the disclosure. For ease of understanding, similar elements in fig. 2B-2D are all designated with the same reference numerals.
Compared to fig. 2B, in some embodiments, the frequency processing circuit 130 is further configured to adjust the switching frequency F11 according to the offset frequency Δ F2. In some embodiments, the frequency processing circuit 130 further calculates an offset frequency average value Δ fav according to the offset frequency Δ f 2. The average offset frequency Δ fav can be obtained by the following equation:
in some embodiments, depending on the number of the resonant converting circuits 110, the controller 120 correspondingly generates a plurality of offset frequencies for calculating the offset frequency average value Δ fav. For example, in this example, the preset value N is 2, so the offset frequency average value Δ fav is Δ f 2.
The frequency processing circuit 220 further adds the offset frequency average Δ fav to the switching frequency F11 to generate the switching frequency F11-1. Then, the limiter 132 generates the switching frequency F12-1 according to the switching frequency F11-1 for the subsequent signal modulation circuit 140.
In this example, the frequency processing circuit 130 further includes an arithmetic circuit 234. The computing circuit 234 is used for adding the offset frequency average Δ fav and the switching frequency F11 to adjust the switching frequency F11 to be the switching frequency F11-1. Compared to fig. 2B, the operational circuit 231 subtracts the offset frequency Δ F2 from the switching frequency F11-1 to generate the switching frequency F21.
In some embodiments, the switching frequency F11-1 is the average value Δ fav of the offset frequency plus the switching frequency F11, and the switching frequency F21 is the switching frequency F11-1 minus the offset frequency Δ F2. Thus, the adjustment between the output voltage and the switching frequency of each resonant converting circuit 110 can be performed by a feedback overall control method to more efficiently perform voltage-sharing control. Thus, the adjustment time required for the overall voltage control can be reduced.
The above embodiments are described by taking N ═ 2 as an example, and the number of circuits in the above embodiments is merely an example, and the disclosure is not limited thereto. For example, if N is 3, as shown in fig. 2A, the resonant converting circuit 110, which generates the output voltage Vout3 (i.e., VoutN), needs to be controlled. Under the condition, an additional set of circuits and/or modules may be added to the above embodiments, and the set of circuits and/or modules and the circuits and/or modules for generating the switching signals S7-S12 have the same configuration, wherein the operation circuit 213 (or the operation circuit 214) in the set of circuits and/or modules receives the output voltage Vout3 instead of the output voltage Vout 2. Thus, by the same operation as described above, another set of switching signals can be generated to control the resonant converting circuit 110 for generating the output voltage Vout 3. By analogy, the circuit arrangement of the embodiments of the present disclosure can be applied to the resonant converting circuit 110 having N stages.
Referring to fig. 3A, fig. 3A is a schematic diagram of a plurality of three-phase resonant conversion circuits, shown in accordance with some embodiments of the present disclosure. The multiple three-phase resonant conversion circuits of fig. 3A may be used to implement the two resonant conversion circuits 110 of fig. 2A. For ease of understanding, like elements in fig. 2A and 3A will be designated with like reference numerals.
In this example, the plurality of three-phase resonant conversion circuits includes two three-phase resonant conversion circuits including a switching element 310, a resonant circuit 320, a transformer 330, and a rectifying circuit 340. The switch element 310 is electrically connected to the resonant circuit 320, wherein the switch element 310 comprises two sets of switches, a first set of switches (the switches Q1-Q6) is selectively turned on according to the first set of switching signals S1-S6, and a second set of switches (the switches Q1-Q6) is selectively turned on according to the second set of switching signals S7-S12. The transformer 330 includes a primary winding Ns1 and a secondary winding Ns2, and the primary winding Ns1 is electrically connected to the resonant circuit 320. The rectifying circuit 340 is electrically connected to the secondary winding Ns2 of the transformer 330 to generate the total output voltage Vout.
In detail, the resonant circuit 320, the transformer 330, and the first portion of the rectifying circuit 340 and the plurality of switches Q1-Q6 form the resonant converting circuit 110 for generating the output voltage Vout1 in fig. 2A, wherein the switches Q1-Q6 are respectively controlled by the switching signals S1-S6. Similarly, the resonant circuit 320, the transformer 330, and the second portion of the rectifying circuit 340 and the plurality of switches Q7-Q12 form the resonant converting circuit 110 of fig. 2A for generating the output voltage Vout2, wherein the switches Q7-Q12 are respectively controlled by the switching signals S7-S12. In this example, each resonant conversion circuit 110 is a three-phase resonant conversion circuit, and has three arms composed of six switches, so that six switching signals S1 to S6 are required, and six switching signals S1 to S6 are generated according to the switching frequency, and only phase-interleaved Control (Interleaving Control) is performed between the arms.
In some embodiments, the rectifying circuit 340 is electrically connected to the primary winding Ns1 and the secondary winding Ns2 of the transformer 330, and is used for rectifying the current output by the primary winding Ns1 and the secondary winding Ns2 induced by the signal change, so as to provide the total output voltage Vout across the output terminals.
Referring to fig. 3B, fig. 3B is a schematic diagram of a half-bridge resonant conversion circuit according to some embodiments of the present disclosure. The half-bridge resonant switching circuit of fig. 3B can be used to implement the resonant switching circuit 110 of fig. 2A. For ease of understanding, the resonant converting circuit 110 of the nth stage is taken as an example for explanation, and the same elements in fig. 2A and fig. 3B will be designated by the same reference numerals.
In fig. 3B, the half-bridge resonant conversion circuit includes a switching element 310, a resonant circuit 320, a transformer 330, and a rectifying circuit 340. The switch element 310 includes a switch Q1 and a switch Q2, which are only exemplary, but the disclosure is not limited thereto. In this example, each resonant converting circuit 110 is a half-bridge resonant converting circuit having two switches forming a single bridge arm, so that only two switching signals are required to control S1-S2.
In some embodiments, the primary side of the transformer 330 includes a set of primary windings Ns 1. The secondary side of the transformer 330 includes two sets of secondary windings Ns21 and Ns22, wherein a start terminal of the secondary winding Ns22 is electrically coupled to an end terminal of the secondary winding Ns21, and is electrically coupled to the output capacitor Cout.
In other embodiments, the transformer 330 may be a transformer with only one set of secondary windings on the secondary side, and may be configured with a bridge rectifier circuit, and the secondary side and the rectifier circuit may be implemented according to any form known to those skilled in the art.
Referring to fig. 3C, fig. 3C is a schematic diagram of a full-bridge resonant conversion circuit according to some embodiments of the present disclosure. The full bridge resonant switching circuit of fig. 3C may be used to implement the resonant switching circuit 110 of fig. 2A. For ease of understanding, the resonant converting circuit 110 of the nth stage is taken as an example for explanation, and the same elements in fig. 2A and 3C will be designated by the same reference numerals.
In fig. 3C, the full-bridge resonant converting circuit includes a switching element 310, a resonant circuit 320, a transformer 330, and a rectifying circuit 340. The switch element 310 includes a switch Q1, a switch Q2, a switch Q3 and a switch Q4, which are only exemplary and not limited thereto.
In some embodiments, the transformer 330 may also be a transformer with only one set of secondary windings on the secondary side, and may be configured with a bridge rectifier circuit, and the secondary side and its rectifier circuit may be implemented according to any form known to those skilled in the art.
FIG. 4 is a flow chart illustrating a control method according to some embodiments of the present disclosure. For ease of understanding, please refer to fig. 1 to 3C together. In some embodiments, fig. 4 may be used for output voltage grading control of multiple resonant converting circuits 110.
In operation S410, the voltage generation circuit 210 receives the first reference voltage Vref, the total output voltage Vout, and the first output voltage Vout 2.
In operation S420, the first reference voltage Vref is compared with the total output voltage Vout to calculate a first voltage difference Δ Vout. The total output voltage Vout is divided by a predetermined value to generate an average voltage, and the average voltage is compared with the first output voltage Vout2 to calculate a second voltage difference Δ Vout 2.
In some embodiments, the total output voltage Vout and a predetermined value are averaged by an averaging circuit to generate an average voltage, wherein the predetermined value is the number of resonant converting circuits included in the plurality of resonant converting circuits 110.
In operation S430, the controller 120 calculates a first switching frequency F11 by receiving the first voltage difference Δ Vout and calculates an offset frequency Δ F2 by receiving the second voltage difference Δ Vout 2.
In operation S440, the clock processing circuit 130 receives the first switching frequency F11 and the offset frequency Δ F2, and subtracts the offset frequency Δ F2 from the first switching frequency F11 by an operation circuit to generate the second switching frequency F21.
In operation S450, the frequency processing circuit 130 respectively generates the first switching frequency F12 and the second switching frequency F22 by respectively passing the first switching frequency F11 and the second switching frequency F21 through the limiter 132 and the limiter 133, so as to ensure that all the switching frequencies are within the predetermined frequency range.
In operation S460, the signal modulation circuit 140 receives the first switching frequency F12 and the second switching frequency F22. The signal modulation circuit 140 generates a first group of switching signals S1-S6 according to the first switching frequency F12 and generates a second group of switching signals S7-S12 according to the second switching frequency F21 to control the switching element 310.
By the above control method, the total output voltage Vout, the second output voltage Vout1 and the first output voltage Vout2 of the resonant converting circuits 110 can be controlled, so as to ensure that the total output voltage Vout meets the requirements and achieve the purpose of balancing the output voltages of the various stages.
The operations in the control method of fig. 4 are only examples, and are not limited to be executed in the order in this example. Various operations under the control method may be added, substituted, omitted, or performed in a different order, as appropriate, without departing from the manner and scope of operation of various embodiments of the disclosure.
In summary, the power conversion apparatus and the control method of the power conversion apparatus provided in the embodiments of the present disclosure can avoid the occurrence of uneven output voltages of each stage of the resonant conversion circuit.
Although the present disclosure has been described with reference to the above embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and therefore, the scope of the disclosure should be determined by that defined in the appended claims.