CN111834476A - A kind of solar cell and preparation method thereof - Google Patents

Abstract

The invention discloses a solar cell and a preparation method thereof, belongs to the technical field of solar cells, and solves the problems of high leakage current of the solar cell in the prior art, resulting in low yield of the cell and the like. The present invention provides a solar cell, comprising a silicon substrate, the front surface of the silicon substrate includes a first surface, the first surface includes a doped region and an undoped region, and the undoped region is distributed in the doped region The surrounding edge region of the doped region, the width of the undoped region does not exceed 2mm, and the upper surface of the doped region is provided with a doped layer. The leakage current of the solar cell of the present invention is low.

Description

A kind of solar cell and preparation method thereof

technical field

The invention belongs to the technical field of solar cells, and particularly relates to a solar cell and a preparation method thereof.

Background technique

Human existence and development are inseparable from energy. Solar energy is one of the most advantageous renewable, large-scale and clean energy sources. Crystalline silicon solar cells are a class of semiconductor devices that directly convert light energy into electrical energy. High-efficiency photoelectric conversion rate and low cost of use are the desires of human beings for crystalline silicon solar cells. High-efficiency solar cells must have good surface passivation, low surface recombination rate, and thus high open-circuit voltage, short-circuit current, and conversion efficiency. At present, the surface passivation mainly consists of single-layer or multi-layer dielectric film structures such as silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide. However, after the surface passivation is done, metallization is required. At this time, the passivation film under the printed metal will inevitably be destroyed, resulting in a large recombination of the metal contact area, thereby reducing the performance of the battery such as open circuit voltage. The use of point-contact electrodes or similar methods can only alleviate but not eradicate this problem to a certain extent.

In recent years, passivation contacts have attracted much attention in the field of crystalline silicon solar cells, and various research institutions have also developed more efficient passivation contact solar cells, which mainly use ultra-thin oxide layers and grow on the oxide layers. A layer of doped crystalline silicon film, followed by doping of the crystalline silicon film. While the battery can achieve better passivation, it also reduces the recombination caused by metal contact. However, the area of the battery continues to increase, and the short-circuit current of the high-efficiency battery continues to increase. In order to ensure the reliability of the components, higher requirements are constantly placed on the leakage of the battery.

SUMMARY OF THE INVENTION

In view of the above analysis, the present invention aims to provide a solar cell and a preparation method thereof, which can at least solve one of the following technical problems: (1) the leakage current of the existing solar cell is high, resulting in a low yield rate of the cell; (2) ) The reliability of solar cell modules is low.

The object of the present invention is mainly achieved through the following technical solutions:

In one aspect, the present invention provides a solar cell, comprising a silicon substrate, a front surface of the silicon substrate includes a first surface, the first surface includes a doped region and an undoped region, and the undoped region is distributed in In the surrounding edge regions of the doped region, the width of the undoped region does not exceed 2 mm, and the upper surface of the doped region is provided with a doped layer.

Further, the upper surface of the doped region is a textured surface, and the upper surface of the undoped region is a polished surface.

Further, a first composite passivation film is provided on the upper surface of the undoped region and the doped layer, and a front electrode is provided on the upper surface of the first composite passivation film.

Further, a passivation medium layer, a selective carrier transport layer, a second composite passivation film and a back surface electrode are sequentially provided on the backside of the silicon substrate along the direction away from the silicon substrate.

Further, the passivation medium layer is a single-layer film or a multi-layer film of a silicon oxide layer, an aluminum oxide layer, a titanium oxide layer and a silicon oxynitride layer.

Further, the selective carrier transport layer is one or more stacked silicon thin films of a microcrystalline silicon thin film layer, an amorphous silicon thin film layer and a polycrystalline silicon thin film layer.

Further, the conductivity type of the doped layer is opposite to or the same as the conductivity type of the silicon substrate.

On the other hand, the present invention provides a method for preparing a solar cell, comprising the following steps:

S1. Provide a silicon substrate, and clean and texture the silicon substrate;

S2, the front side is doped to form a doped layer;

S3, remove the doping on the backside and the doping around the edges of the front side, and form an undoped area on the front side;

S4, remove the remaining silicon glass on the front side.

Further, after S4 also includes:

S5, preparing a passivation dielectric layer on the backside of the silicon substrate;

S6, preparing a selective carrier transport layer on the passivation dielectric layer;

S7, backside doping, doping or activating the selective carrier transport layer;

S8, preparing a composite passivation film;

S9, preparing electrodes and sintering to obtain solar cells.

Further, removing the doping on the back side in the step S3, and forming an undoped region on the front side includes the following steps:

S31. First, place the front side of the silicon wafer in a chain-type single-sided engraving equipment, and use HF solution to perform single-sided engraving on the back side to ensure that the liquid level of the solution is close to the front surface of the silicon wafer, so as to remove the silicon glass formed by diffusion on the back side. At the same time, the chemical solution is turned to the surrounding of the front, and the area does not exceed 2mm. At this time, the silicon glass around the front is thinned or completely etched;

S32, the silicon wafer is then put into NaOH or TMAH to polish the back surface; at this time, while the back surface is polished, the periphery of the front surface is also polished to form an undoped area.

Further, the thickness of the passivation medium layer is 0.1 nm˜10.0 nm.

Further, the thickness of the selective carrier transport layer ranges from 10 nm to 300 nm.

Compared with the prior art, the present invention can achieve at least one of the following technical effects:

(1) An undoped area is provided on the periphery of the front surface of the solar cell of the present invention, and the undoped area increases the distance between the edge of the doped layer and the edge of the back doped layer (ie, the selective carrier transport layer) , to ensure that the edge of the doped layer is completely disconnected from the edge of the back doped layer (ie, the selective carrier transport layer), which can achieve lower leakage current, improve the parallel resistance of the battery, and improve the yield of the battery.

(2) The leakage current of the solar cell of the present invention is low, so the modules prepared by using the solar cell of the present invention have higher reliability.

Other features and advantages of the present invention will be set forth in the description which follows, and in part may become apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.

Description of drawings

The drawings are for the purpose of illustrating specific embodiments only and are not to be considered limiting of the invention, and like reference numerals refer to like parts throughout.

1 is a schematic structural diagram of a solar cell of the present invention;

Fig. 2 is the process flow diagram of the preparation method of the solar cell of the present invention;

Fig. 3 is the structural schematic diagram after the texturing of the present invention;

4 is a schematic view of the structure of the present invention after the front side doping;

FIG. 5 is a schematic structural diagram of removing back doping and front borosilicate glass according to the present invention;

6 is a schematic structural diagram of the present invention after preparing a passivation dielectric layer;

7 is a schematic structural diagram of the present invention after preparing the selective carrier transport layer;

FIG. 8 is a schematic structural diagram of the composite passivation film prepared according to the present invention.

Reference number:

1-silicon substrate, 1-1-doped region, 1-2-undoped region, 2-doped layer, 3-first composite passivation film, 4-front electrode, 5-passivation dielectric layer, 6 -Selective carrier transport layer, 7-Second composite passivation film, 8-Back electrode.

Detailed ways

A solar cell and its preparation method are further described in detail below with reference to specific examples. These examples are only used for comparison and explanation purposes, and the present invention is not limited to these examples.

Various schematic diagrams of structures according to embodiments of the present invention are shown in the accompanying drawings. The figures are not to scale, some details have been exaggerated for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships are only exemplary, and in practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art should Regions/layers with different shapes, sizes, relative positions can be additionally designed as desired.

In the context of the present invention, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present therebetween. element. In addition, if a layer/element is "on" another layer/element in one orientation, then when the orientation is reversed, the layer/element can be "under" the other layer/element.

In the prior art, a part of the surrounding edge of the doped layer on the front side of some cells is etched back, resulting in a higher edge reflectivity, but the doped layer still exists. The effect of this kind of battery is not fundamentally different from the structure of ordinary batteries, and it cannot greatly reduce the short-circuit current of the battery. Because the edge insulation of this kind of cell still relies on the wet etching process to remove the doping emission of the back and side edges. As for the front side will be engraved back by the process, resulting in the increase of the reflectivity of the most edge, which is also the effect of the conventional process. Therefore, the prior art cannot completely and better reduce the short-circuit current of the battery.

The present invention discloses a solar cell, as shown in FIG. 1, comprising a silicon substrate 1, the front surface of the silicon substrate 1 includes a first surface, the first surface includes a doped region 1-1 and an undoped region 1-2, The doped region 1-2 is distributed in the surrounding edge regions of the doped region 1-1, and the upper surface of the doped region 1-1 is provided with a doped layer 2; the width of the undoped region 1-2 does not exceed 2 mm.

Specifically, the upper surface of the doped region is a textured surface, and the upper surface of the undoped region is a polished surface.

Specifically, the conductivity type of the doped layer 2 is the same as or opposite to that of the silicon substrate 1 , the undoped region 1 - 2 and the upper surface of the doped layer 2 are provided with a first composite passivation film 3 . The upper surface of the passivation film 3 is provided with a front electrode 4; the back surface of the silicon substrate 1 is sequentially provided with a passivation medium layer 5, a selective carrier transport layer 6, a second composite passivation film 7 and a passivation medium layer along the direction away from the silicon substrate 1. Back electrode 8.

It is worth noting that if the width of the undoped region 1-2 (the width refers to the distance from the outer edge of the first surface to the outer edge of the doped region 1-1) is too small, on the one hand, the short-circuit current of the battery cannot be If it is reduced to the optimal value, it is not easy to control the process; if the width is too large, the entire area with high reflectivity will increase too much, resulting in a much lower short-circuit current of the battery, which in turn leads to a much lower battery efficiency. Preferably, the width of the undoped region 1-2 is controlled to be 1-2 mm (eg, 1.1 mm, 1.2 mm, 1.3 mm, 1.4 mm, 1.5 mm, 1.6 mm, 1.7 mm, 1.8 mm, 1.9 mm, etc.).

Compared with the prior art, the solar cell of the present invention is provided with an undoped area around the edge of the front surface, and the undoped area increases the distance between the edge of the doped layer and the edge of the back doped layer to ensure the edge of the doped layer. It is completely disconnected from the edge of the back doping layer, which can achieve lower leakage current, improve the parallel resistance of the battery, and improve the yield of the battery.

Specifically, the silicon substrate 1 is an n-type silicon substrate or a p-type silicon substrate.

Specifically, the silicon substrate 1 may be a single crystal silicon substrate or a polycrystalline silicon substrate.

Specifically, the passivation medium layer 5 may be a single layer film or a multi-layer film of a silicon oxide layer, an aluminum oxide layer, a titanium oxide layer and a silicon oxynitride layer.

It should be noted that if the thickness of the passivation dielectric layer 5 is too thick, the carriers cannot form tunneling characteristics, and a passivation contact structure with good performance cannot be formed; if the thickness is too thin, for the selective carrier transport layer The control of the doping amount is very high, which is not conducive to mass production. If the doping amount is slightly larger, the passivation dielectric layer is easily damaged, resulting in the destruction of the performance of the passivation contact structure. Therefore, the thickness of the passivation medium layer 5 is controlled to be 0.1 nm˜10.0 nm.

Specifically, the selective carrier transport layer 6 may be one or several stacked silicon thin films of a doped microcrystalline silicon thin film layer, an amorphous silicon thin film layer and a polycrystalline silicon thin film layer.

It should be noted that if the thickness of the selective carrier transport layer 6 is too large, the short-circuit current will be reduced, and then the cell efficiency will be reduced, because the transmittance of this layer is relatively poor, and it has a certain absorption of light; The material requirements are very high, because the current slurry has a certain burn-through characteristic. If it is too thin, the slurry is easier to burn through. After burning through, the passivation dielectric layer will be destroyed. The voltage, fill factor and efficiency of the entire battery will become lower. Therefore, the thickness of the selective carrier transport layer 6 is controlled to be 10 to 300 nm.

Specifically, the materials of the first composite passivation film 3 and the second composite passivation film 7 are the same. Exemplarily, the composite passivation film may be a single-layer film or a multi-layer film of silicon oxide SiO ₂ , aluminum oxide Al ₂ O ₃ , titanium oxide TiO ₂ , silicon oxynitride SiO _x N _1-x .

Considering that the thickness of the composite passivation film is too thick, it will not only increase the production cost, but also reduce the production capacity, at the same time, it is not conducive to the contact characteristics of the metal contact paste, so that the filling factor and efficiency will be reduced; if the thickness is too thin , cannot provide enough hydrogen to passivate the battery. Therefore, the thicknesses of the first composite passivation film 3 and the second composite passivation film 7 are both controlled to be 1 to 300 nm.

Specifically, the selective carrier transport layer 6 may be n-type doped or p-type doped.

It should be noted that the above-mentioned passivation dielectric layer 5 and selective carrier transport layer 6 may be emitters doped differently from those of the silicon substrate 1 , or may be highly doped back fields with the same doping as the silicon substrate 1 .

The present invention also discloses a method for preparing a solar cell, as shown in Figure 2, comprising the following steps:

S1. Provide a p-type or n-type silicon substrate 1 with a resistivity of 0.1-20Ω·cm, and use NaOH or KOH for texturing on the silicon substrate 1. The structure after texturing is shown in Figure 3, and HCl is applied after texturing. , O ₃ , H ₂ O ₂ , HF, KOH and other mixed solutions for surface cleaning.

S2. Front side doping: on the textured surface of the front side of the silicon substrate 1, a gaseous BCl ₃ or BBr ₃ source is used to perform boron diffusion at 700-1100° C., or a PH ₃ , red phosphorus or B ₂ H ₆ plasma source is used to perform ionization After implantation, doping is performed by annealing at 700-1100°C; the structure of the front-side doping is shown in FIG. 4 . Silicon glass, the backside of the silicon substrate 1 forms a diffusion layer.

S3, removing the doping on the back surface, and forming an undoped region 1-2 on the front surface.

Specifically, removing the doping on the back side in S3, and forming the undoped region 1-2 on the front side includes the following steps:

S301. Place the front side of the silicon wafer in a chain wet etching equipment, use HNO ₃ and HF solution to wet etch the back side, remove the back diffusion layer, and then place it in KOH (or use HF solution below 1%) to Remove the porous silicon, and finally remove the HF process tank in the conventional process to retain the silica glass formed on the front side, and at the same time increase the liquid level appropriately, so that an appropriate amount of turning liquid is generated within 2mm around the front side. It is also because of the turning liquid. Silica glass is significantly thinner than the middle or has almost no residue;

S302, then put the silicon wafer into NaOH or TMAH to polish the backside. At the same time, since the silicon glass around the edges of the front side is relatively thin, the diffusion layer here cannot be well protected. When the backside is polished, the surrounding area of the frontside will also be rubbed. Polished to form undoped regions 1-2.

In a possible design, the back doping is removed in S3, and the undoped regions 1-2 are formed on the front including the following steps:

S31. First, place the front side of the silicon wafer in a chain-type single-sided engraving equipment, and use HF solution to perform single-sided engraving on the back side to ensure that the liquid level of the solution is close to the front surface of the silicon wafer, so as to remove the silicon glass formed by diffusion on the back side. At the same time, an appropriate amount of chemical solution can be poured around the front surface, and the area does not exceed 2mm, and at this time, the silicon glass around the front surface becomes very thin or completely etched away.

S32. Put the silicon wafer into NaOH or TMAH to polish the backside; at the same time, since the silicon glass around the edges of the front side is relatively thin or absent, the diffusion layer here cannot be well protected. The perimeter of the front side is also polished to form undoped regions 1-2.

It should be noted that this solution is the preferred solution, mainly because relatively few chemicals are used, the entire process is easier to control, and it is more conducive to large-scale mass production.

In a possible design, the back doping is removed in S3, and the undoped regions 1-2 are formed on the front including the following steps:

S311. First, use lasers with wavelengths of 1064nm or frequency-doubling of 1064nm on the front edge to remove the silicon glass along the edges of the silicon wafer.

S312, and then put the silicon wafer into NaOH or TMAH to polish the back side, and while the back side is polished, the surrounding of the front side is also polished to form undoped regions 1-2.

S4 , remove the remaining silicon glass on the front side, and perform cleaning, as shown in FIG. 5 , so as to facilitate the preparation of the passivation medium layer later.

Specifically, in S4, HF is used to remove the remaining silica glass on the front, and a mixed solution of HCl, H ₂ O ₂ , O ₃ , NH ₃ OH can be used for further cleaning, and finally HF solution is used to make the surface hydrophobic.

S5. A passivation dielectric layer 5 is prepared on the backside of the silicon substrate, as shown in FIG. 6 .

Specifically, in S5, a low temperature furnace tube oxidation process, a nitric acid oxidation process, an ozone oxidation process, ALD, CVD (such as PECVD, LPCVD), PVD (such as sputtering, evaporation) and other processes can be used to obtain the back surface of the silicon wafer in S4 A passivation dielectric layer 5 is prepared thereon.

Specifically, the passivation medium layer 5 in S5 may be one or more stacks of silicon oxide SiO ₂ , aluminum oxide Al ₂ O ₃ , titanium oxide TiO ₂ or silicon oxynitride SiO _x N _1-x , and the passivation The thickness of the dielectric layer 5 is 0.1 nm to 10.0 nm;

S6 , forming a selective carrier transport layer 6 on the passivation dielectric layer 5 , as shown in FIG. 7 .

Specifically, in S6, the selective carrier transport layer 6 may be one or several stacked silicon thin films of a microcrystalline silicon thin film layer, an amorphous silicon thin film layer and a polycrystalline silicon thin film layer, and its thickness ranges from 10 nm to 300nm.

Specifically, in S6, the selective carrier transport layer 6 can be deposited and prepared by using low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD).

Specifically, in S6, the selective carrier transport layer 6 may be an undoped intrinsic silicon thin film, or an in-situ doped but not activated silicon thin film.

S7, backside doping: doping or activating the selective carrier transport layer 6 .

Specifically, in S7, if the selective carrier transport layer 6 is an undoped intrinsic silicon film, an ion implanter is used for implantation, and then the doped impurities can be activated by annealing, so that the real The doping of the selective carrier transport layer 6 is realized, and the crystallization treatment is performed at the same time, so as to further improve the performance of the silicon thin film.

Specifically, in S7, if the selective carrier transport layer 6 is an in-situ doped but unactivated silicon thin film, high temperature annealing is performed to activate the impurities and realize the real doping, and to realize the crystallization of the silicon thin film, Further improve the performance of the silicon thin film.

S8, a composite passivation film is prepared, as shown in FIG. 8 .

Specifically, in S8 , a composite passivation film is deposited on the surface of the selective carrier transport layer 6 and the surface of the doped layer 2 on the front side by using a tube or plate plasma-enhanced chemical vapor deposition (PECVD) or ALD.

Specifically, in S8, the composite passivation film may be a single-layer film or a stack of several of silicon oxide SiO ₂ , aluminum oxide Al ₂ O ₃ , titanium oxide TiO ₂ , and silicon oxynitride SiO _x N _1-x The thickness of the composite passivation film is 1 to 300 nm.

S9 , preparing electrodes and sintering to obtain a solar cell, as shown in FIG. 1 .

Specifically, in S9, the metal contact paste is printed by screen printing, and then sintered to prepare the front electrode 4 and the back electrode 8 to obtain a solar cell.

Example 1

This embodiment discloses a solar cell and a preparation method thereof. The structure of the solar cell in this embodiment is shown in FIG. 1 .

In the preparation method of this embodiment, the silicon substrate 1 is an n-type silicon wafer, the front side is doped with boron diffusion, the silicon dioxide (SiO ₂ ) passivation dielectric layer 5 is prepared by furnace tube oxidation, and the selective carrier transport layer 6 is this Intrinsic polysilicon is used, and the selective carrier transport layer 6 is ion-implanted to implant P to achieve doping. The flow chart of the entire preparation method is shown in FIG. 2 . Specific steps are as follows:

Front-side doping: select n-type single crystal silicon wafers with resistivity of 0.1-20Ω··cm, and place them in the texturing tank for surface texture to form a textured structure, as shown in Figure 3; The textured silicon wafer is placed in a boron (B) diffusion furnace tube to prepare a p+ doped layer 2, and at the same time, borosilicate glass is formed on the front side, as shown in FIG. 4 .

Removal of back doping: Since the gaseous diffusion source will also diffuse to the back during the front doping, and then doping is formed on the back, it is necessary to place the doped silicon wafer in a wet etching machine to remove the back doping layer , and retain the borosilicate glass formed by doping on the front, but at this time, due to the liquid turning, the borosilicate glass around the front is obviously thinner than the middle; then use NaOH to polish the back, because the borosilicate glass in the area around the front is thinner than the middle. It is thin and cannot protect the doped layer here. When the backside is polished, the front side will also be polished to form an undoped area 1-2; finally, HF is used to remove the remaining borosilicate glass on the front side to facilitate subsequent preparation. Passivation dielectric layer. A schematic diagram of the structure is shown in Figure 5.

Preparation of passivation dielectric layer: A 1.5 nm silicon dioxide (SiO ₂ ) passivation dielectric layer 5 is grown on the backside by furnace tube oxidation, as shown in FIG. 6 .

Preparation of selective carrier transport layer: In low-pressure chemical deposition (LPCVD) equipment, an undoped intrinsic polysilicon film with a thickness of 120 nm was grown at a temperature of 610 °C, as shown in Figure 7.

Backside doping: use an ion implanter to implant P ions into the polysilicon film of the selective carrier transport layer 6; then activate at a temperature of 870°C to achieve backside doping. At the same time, this high temperature also realizes the polysilicon grown by LPCVD. The film is subjected to crystallization heat treatment to further improve the performance of the film.

Preparation of composite passivation film: firstly, the oxide layer grown on the surface of the silicon wafer after being doped on the back side was removed with HF solution, and then by tubular plasma-enhanced chemical vapor deposition (PECVD) under the process conditions of 460 °C under selective current-carrying The second composite passivation film 7 is grown on the sub-transport layer 6 (the composite passivation film is a laminated film of aluminum oxide and silicon nitride), and the first composite passivation film 3 is grown on the doped layer 2 on the front side, as shown in FIG. 8 . Among them, the thickness of the composite passivation film is 120 nm.

Electrode preparation: The metal contact paste is printed on the front and back of the silicon wafer by screen printing, and then the front electrode 4 and the back electrode 8 are prepared by a sintering process to obtain a solar cell, as shown in FIG. 1 .

The surrounding edges prepared in this example are the performance parameters of undoped solar cells and ordinary solar cells, as shown in Table 1 below:

Table 1 Performance of Example 1 and common solar cells

Example 2

This embodiment discloses a solar cell and a preparation method thereof. The structure of the solar cell in this embodiment is the same as that of Embodiment 1. The difference is that in the preparation method of this embodiment, the passivation dielectric layer 5 of silicon dioxide (SiO ₂ ) is prepared by chemical oxidation of nitric acid, and the selective carrier transport layer 6 is made of P-doped amorphous silicon and intrinsic Polysilicon laminated silicon thin film. Specific steps are as follows:

Front-side doping: select n-type single crystal silicon wafers with resistivity of 0.1-20Ω·cm, and place them in a texturing tank for surface texture to form a textured structure, as shown in Figure 3; The resulting silicon wafer is placed in a boron (B) diffusion furnace tube to prepare a p+ doped layer 2, and at the same time, borosilicate glass is formed on the front side, as shown in FIG. 4 .

Removal of back doping: First, the silicon wafer is etched on one side to remove the borosilicate glass formed by diffusion on the back, and then the silicon wafer is placed in TMAH to polish the back; The borosilicate glass is relatively thin and cannot protect the doped layer here. When the backside is polished, the sides of the front side will also be polished to form an undoped area 1-2; finally, HF is used to remove the remaining borosilicate glass on the front side. In order to prepare the passivation dielectric layer later. A schematic diagram of the structure is shown in Figure 5.

Preparation of passivation dielectric layer: A 1.2 nm silicon dioxide (SiO ₂ ) passivation dielectric layer 5 is grown on the backside by chemical oxidation of nitric acid, as shown in FIG. 6 .

Preparation of selective carrier transport layer: in the plasma enhanced chemical vapor deposition (PECVD) equipment, a layer of 60nm P-doped amorphous silicon film is first grown on the surface of the passivation dielectric layer 5, and then on its surface A 50nm undoped intrinsic polysilicon film was grown, as shown in Figure 7.

Backside doping: The doping source in the in-situ doped silicon film is activated at a temperature of 900°C to realize the backside doping. At the same time, this high temperature also realizes the crystallization of amorphous silicon and polysilicon films grown by LPCVD. chemical heat treatment to further improve the performance of the film.

Preparation of composite passivation film: first, the oxide layer grown on the surface of the silicon wafer after being doped on the back side is removed with HF solution, and then the selective carrier transport layer 6 on the back side and the front side are formed by tubular plasma-enhanced chemical vapor deposition (PECVD). A first composite passivation film 3 and a second composite passivation film 7 are respectively grown on the doped layer 2 (the composite passivation film is a laminated film of aluminum oxide and silicon nitride), as shown in FIG. 8 . The thickness of the composite passivation film is 50 nm.

Electrode preparation: The metal contact paste is printed on the front and back of the silicon wafer by screen printing, and then the front electrode 4 and the back electrode 8 are prepared by a sintering process to obtain a solar cell, as shown in FIG. 1 .

Example 3

This embodiment discloses a solar cell and a preparation method thereof. The structure of the solar cell in this embodiment is the same as that of Embodiment 1. The difference is: in the preparation method of this embodiment, the silicon substrate 1 is a p-type silicon wafer, the front surface is doped with phosphorus diffusion, and a layer of passivation medium of silicon oxynitride (SiO _x N _1-x ) is prepared by low pressure chemical deposition (LPCVD). Layer 5, the selective carrier transport layer is an intrinsic undoped polysilicon thin film, and the selective carrier transport layer is doped with B by means of ion implantation. Specific steps are as follows:

Front-side doping: select p-type single crystal silicon wafers with resistivity of 0.1-20Ω·cm, and place them in the texturing tank for surface texturing to form a textured structure, as shown in Figure 3; The resulting silicon wafer is placed in a phosphorus (P) diffusion furnace tube to prepare an n+ doped layer 2, and at the same time, phosphorous silicate glass is formed on the front side, as shown in FIG. 4 .

Removal of back doping: First, use laser to remove the phosphorous silicate glass on the front edge, and then put the silicon wafer into NaOH to polish the back side. When the back side is polished, the surrounding area of the front side will also be polished to form an undoped area 1- 2; Finally, use HF to remove the remaining phosphorous silicate glass on the front side, so as to prepare a passivation medium layer later. A schematic diagram of the structure is shown in Figure 5.

Preparation of passivation dielectric layer: a 2.0 nm silicon oxynitride (SiO _x N _1-x ) passivation dielectric layer 5 is grown in situ in a low pressure chemical deposition (LPCVD) equipment, as shown in FIG. 6 .

Preparation of selective carrier transport layer: After growing the passivation dielectric layer 5 in a low pressure chemical deposition (LPCVD) equipment, a 60nm polysilicon film was grown in the same equipment at a temperature of 620°C, as shown in Figure 7 .

Backside doping: B ion implantation is performed on the polysilicon film of the selective carrier transport layer by an ion implanter; then it is activated at a temperature of 950°C to realize backside doping. At the same time, this high temperature also realizes the polysilicon grown by LPCVD. The film is subjected to crystallization heat treatment to further improve the performance of the film.

Preparation of composite passivation film: first, the oxide layer grown on the surface of the silicon wafer after being doped on the back side is removed with HF solution, and then the selective carrier transport layer 6 and A first composite passivation film 3 and a second composite passivation film 7 (the composite passivation film is a laminated film of aluminum oxide and silicon nitride) are grown on the front-side doped layer 2 respectively, as shown in FIG. 8 . Among them, the thickness of the composite passivation film is 80 nm.

Electrode preparation: The metal contact paste is printed on the front and back of the silicon wafer by screen printing, and then the front electrode 4 and the back electrode 8 are prepared by a sintering process to obtain a solar cell, as shown in FIG. 1 .

As can be seen from Table 1, the front surface of the solar cell of the present invention is provided with an undoped area around the edge, and the undoped area increases the distance between the edge of the doped layer and the edge of the back doped layer to ensure the edge of the doped layer. It is completely disconnected from the edge of the back doping layer, which can achieve lower leakage current, improve the parallel resistance of the battery, and improve the yield of the battery.

The above description is only a preferred embodiment of the present invention, but the protection scope of the present invention is not limited to this. Substitutions should be covered within the protection scope of the present invention.

Claims (10)

1. A solar cell, characterized by comprising a silicon substrate (1), the front surface of the silicon substrate (1) comprising a first surface, the first surface comprising a doped region (1-1) and an undoped region area (1-2), the undoped area (1-2) is distributed in the surrounding edge area of the doped area (1-1), the width of the undoped area (1-2) is not more than 2mm, A doped layer (2) is provided on the upper surface of the doped region (1-1). 2. The solar cell according to claim 1, wherein the upper surface of the doped region (1-1) is textured, and the upper surface of the undoped region (1-2) is polished noodle. 3. The solar cell according to claim 1, wherein a first composite passivation film (3) is provided on the upper surfaces of the undoped region (1-2) and the doped layer (2), so A front electrode (4) is provided on the upper surface of the first composite passivation film (3). 4 . The solar cell according to claim 3 , wherein the back surface of the silicon substrate ( 1 ) is sequentially provided with a passivation medium layer ( 5 ) and selective carriers along a direction away from the silicon substrate ( 1 ). 5 . A transmission layer (6), a second composite passivation film (7) and a back electrode (8). 5. The solar cell according to claim 4, wherein the passivation medium layer (5) is a single-layer film or Several laminated films. 6. The solar cell according to any one of claims 1-5, characterized in that the conductivity type of the doped layer (2) is opposite to or the same as the conductivity type of the silicon substrate (1). 7. A method for preparing a solar cell, characterized in that, for preparing the solar cell according to claim 1-6, comprising the following steps: S1, providing a silicon substrate (1), and cleaning and texturing the silicon substrate (1); S2, doping the front side to form a doped layer (2); S3, remove the doping on the backside and the doping around the edges of the front side, and form an undoped region (1-2) on the front side; S4, remove the remaining silicon glass on the front side. 8. The preparation method of solar cell according to claim 7, characterized in that, after S4, further comprising: S5, preparing a passivation dielectric layer (5) on the backside of the silicon substrate; S6, preparing a selective carrier transport layer (6) on the passivation dielectric layer (5); S7, backside doping, doping or activating the selective carrier transport layer (6); S8, preparing a composite passivation film; S9, preparing electrodes and sintering to obtain solar cells. 9 . The method for preparing a solar cell according to claim 7 , wherein the doping on the back surface is removed in the step S3 , and the formation of an undoped region (1-2) on the front surface comprises the following steps: 10 . S31. First, place the front side of the silicon wafer in the chain-type single-sided engraving equipment, and use HF solution for single-sided engraving on the back side to ensure that the liquid level of the solution is close to the front surface of the silicon wafer, so as to remove the silicon glass formed by diffusion on the back side. At the same time, the chemical solution is turned to the surrounding of the front, and the area does not exceed 2mm. At this time, the silicon glass around the front is thinned or completely etched; S32, the silicon wafer is then put into NaOH or TMAH to polish the back surface; at this time, while the back surface is polished, the surrounding surfaces of the front surface are also polished to form an undoped region (1-2). 10 . The method for preparing a solar cell according to claim 8 , wherein the passivation medium layer ( 5 ) has a thickness of 0.1 nm to 10.0 nm. 11 .

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