CN111817904B - Bandwidth recovery method, device and medium based on PCIE Switch - Google Patents
Bandwidth recovery method, device and medium based on PCIE Switch Download PDFInfo
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- CN111817904B CN111817904B CN202010922938.4A CN202010922938A CN111817904B CN 111817904 B CN111817904 B CN 111817904B CN 202010922938 A CN202010922938 A CN 202010922938A CN 111817904 B CN111817904 B CN 111817904B
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0896—Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/70—Admission control; Resource allocation
- H04L47/76—Admission control; Resource allocation using dynamic resource allocation, e.g. in-call renegotiation requested by the user or requested by the network in response to changing network conditions
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Abstract
本发明实施例公开了一种基于PCIE Switch的带宽恢复方法、装置和介质，获取下行口的线缆连接状态以及链路带宽；当检测到下行口的线缆连接状态以及链路带宽满足恢复条件时，可以调整连接控制寄存器中的连接标志位至第一状态，以触发系统将下行口连接的线缆移除。通过软件模拟的方式达到线缆移除的效果。在触发系统将下行口连接的线缆移除之后，可以再次将连接控制寄存器中的连接标志位调整为第二状态，以触发系统将下行口连接的线缆重新加入，此时系统可以识别到下行口连接的所有线缆，从而使得下行口的链路带宽与下行口实际连接的线缆个数相匹配，解决了多根线缆连接时无法组成指定链路带宽的问题。
The embodiment of the present invention discloses a bandwidth recovery method, device and medium based on PCIE Switch, which acquires the cable connection state and link bandwidth of the downlink port; when it is detected that the cable connection status and link bandwidth of the downlink port meet the recovery conditions When , the connection flag bit in the connection control register can be adjusted to the first state to trigger the system to remove the cable connected to the downlink port. The effect of cable removal is achieved through software simulation. After the trigger system removes the cable connected to the downlink port, the connection flag bit in the connection control register can be adjusted to the second state again to trigger the system to rejoin the cable connected to the downlink port. At this time, the system can recognize the All cables connected to the downlink port, so that the link bandwidth of the downlink port matches the number of cables actually connected to the downlink port, which solves the problem that the specified link bandwidth cannot be formed when multiple cables are connected.
Description
Technical Field
The present invention relates to the field of storage system technologies, and in particular, to a bandwidth recovery method and apparatus based on PCIE Switch, and a computer-readable storage medium.
Background
In recent years, with the continuous improvement of the requirements of users on integration, unification, efficiency, space and energy consumption, there are many new scenarios for the use of PCIE Switch, one of which is: one bandwidth of the PCIE Switch is an x16 downlink port, and an x16 bandwidth link needs to be formed by connecting four miniSAS cables, where the cables support hot plug.
During use, the cables are inserted one by one in sequence. After the first cable is inserted, the PCIE link automatically negotiates, the bandwidth of the link after negotiation is x4, and when the remaining three cables are subsequently inserted, the PCIE link is limited to the PCIE specification, the PCIE link cannot automatically negotiate, the bandwidth is always maintained in the x4 state, and the designed x16 bandwidth cannot be achieved.
It can be seen that how to solve the problem that a plurality of cable connections cannot form a specified link bandwidth is a problem to be solved by those skilled in the art.
Disclosure of Invention
Embodiments of the present invention provide a method and an apparatus for recovering a bandwidth based on a PCIE Switch, and a computer-readable storage medium, which can solve the problem that a plurality of cables cannot form a designated link bandwidth.
To solve the foregoing technical problem, an embodiment of the present invention provides a bandwidth recovery method based on PCIE Switch, including:
acquiring the cable connection state and link bandwidth of a downlink port;
when the cable connection state of the downlink port and the link bandwidth are detected to meet the recovery condition, adjusting a connection flag bit in a connection control register to a first state to trigger a system to remove the cable connected with the downlink port;
and adjusting the connection flag bit in the connection control register to be in a second state so as to trigger the system to rejoin the cable connected with the downlink port.
Optionally, the detecting process of whether the connection state of the downstream port cable and the link bandwidth satisfy the recovery condition includes:
judging whether the four cables of the downlink port are in a connection state or not;
when the four cables of the downlink port are in a connection state, reading the current link bandwidth from the connection control register;
judging whether the current link bandwidth is smaller than a set link bandwidth or not;
and when the current link bandwidth is smaller than the set link bandwidth, executing the step of adjusting the connection flag bit in the connection control register to a first state so as to trigger the system to remove the cable connected with the downlink port.
Optionally, after the determining whether all four cables of the downstream port are in a connected state, the method further includes:
and when the downlink port does not meet the condition that all four cables are in a connection state within a preset time period, displaying prompt information of cable connection failure.
Optionally, the obtaining the connection state and the link bandwidth of the downstream port cable includes:
and reading the cable bit signal and the current link bandwidth recorded in the connection control register according to the set cycle time.
Optionally, after the adjusting the connection flag bit in the connection control register to the second state to trigger the system to rejoin the cable connected to the downstream port, the method further includes:
judging whether the current link bandwidth of the downlink port reaches the set link bandwidth or not;
and when the current link bandwidth of the downlink port does not reach the set link bandwidth, returning the connection flag bit in the adjustment connection control register to the first state after a preset time interval so as to trigger the system to remove the cable connected with the downlink port.
The embodiment of the invention also provides a bandwidth recovery device based on the PCIE Switch, which comprises an acquisition unit, a first adjusting unit and a second adjusting unit;
the acquisition unit is used for acquiring the cable connection state and the link bandwidth of the downlink port;
the first adjusting unit is used for adjusting a connection flag bit in a connection control register to a first state to trigger a system to remove a cable connected with the downlink port when the cable connection state of the downlink port and the link bandwidth are detected to meet recovery conditions;
and the second adjusting unit is used for adjusting the connection flag bit in the connection control register to be in a second state so as to trigger the system to rejoin the cable connected with the downlink port.
Optionally, for a detection process of whether the connection state of the downstream port cable and the link bandwidth meet a recovery condition, the apparatus includes a first determination unit, a reading unit, and a second determination unit;
the first judging unit is used for judging whether the four cables of the downlink port are in a connection state or not;
the reading unit is used for reading the current link bandwidth from the connection control register when the four cables of the downlink port are in a connection state;
the second judging unit is configured to judge whether the current link bandwidth is smaller than a set link bandwidth; and when the current link bandwidth is smaller than the set link bandwidth, triggering the first adjusting unit.
Optionally, a prompt unit is further included;
and the prompting unit is used for displaying the prompting information of the cable connection failure when the downlink port does not meet the condition that the four cables are in the connection state within the preset time period.
Optionally, the obtaining unit is specifically configured to read the cable bit signal and the current link bandwidth recorded in the connection control register according to a set cycle time.
Optionally, the system further includes a determining unit and a returning unit after the connection flag bit in the connection control register is adjusted to the second state to trigger the system to rejoin the cable connected to the downstream port;
the judging unit is used for judging whether the current link bandwidth of the downlink port reaches the set link bandwidth or not;
and the return unit is used for triggering the first adjusting unit after a preset time interval when the current link bandwidth of the downlink port does not reach the set link bandwidth.
The embodiment of the present invention further provides a bandwidth recovery device based on PCIE Switch, including:
a memory for storing a computer program;
a processor configured to execute the computer program to implement the steps of the PCIE Switch based bandwidth restoration method as any one of the above.
An embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the PCIE Switch-based bandwidth recovery method are implemented as any one of the above.
According to the technical scheme, the cable connection state and the link bandwidth of the downlink port are obtained; when the cable connection state of the downstream port and the link bandwidth meet the recovery condition, it is indicated that the link bandwidth of the downstream port does not meet the actual bandwidth requirement, and at this time, the connection flag bit in the connection control register may be adjusted to the first state to trigger the system to remove the cable connected to the downstream port. The effect of cable removal is achieved through a software simulation mode. After the triggering system removes the cable connected with the downlink port, the connection flag bit in the connection control register can be adjusted to be in the second state again, so that the triggering system rejoins the cable connected with the downlink port, and at the moment, the system can identify all the cables connected with the downlink port, so that the link bandwidth of the downlink port is matched with the number of the cables actually connected with the downlink port, and the problem that a designated link bandwidth cannot be formed when a plurality of cables are connected is solved.
Drawings
In order to illustrate the embodiments of the present invention more clearly, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a flowchart of a bandwidth recovery method based on PCIE Switch according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a bandwidth recovery apparatus based on PCIE Switch according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a hardware structure of a bandwidth recovery apparatus based on PCIE Switch according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Next, a bandwidth recovery method based on PCIE Switch provided in the embodiment of the present invention is described in detail. Fig. 1 is a flowchart of a bandwidth recovery method based on PCIE Switch according to an embodiment of the present invention, where the method includes:
s101: and acquiring the cable connection state and the link bandwidth of the downlink port.
In the embodiment of the present invention, an introduction is given by taking a downlink port with a bandwidth of x16 of a PCIE Switch as an example, and to reach the bandwidth of an x16 link, the downlink port of the PCIE Switch needs to be connected with four cables.
In the embodiment of the invention, the cable connection state of the downlink port can be identified by reading the in-place signal of the cable.
The system can automatically identify whether a cable is inserted into the downlink port, and when the cable is inserted into one port of the downlink port, the system can automatically record the cable in-place signal corresponding to the port in the register. When a cable is inserted into one port of the downlink port, the in-place signal of the cable corresponding to the port is '1'; when the cable is not inserted into the port of the downstream port, the cable corresponding to the port has a bit signal of "0".
Considering that the cables need to be inserted into the downstream ports one by one, in order to more accurately acquire the actual connection state of the cables at the downstream ports, the in-place signals of the cables and the current link bandwidth recorded in the connection control register can be read according to the set cycle time.
The value of the cycle time can be set depending on the time spent by the cable to be inserted into the downlink port.
S102: when the cable connection state of the downlink port and the link bandwidth meeting the recovery condition are detected, the connection flag bit in the connection control register is adjusted to be in the first state, so that the system is triggered to remove the cable connected with the downlink port.
The recovery condition means that the required number of cables of the downstream port are all inserted, but the bandwidth of the corresponding link does not reach the bandwidth value matched with the number of cables.
In order to insert 4 cables, in concrete implementation, can judge whether four cables of the downstream mouth are all in connected state. When all four cables of the downstream port are in a connected state, it indicates that all the cables required to be inserted have been inserted into the downstream port, and at this time, the current link bandwidth can be read from the connection control register. And judging whether the current link bandwidth is smaller than the set link bandwidth or not.
When the current link bandwidth is smaller than the set link bandwidth, it indicates that the link bandwidth of the downlink port does not meet the actual bandwidth requirement, and at this time, the connection flag bit in the connection control register may be adjusted to the first state to trigger the system to remove the cable connected to the downlink port.
In the embodiment of the invention, the automatic negotiation process of the link bandwidth is triggered by changing the connection flag bit in the register.
In practical applications, the connection flag position "0" may represent the first state, and the connection flag position "1" may represent the second state. When the connection flag is adjusted to the first state, the hot plug process of the system is triggered, and the effect of removing the cable is achieved in a software simulation mode.
S103: and adjusting the connection flag bit in the connection control register to be in a second state so as to trigger the system to rejoin the cable connected with the downlink port.
After the triggering system removes the cable connected to the downstream port, the connection flag bit in the connection control register may be adjusted to the second state again to trigger the system to add the cable connected to the downstream port again, and at this time, the system may identify all the cables connected to the downstream port, so that the link bandwidth of the downstream port matches the number of the cables actually connected to the downstream port.
Taking 4 cables as an example, by adjusting the connection flag bit in the connection control register to the second state, at this time, the system is triggered to execute a hot plug process, and the cable connected to the downstream port is re-identified, because the downstream port has connected 4 cables at the same time, the system can identify the link bandwidth of x16, so that the 4 cables reach the link bandwidth of x 16.
In the embodiment of the present invention, after the connection flag in the connection control register is adjusted to the second state to trigger the system to add the cable connected to the downlink port again, it may be further determined whether the current link bandwidth of the downlink port reaches the set link bandwidth. And when the current link bandwidth of the downstream port does not reach the set link bandwidth, returning to the step S102 to readjust the connection flag bit in the connection control register to the first state after a preset time interval so as to trigger the system to remove the cable connected to the downstream port.
According to the technical scheme, the cable connection state and the link bandwidth of the downlink port are obtained; when the cable connection state of the downstream port and the link bandwidth meet the recovery condition, it is indicated that the link bandwidth of the downstream port does not meet the actual bandwidth requirement, and at this time, the connection flag bit in the connection control register may be adjusted to the first state to trigger the system to remove the cable connected to the downstream port. The effect of cable removal is achieved through a software simulation mode. After the triggering system removes the cable connected with the downlink port, the connection flag bit in the connection control register can be adjusted to be in the second state again, so that the triggering system rejoins the cable connected with the downlink port, and at the moment, the system can identify all the cables connected with the downlink port, so that the link bandwidth of the downlink port is matched with the number of the cables actually connected with the downlink port, and the problem that a designated link bandwidth cannot be formed when a plurality of cables are connected is solved.
In consideration of the fact that in practical application, a cable may be inserted into the downstream port, and the insertion of the cable is not detected all the time because the cable is not inserted well. Taking 4 cables as an example, in order to facilitate a user to find out the situation that the cables are not inserted in time, after judging whether the four cables of the downlink port are all in the connection state, the system can further judge whether the downlink port meets the condition that the four cables are all in the connection state within a preset time period.
The preset time period may be set according to the time it takes for four cables to be inserted into the downstream port.
When the downstream port does not satisfy that the four cables are all in the connection state within the preset time period, it is very likely that the cables are inserted into the downstream port, but the connection of the cables cannot be detected by the system due to the fact that the cables are not inserted, and therefore when the downstream port does not satisfy that the four cables are all in the connection state within the preset time period, prompt information of cable connection failure can be displayed.
By setting the time for the change of the cable connection state, the situation that the cable connection cannot be identified due to the fact that the cable is not inserted can be timely found, and therefore a user can insert the cable into the downlink port again.
Fig. 2 is a schematic structural diagram of a bandwidth recovery apparatus based on PCIE Switch according to an embodiment of the present invention, including an obtaining unit 21, a first adjusting unit 22, and a second adjusting unit 23;
an obtaining unit 21, configured to obtain a cable connection state and a link bandwidth of a downlink port;
a first adjusting unit 22, configured to adjust a connection flag in a connection control register to a first state when detecting that a cable connection state of the downstream port and a link bandwidth meet a recovery condition, so as to trigger a system to remove a cable connected to the downstream port;
the second adjusting unit 23 is configured to adjust the connection flag bit in the connection control register to a second state, so as to trigger the system to rejoin the cable connected to the downstream port.
Optionally, the apparatus includes a first determining unit, a reading unit, and a second determining unit, for a detection process of whether a connection state of a downstream port cable and a link bandwidth satisfy a recovery condition;
the first judgment unit is used for judging whether the four cables of the downlink port are in a connection state or not;
the reading unit is used for reading the current link bandwidth from the connection control register when four cables of the downlink port are in a connection state;
the second judgment unit is used for judging whether the current link bandwidth is smaller than the set link bandwidth or not; and when the current link bandwidth is smaller than the set link bandwidth, triggering the first adjusting unit.
Optionally, a prompt unit is further included;
and the prompting unit is used for displaying the prompt information of the cable connection failure when the downlink port does not meet the condition that all four cables are in the connection state within the preset time period.
Optionally, the obtaining unit is specifically configured to read the cable bit signal and the current link bandwidth recorded in the connection control register according to a set cycle time.
Optionally, the system further includes a determining unit and a returning unit after adjusting the connection flag bit in the connection control register to the second state to trigger the system to rejoin the cable connected to the downstream port;
the judging unit is used for judging whether the current link bandwidth of the downlink port reaches the set link bandwidth or not;
and the returning unit is used for triggering the first adjusting unit after a preset time interval when the current link bandwidth of the downlink port does not reach the set link bandwidth.
The description of the features in the embodiment corresponding to fig. 2 may refer to the related description of the embodiment corresponding to fig. 1, and is not repeated here.
According to the technical scheme, the cable connection state and the link bandwidth of the downlink port are obtained; when the cable connection state of the downstream port and the link bandwidth meet the recovery condition, it is indicated that the link bandwidth of the downstream port does not meet the actual bandwidth requirement, and at this time, the connection flag bit in the connection control register may be adjusted to the first state to trigger the system to remove the cable connected to the downstream port. The effect of cable removal is achieved through a software simulation mode. After the triggering system removes the cable connected with the downlink port, the connection flag bit in the connection control register can be adjusted to be in the second state again, so that the triggering system rejoins the cable connected with the downlink port, and at the moment, the system can identify all the cables connected with the downlink port, so that the link bandwidth of the downlink port is matched with the number of the cables actually connected with the downlink port, and the problem that a designated link bandwidth cannot be formed when a plurality of cables are connected is solved.
Fig. 3 is a schematic hardware structure diagram of a bandwidth recovery apparatus 30 based on PCIE Switch according to an embodiment of the present invention, including:
a memory 31 for storing a computer program;
a processor 32 configured to execute a computer program to implement the steps of the PCIE Switch based bandwidth restoration method according to any of the embodiments described above.
An embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the PCIE Switch-based bandwidth recovery method according to any embodiment of the foregoing are implemented.
The bandwidth recovery method, apparatus and computer-readable storage medium based on PCIE Switch provided in the embodiments of the present invention are described in detail above. The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
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