CN111800090A - Amplitude mismatch calibration circuit - Google Patents
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Abstract
The invention discloses an amplitude mismatch calibration circuit, which comprises: the harmonic suppression quadrature mixer is positioned in the transmitting path and used for receiving quadrature baseband I/Q signals, obtaining up-conversion radio frequency signals according to the I/Q signals and outputting the up-conversion radio frequency signals to the calibration feedback path; the calibration feedback path is used for receiving signals output by the harmonic suppression quadrature mixer, and outputting feedback signals to the signal processing and detecting circuit after the signals are respectively processed by the fundamental wave self-mixer and the third harmonic mixer in the calibration feedback path; the signal processing and detecting circuit is used for filtering and gain adjustment of the feedback signal and calculating according to the modulated signal to obtain the magnitude of each frequency spectrum component of the obtained signal; the calibration control unit is used for controlling the whole calibration system according to a preset algorithm and generating a control signal according to the magnitude of each frequency spectrum component of the signal so as to control the calibration adjusting circuit to calibrate the harmonic suppression quadrature mixer; and the calibration adjusting circuit is used for adjusting the mixer circuit and the working state according to the control signal.
Description
Technical Field
The invention relates to the electronic technology, in particular to an amplitude mismatch calibration circuit.
Background
The mixer is an important module in a radio frequency transceiver and functions to shift the frequency spectrum of a signal, down-convert a radio frequency signal of a receiver to a low frequency or baseband, or up-convert a low frequency signal of a transmitter to a high frequency band. In order to increase the conversion gain of the mixer and reduce the switching time of the switching tube and further reduce the noise, the local oscillator signal of the mixer usually adopts a high-swing square wave, so that the switching tube works in a hard-switching (hard-switching) state. The full-swing local oscillation input signal can also avoid the problems of output amplitude mismatch and the like caused by different local oscillation amplitudes of a plurality of frequency mixers (such as an I path and a Q path) working in different paths. While the above advantages are achieved by the high swing square wave local oscillator signal, a harmonic mixing problem is also caused, that is, the high order harmonics of the local oscillator are mixed with the signals of the nearby frequency band, so that the output signal contains components which should not be present, as shown in fig. 5 (a). This problem can cause signal quality degradation and even blocking in the receiver, and can result in the spectrum of the output signal containing higher harmonic components that do not meet the standard transmission mask (spectral mask) of the protocol in the transmitter. The problem of harmonic mixing is particularly acute in wideband transceivers because it does not allow for measures such as capacitive-inductive resonance or Surface Acoustic Wave (SAW) filtering in narrowband transceiver systems. To solve this problem, the mixer introduces a structure for harmonic suppression.
A Harmonic Rejection Mixer (HRM) uses multi-phase local oscillator signals, which are weighted by different amplitudes and then superimposed to approximate sinusoids, thereby reducing higher Harmonic components. To preserve the advantages of high swing local oscillators, amplitude weighting of the local oscillator signals is typically performed at the input signal path side. Although more higher harmonics can be suppressed by using more multi-phase local oscillator signals, the implementation complexity of the circuit and the matching degree of each multi-phase local oscillator and mixer are limited, and three-phase local oscillator phases are generally used. As shown in fig. 5(b), with a harmonic rejection mixer using three-phase local oscillators, the three local oscillators are sequentially 45 ° out of phase with each other, and the amplitude ratio is 1: √ 2: 1, the resulting composite signal theoretically will contain only 8N ± 1 harmonics, and not the third, fifth, etc. harmonics.
However, in practical applications, due to amplitude and phase mismatch between the local oscillator and the input of the three-way mixer unit, the third harmonic and the fifth harmonic cannot be completely cancelled. Analysis and simulation can show that 1% of amplitude mismatch and phase mismatch lower than 1 degree need to be ensured to obtain harmonic suppression of 30-35 dB. The above matching degree is usually difficult to achieve by processing on the layout alone, especially the √ 2: 1 ratio, so in a transceiver system using harmonic suppression mixing, calibration is introduced to achieve a better harmonic suppression degree.
For the currently widely used quadrature modulation communication system, the transmitter of the direct up-conversion architecture usually employs a quadrature mixer (see fig. 3) to implement the sideband suppression function. Therefore, for the quadrature mixer adopting the harmonic suppression structure, not only the amplitude matching between the three-phase mixing units is required to be done, but also the matching between the I, Q two paths in each mixing unit is required to be satisfied. Only in this way is it ensured that the whole mixer has good harmonic rejection and sideband rejection performance.
The I/Q amplitude mismatch calibration technique for quadrature mixers is currently well established. Generating a single-frequency orthogonal test signal from a baseband, carrying out up-conversion by an orthogonal mixer, carrying out self-mixing, filtering and gain adjustment on the output radio-frequency signal, and finally detecting whether the obtained signal contains a frequency component twice of the test signal. The smaller the amplitude of this component, the better the I/Q matching of the mixer. The calibration method can adjust the gains of the two paths of I/Q signals on an analog path, and can also carry out predistortion processing on the I/Q signals in a digital baseband.
Disclosure of Invention
It is therefore a primary objective of the claimed invention to provide an amplitude mismatch calibration circuit.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
the embodiment of the invention provides an amplitude mismatch calibration circuit, which comprises: the device comprises a harmonic suppression quadrature mixer, a calibration feedback path, a signal processing and detecting circuit, a calibration control unit and a calibration adjusting circuit; wherein,
the harmonic suppression quadrature mixer is positioned in the transmitting path and used for receiving quadrature baseband I/Q signals, obtaining up-conversion radio frequency signals according to the I/Q signals and outputting the up-conversion radio frequency signals to the calibration feedback path;
the calibration feedback path is used for receiving the signal output by the harmonic suppression quadrature mixer, and outputting a feedback signal to the signal processing and detecting circuit after the signal is respectively processed by a fundamental wave self-mixer and a third harmonic mixer in the calibration feedback path;
the signal processing and detecting circuit is used for filtering and gain adjustment of the feedback signal, and calculating according to the modulated signal to obtain the magnitude of each frequency spectrum component of the obtained signal;
the calibration control unit is used for controlling the whole calibration system according to a preset algorithm and generating a control signal according to the magnitude of each frequency spectrum component of the signal so as to control the calibration adjusting circuit to calibrate the harmonic suppression orthogonal mixer;
and the calibration adjusting circuit is used for adjusting the mixer circuit and the working state according to the control signal sent by the calibration control unit so as to eliminate various amplitude mismatches.
Optionally, the harmonic rejection quadrature mixer includes: the input signals of the three units are the same, the transconductance ratio of the transconductance stage is 1 to V2 to 1, the local oscillator signals are driven by three orthogonal square wave signals which are separated by 45 degrees, and the drain electrode of a tail current source of each unit can inject or extract current.
Optionally, the signal processing and detecting circuit multiplexes modular circuits in the receiver chain.
Optionally, the harmonic rejection quadrature mixer is connected to the third harmonic mixer through a first switch; the harmonic rejection quadrature mixer is connected with the self-mixer through a second switch; controlling whether two paths of the amplitude mismatch calibration circuit are communicated through the first switch and the second switch; the two passageways include: I/Q amplitude mismatch calibration and third harmonic detection.
Optionally, the third harmonic mixer includes: a down-conversion mixer; the local oscillation signal of the third harmonic mixer is triple frequency of the local oscillation signal of the harmonic suppression orthogonal mixer, and is used for down-converting the signal of the frequency band near the third harmonic of the output end of the harmonic suppression orthogonal mixer to a baseband signal.
Optionally, an input signal of the calibration adjustment circuit is an N-bit digital control signal generated by the calibration control unit, and an output signal is a dc injection current; the direct current injection current is applied to the drain terminal of a tail current source of the harmonic suppression quadrature mixer, and bias currents input to transistors M1, M2, M3 and M4 in each unit of the harmonic suppression quadrature mixer are changed, so that input transconductance of the harmonic suppression quadrature mixer is changed.
Optionally, the manner of injecting the dc injection current into the drain of the harmonic suppression quadrature mixer tail current source includes: differential current injection and common mode current injection; the circuit corresponding to the differential current injection mode is used for adjusting the amplitude mismatch between two paths of I/Q in each unit of the harmonic suppression quadrature mixer, and the relation between the injection current and a control word is as follows:
wherein, I0For the least significant bit LSB unit current of the injection current array, biIs the ith bit coefficient of the binary control word,
is b isiNegation of (1); if the injection current value is negative, the current is extracted from the node; the N represents the number of bits of the digital input of the calibration adjusting circuit, and the numerical value of the N can be selected after the calibration effect and the resource overhead are considered in a compromise mode; the Iop represents the output value of the positive terminal of the differential current of the calibration adjusting circuit, and the Ion represents the output value of the negative terminal of the differential current of the calibration adjusting circuit
The circuit corresponding to the common mode current injection mode is used for carrying out mismatch adjustment on a transconductance ratio of V2: 1, and the relation between the injection current and a control word is as follows:
when the MSB of the binary control word is 1 and the rest bits are 0, the Iop, Ion and Io are about 0, which indicates that the adjustment degree of the calibration adjustment circuit to the harmonic suppression orthogonal mixer is minimum; on the contrary, if the binary control word is all 0 or all 1, it indicates that the calibration adjustment circuit performs the maximum range adjustment on the transconductance stage of the harmonic suppression quadrature mixer.
The amplitude mismatch calibration circuit provided by the embodiment of the invention comprises: the device comprises a harmonic suppression quadrature mixer, a calibration feedback path, a signal processing and detecting circuit, a calibration control unit and a calibration adjusting circuit; the harmonic suppression quadrature mixer in the transmitting path is used for receiving quadrature baseband I/Q signals, obtaining up-conversion radio frequency signals according to the I/Q signals and outputting the up-conversion radio frequency signals to the calibration feedback path; the calibration feedback path is used for receiving the signal output by the harmonic suppression quadrature mixer, and outputting a feedback signal to the signal processing and detecting circuit after the signal is respectively processed by a fundamental wave self-mixer and a third harmonic mixer in the calibration feedback path; the signal processing and detecting circuit is used for filtering and gain adjustment of the feedback signal, and calculating according to the modulated signal to obtain the magnitude of each frequency spectrum component of the obtained signal; the calibration control unit is used for generating a control signal according to a preset algorithm and according to the magnitude of each frequency spectrum component of the signal, so as to control the calibration adjusting circuit to calibrate the harmonic suppression quadrature mixer; and the calibration adjusting circuit is used for adjusting the mixer circuit and the working state according to the control signal sent by the calibration control unit so as to eliminate various amplitude mismatches. According to the embodiment of the invention, firstly, orthogonal test signals generated by a baseband are applied to the mixer, then the output signals of the harmonic suppression mixer are filtered, gain adjusted and amplitude detected through the calibration feedback path, and the calibration control unit controls the calibration adjusting circuit to carry out amplitude mismatch calibration on the mixer according to the signal processing result, so that the suppression degree of the transmitter output to the third harmonic and the fifth harmonic is obviously improved.
Drawings
Fig. 1 is a schematic structural diagram of an amplitude mismatch calibration circuit for a harmonic rejection quadrature mixer of a wireless transmitter according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a relationship between a harmonic rejection quadrature mixer body and a calibration adjustment circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a calibration adjustment circuit according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating a control performed by the calibration control unit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a fundamental operation of a harmonic rejection mixer according to an embodiment of the present invention;
reference numerals: 101. a harmonic rejection quadrature mixer; 102. a signal feedback path portion; 103. a signal processing and detection circuit; 104. a calibration control unit; 105. the adjustment circuit is calibrated.
Detailed Description
In various embodiments of the present invention, an amplitude mismatch calibration circuit, comprises: the device comprises a harmonic suppression quadrature mixer, a calibration feedback path, a signal processing and detecting circuit, a calibration control unit and a calibration adjusting circuit; the harmonic suppression quadrature mixer in the transmitting path is used for receiving quadrature baseband I/Q signals, obtaining up-conversion radio frequency signals according to the I/Q signals and outputting the up-conversion radio frequency signals to the calibration feedback path; the calibration feedback path is used for receiving the signal output by the harmonic suppression quadrature mixer, and outputting a feedback signal to the signal processing and detecting circuit after the signal is respectively processed by a fundamental wave self-mixer and a third harmonic mixer in the calibration feedback path; the signal processing and detecting circuit is used for filtering and gain adjustment of the feedback signal, and calculating according to the modulated signal to obtain the magnitude of each frequency spectrum component of the obtained signal; the calibration control unit is used for generating a control signal according to a preset algorithm and according to the magnitude of each frequency spectrum component of the signal, so as to control the calibration adjusting circuit to calibrate the harmonic suppression quadrature mixer; and the calibration adjusting circuit is used for adjusting the mixer circuit and the working state according to the control signal sent by the calibration control unit so as to eliminate various amplitude mismatches.
The present invention will be described in further detail with reference to examples.
The present embodiment provides an amplitude mismatch calibration circuit, including: the device comprises a harmonic suppression quadrature mixer, a calibration feedback path, a signal processing and detecting circuit, a calibration control unit and a calibration adjusting circuit.
The harmonic suppression quadrature mixer is positioned in the transmitting path and used for receiving quadrature baseband I/Q signals, obtaining up-conversion radio frequency signals according to the I/Q signals and outputting the up-conversion radio frequency signals to the calibration feedback path;
the calibration feedback path is used for receiving the signal output by the harmonic suppression quadrature mixer, and outputting a feedback signal to the signal processing and detecting circuit after the signal is respectively processed by a fundamental wave self-mixer and a third harmonic mixer in the calibration feedback path;
the signal processing and detecting circuit is used for filtering and gain adjustment of the feedback signal, and calculating according to the modulated signal to obtain the magnitude of each frequency spectrum component of the obtained signal;
the calibration control unit is used for generating a control signal according to a preset algorithm and according to the magnitude of each frequency spectrum component of the signal, so as to control the calibration adjusting circuit to calibrate the harmonic suppression quadrature mixer;
and the calibration adjusting circuit is used for adjusting the mixer circuit and the working state according to the control signal sent by the calibration control unit so as to eliminate various amplitude mismatches.
Specifically, the harmonic rejection quadrature mixer includes: the input signals of the three units are the same, the transconductance ratio of the transconductance stage is 1 to V2 to 1, the local oscillator signals are driven by three orthogonal square wave signals which are separated by 45 degrees, and the drain electrode of a tail current source of each unit can inject or extract current.
Specifically, the signal processing and detecting circuit multiplexes a module circuit in a receiver link, thereby reducing the system overhead;
specifically, the harmonic rejection quadrature mixer is connected with the third harmonic mixer through a first switch; the harmonic rejection quadrature mixer is connected with the self-mixer through a second switch;
controlling whether two paths of the amplitude mismatch calibration circuit are communicated through the first switch and the second switch; the two passageways include: I/Q amplitude mismatch calibration and third harmonic detection.
Specifically, the third harmonic mixer includes: a down-conversion mixer;
the local oscillation signal of the third harmonic mixer is triple frequency of the local oscillation signal of the harmonic suppression orthogonal mixer, and is used for down-converting the signal of the frequency band near the third harmonic of the output end of the harmonic suppression orthogonal mixer to a baseband signal.
Specifically, an input signal of the calibration adjustment circuit is an N-bit digital control signal generated by a calibration control unit, and an output signal is a direct current injection current;
the direct current injection current is applied to the drain terminal of a tail current source of the harmonic suppression quadrature mixer, and bias currents input to transistors M1, M2, M3 and M4 in each unit of the harmonic suppression quadrature mixer are changed, so that input transconductance of the harmonic suppression quadrature mixer is changed.
Specifically, the manner of injecting the dc injection current into the drain of the harmonic suppression quadrature mixer tail current source includes: differential current injection and common mode current injection; wherein,
the circuit corresponding to the differential current injection mode is used for carrying out amplitude mismatch adjustment between two paths of I/Q in each unit of the harmonic suppression quadrature mixer, and the relation between the injection current and a control word is as follows:
wherein, I0For injecting the Least Significant Bit (LSB) unit current of the current array, biIs the ith bit coefficient of the binary control word,
is b isiNegation of (1); if the injection current value is negative, the current is extracted from the node; the N represents the number of bits of the digital input of the calibration adjusting circuit, and the numerical value of the N can be selected after the calibration effect and the resource overhead are considered in a compromise mode; the Iop represents the output value of the positive terminal of the differential current of the calibration and adjustment circuit, the Ion represents the circuit corresponding to the common mode current injection mode of the output value of the negative terminal of the differential current of the calibration and adjustment circuit, and is used for carrying out mismatch adjustment on the transconductance ratio of V2: 1, and the relation between the injection current and the control word is as follows:
when the Most Significant Bit (MSB) of the binary control word is 1 and the rest bits are 0, the Iop, Ion and Io are about 0, which indicates that the adjustment degree of the harmonic suppression quadrature mixer by the calibration adjustment circuit is minimum; on the contrary, if the binary control word is all 0 or all 1, it indicates that the calibration adjustment circuit performs the maximum range adjustment on the transconductance stage of the harmonic suppression quadrature mixer.
By the method, the third harmonic suppression degree and the fifth harmonic suppression degree of the mixer can be improved. Specifically, quadrature test signals are generated in the baseband and applied to the mixer, and then the output signal of the harmonic suppression mixer is filtered, gain adjusted and amplitude detected through the calibration feedback path. The calibration control algorithm controls the calibration adjusting circuit to carry out amplitude mismatch calibration on the frequency mixer according to the signal processing result so as to remarkably improve the suppression degree of the transmitter output to the third harmonic and the fifth harmonic.
To describe the above scheme in detail, an embodiment of the present invention provides an amplitude mismatch calibration circuit for a harmonic rejection quadrature mixer of a wireless transmitter, as shown in fig. 1, where the circuit includes:
a harmonic rejection quadrature mixer 101; the harmonic suppression quadrature mixer is arranged in a transmitting path, an input signal is a quadrature I/Q signal, and an output signal is an up-conversion radio frequency signal. The mixer comprises three units, input signals are the same, and the transconductance ratio of transconductance stages is 1 to V2 to 1; the local oscillator signals are driven by three orthogonal square wave signals that are 45 ° apart. The drain electrode of the tail current source of each unit of the mixer can inject or extract current;
a calibration feedback path 102; the calibration feedback path consists of a first fundamental self-mixer and a third harmonic mixer. The channel takes a signal from an output port of the harmonic suppression quadrature mixer and outputs the signal to a signal processing and detecting circuit;
a signal processing and detection circuit 103, which is mainly used for signal filtering, gain adjustment and amplitude detection; specifically, the signal processing and detecting circuit performs filtering and gain adjustment on the feedback signal, and then calculates the magnitude of each spectral component of the obtained signal, so as to provide a basis for judgment of a control program. The signal processing and detection circuit can multiplex modular circuits in the receiver chain, reducing system overhead.
A calibration control unit 104; the calibration control unit controls the calibration adjusting circuit to calibrate the harmonic suppression quadrature mixer according to the results of the signal processing and detecting circuit and the preset program and algorithm by using a calibration control program, so that good harmonic suppression performance is obtained.
And the calibration adjusting circuit 105 is controlled by a preset calibration control algorithm, adjusts the mixer circuit and the working state, eliminates various amplitude mismatches, and realizes good harmonic suppression performance.
Specifically, the program, algorithm, calibration control algorithm, and the like described above are preset and stored by a developer.
Specifically, the path comprises two paths of I/Q amplitude mismatch calibration and third harmonic detection. Both paths contain path switches, controlled by a calibration control algorithm.
Wherein, the I/Q amplitude mismatch calibration path is a self-mixer (self-mixer); the third harmonic detection path is a down-conversion mixer, the local oscillation signal of the down-conversion mixer is triple frequency of the local oscillation signal of the harmonic suppression orthogonal mixer, and the signal of the frequency band near the third harmonic at the output end of the harmonic suppression orthogonal mixer can be down-converted to a baseband signal.
Specifically, the calibration adjustment circuit is similar to a current-mode digital-to-analog converter, inputs the N-bit digital control signal generated by the control algorithm, and outputs the N-bit digital control signal as direct-current injection current.
FIG. 2 is a schematic diagram of a relationship between a harmonic rejection quadrature mixer body and a calibration adjustment circuit according to an embodiment of the present invention; as shown in fig. 2, this injected current acts on the drain of the mixer tail current source, changing the bias current of the input transistors M1, M2, M3, M4, thereby changing the input transconductance of the mixer. The value of N may be selected after compromise between calibration effects and resource overhead.
Fig. 3 is a schematic diagram of a calibration adjustment circuit according to an embodiment of the present invention, and as shown in fig. 3, the current injection manner is divided into a differential current injection manner and a common mode current injection manner.
Aiming at a circuit corresponding to differential current injection, the circuit is used for carrying out amplitude mismatch adjustment between two paths of I/Q in each unit of the mixer, and the relation between the injection current and a control word is as follows:
wherein, I0For the LSB unit current of the injection current array, biIs the ith bit coefficient of the binary control word,
is b isiThe opposite is taken. If the value of the injected current is negative, it indicates that current is drawn from the node.
Aiming at a circuit corresponding to common-mode current injection, the circuit is used for carrying out mismatch adjustment on a transconductance ratio of V2: 1, and the relation between the injection current and a control word is as follows:
when the highest bit of the binary control word is 1 and the rest bits are 0, the Iop, Ion and Io are about 0, and the adjustment degree of the calibration adjustment circuit on the mixer is minimum; on the contrary, if the binary control word is all 0 or all 1, it means that the calibration adjustment circuit makes the maximum adjustment to the transconductance stage of the mixer.
Fig. 4 is a flowchart of control performed by a calibration control unit according to an embodiment of the present invention, and as shown in fig. 4, the embodiment provides a method for controlling the calibration control unit, where the calibration control unit is loaded with a control program, and the control program enables a transceiver system to enter a calibration mode, and first sets operating states of modules in the circuit shown in fig. 1, including enabling of the modules, turning off of switches, and the like; then controlling the digital baseband to generate a single-frequency test signal to act on the harmonic suppression quadrature mixer; then filtering, gain adjustment, processing and amplitude detection are carried out on the output signals; and finally, controlling a calibration adjusting circuit to carry out amplitude mismatch adjustment on the frequency mixer according to the processing result.
The method comprises the following specific steps:
step 001, entering a calibration mode, and initializing each calibration module;
and step 002, entering an I/Q mismatch calibration mode.
Specifically, step 002 includes: the feedback path switch S1 is opened and S2 is closed, enabling the self-mixer and the third harmonic mixer to be turned off.
Here, the frequency of the local oscillation signal of the harmonic suppression quadrature mixer is a primary fundamental wave; the digital baseband sends out an orthogonal single-frequency test signal. The frequency of the test signal is such that its double frequency is still within the filter passband bandwidth of the signal processing and detection circuitry.
Step 003, enable the first unit of the quadrature mixer of harmonic rejection, and close the second, third unit, make it degenerate into a simple quadrature mixer; the calibration adjusting circuit performs I/Q amplitude mismatch calibration on the first unit of the harmonic suppression quadrature mixer by using a preset control algorithm to obtain a control word N1 of a differential current output module DM1 of the calibration adjusting circuit.
Step 004, enabling the second unit of the harmonic suppression quadrature mixer, and turning off the first unit and the third unit to degrade the first unit and the third unit into a simple quadrature mixer; the calibration adjusting circuit performs I/Q amplitude mismatch calibration on the first unit of the harmonic suppression quadrature mixer by using a preset control algorithm to obtain a control word N2 of a differential current output module DM2 of the calibration adjusting circuit.
005, enabling a third unit of the harmonic suppression quadrature mixer, and turning off the first and second units to degenerate the third unit into a simple quadrature mixer; the calibration adjusting circuit performs I/Q amplitude mismatch calibration on the first unit of the harmonic suppression quadrature mixer by using a preset control algorithm to obtain a control word N3 of a differential current output module DM3 of the calibration adjusting circuit.
And step 006, entering a harmonic suppression mismatch calibration mode.
Specifically, step 006 includes: the feedback path switch S2 is opened and S1 is closed, causing the self mixer to be off and the third harmonic mixer to be enabled. Here, the input of the local oscillation signal frequency of the harmonic suppression quadrature mixer is the third harmonic frequency; the digital baseband sends out an orthogonal single-frequency test signal.
The frequency of the orthogonal single frequency test signal needs to be guaranteed within the filter bandwidth of the signal processing and detection circuit.
The differential current output modules DM1 to DM3 of the calibration adjustment circuit are all applied to the corresponding mixer units, and the control words are N1, N2 and N3 respectively.
And step 007, searching for an optimal control word N4 of a common-mode current output module CM of the calibration and adjustment circuit by the calibration and adjustment circuit through a preset control algorithm, so that the component amplitude which is obtained by the signal processing and analysis circuit and has the same frequency as the test signal is minimum.
Here, the search method may employ a binary search or successive traversal, etc.
Step 008, saving and setting control words N1, N2, N3 and N4 of the calibration adjusting circuit, closing the calibration feedback path and exiting the calibration procedure.
The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, and any modifications, equivalents, improvements, etc. that are within the spirit and principle of the present invention should be included in the present invention.
Claims (7)
1. An amplitude mismatch calibration circuit, the circuit comprising: the device comprises a harmonic suppression quadrature mixer, a calibration feedback path, a signal processing and detecting circuit, a calibration control unit and a calibration adjusting circuit; wherein,
the harmonic suppression quadrature mixer is positioned in the transmitting path and used for receiving quadrature baseband I/Q signals, obtaining up-conversion radio frequency signals according to the I/Q signals and outputting the up-conversion radio frequency signals to the calibration feedback path;
the calibration feedback path is used for receiving the signal output by the harmonic suppression quadrature mixer, and outputting a feedback signal to the signal processing and detecting circuit after the signal is respectively processed by a fundamental wave self-mixer and a third harmonic mixer in the calibration feedback path;
the signal processing and detecting circuit is used for filtering and gain adjustment of the feedback signal, and calculating according to the modulated signal to obtain the magnitude of each frequency spectrum component of the obtained signal;
the calibration control unit is used for controlling the whole calibration system according to a preset algorithm and generating a control signal according to the magnitude of each frequency spectrum component of the signal so as to control the calibration adjusting circuit to calibrate the harmonic suppression orthogonal mixer;
and the calibration adjusting circuit is used for adjusting the mixer circuit and the working state according to the control signal sent by the calibration control unit so as to eliminate various amplitude mismatches.
2. The circuit of claim 1, wherein the harmonic rejection quadrature mixer comprises: the input signals of the three units are the same, the transconductance ratio of the transconductance stage is 1 to V2 to 1, the local oscillator signals are driven by three orthogonal square wave signals which are separated by 45 degrees, and the drain electrode of a tail current source of each unit can inject or extract current.
3. The circuit of claim 1, wherein the signal processing and detection circuit multiplexes modular circuits in the receiver chain.
4. The circuit of claim 1, wherein the harmonic rejection quadrature mixer is connected to the third harmonic mixer by a first switch; the harmonic rejection quadrature mixer is connected with the self-mixer through a second switch;
controlling whether two paths of the amplitude mismatch calibration circuit are communicated through the first switch and the second switch; the two passageways include: I/Q amplitude mismatch calibration and third harmonic detection.
5. The circuit of claim 4, wherein the third harmonic mixer comprises: a down-conversion mixer;
the local oscillation signal of the third harmonic mixer is triple frequency of the local oscillation signal of the harmonic suppression orthogonal mixer, and is used for down-converting the signal of the frequency band near the third harmonic of the output end of the harmonic suppression orthogonal mixer to a baseband signal.
6. The circuit of claim 1, wherein the input signal of the calibration adjustment circuit is an N-bit digital control signal generated by the calibration control unit, and the output signal is a dc injection current;
the direct current injection current is applied to the drain terminal of a tail current source of the harmonic suppression quadrature mixer, and bias currents input to transistors M1, M2, M3 and M4 in each unit of the harmonic suppression quadrature mixer are changed, so that input transconductance of the harmonic suppression quadrature mixer is changed.
7. The circuit of claim 1, wherein the dc injection current injection harmonics suppresses the drain of the quadrature mixer tail current source by: differential current injection and common mode current injection; wherein,
the circuit corresponding to the differential current injection mode is used for carrying out amplitude mismatch adjustment between two paths of I/Q in each unit of the harmonic suppression quadrature mixer, and the relation between the injection current and a control word is as follows:
wherein, I0For the least significant bit LSB unit current of the injection current array, biIs the ith bit coefficient of the binary control word,
is b isiNegation of (1); if the injection current value is negative, the current is extracted from the node; the N represents the number of bits of the digital input of the calibration adjustment circuit; the above-mentionedIop represents the output value of the positive terminal of the differential current of the calibration and adjustment circuit, Ion represents the output value of the negative terminal of the differential current of the calibration and adjustment circuit
The circuit corresponding to the common mode current injection mode is used for carrying out mismatch adjustment on a transconductance ratio of V2: 1, and the relation between the injection current and a control word is as follows:
when the MSB of the binary control word is 1 and the rest bits are 0, the Iop, Ion and Io are about 0, which indicates that the adjustment degree of the calibration adjustment circuit to the harmonic suppression orthogonal mixer is minimum; on the contrary, if the binary control word is all 0 or all 1, it indicates that the calibration adjustment circuit performs the maximum range adjustment on the transconductance stage of the harmonic suppression quadrature mixer.
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| CN201911084587.8A CN111800090A (en) | 2019-11-07 | 2019-11-07 | Amplitude mismatch calibration circuit |
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|---|---|---|---|
| CN201911084587.8A CN111800090A (en) | 2019-11-07 | 2019-11-07 | Amplitude mismatch calibration circuit |
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| CN111800090A true CN111800090A (en) | 2020-10-20 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112615590A (en) * | 2020-12-18 | 2021-04-06 | 电子科技大学 | TSM-PI frequency tripler based on double-balanced frequency mixing |
| CN116015590A (en) * | 2022-12-30 | 2023-04-25 | 上海星思半导体有限责任公司 | A signal phase alignment method, device and related equipment |
| TWI835678B (en) * | 2023-06-27 | 2024-03-11 | 瑞昱半導體股份有限公司 | Signal transmission apparatus and method having mismatch calibration mechanism |
-
2019
- 2019-11-07 CN CN201911084587.8A patent/CN111800090A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112615590A (en) * | 2020-12-18 | 2021-04-06 | 电子科技大学 | TSM-PI frequency tripler based on double-balanced frequency mixing |
| CN116015590A (en) * | 2022-12-30 | 2023-04-25 | 上海星思半导体有限责任公司 | A signal phase alignment method, device and related equipment |
| TWI835678B (en) * | 2023-06-27 | 2024-03-11 | 瑞昱半導體股份有限公司 | Signal transmission apparatus and method having mismatch calibration mechanism |
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