CN111722072B - Circuit and system for on-line measurement of conduction voltage drop of high withstand voltage power semiconductor devices - Google Patents
Circuit and system for on-line measurement of conduction voltage drop of high withstand voltage power semiconductor devices Download PDFInfo
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- CN111722072B CN111722072B CN202010405411.4A CN202010405411A CN111722072B CN 111722072 B CN111722072 B CN 111722072B CN 202010405411 A CN202010405411 A CN 202010405411A CN 111722072 B CN111722072 B CN 111722072B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2632—Circuits therefor for testing diodes
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
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Abstract
本发明提供了一种高耐压的功率半导体器件导通压降在线测量电路及系统，包括耐压电路和钳位电路，耐压电路的一端与钳位电路的一端相连接，耐压电路和钳位电路的另一端分别连接被测功率半导体器件的两端中的任一端，耐压电路由若干个耐压单元与限流电路组成，钳位电路的两端为测量电路的输出端，钳位电路的钳位电压高于被测功率半导体器件的导通压降，当被测功率半导体器件关断时，钳位电路发挥钳位作用；当被测功率半导体器件导通时，钳位电路的钳位作用失效。本发明通过多个耐压单元的串联分压实现测量电路耐压等级的大幅提升，且可以通过调节限流电路与钳位电路中的器件参数提升测量系统的暂态性能，测量精准、适用范围广且成本较低。
The invention provides an on-line measurement circuit and system for the conduction voltage drop of a high withstand voltage power semiconductor device, comprising a withstand voltage circuit and a clamping circuit, one end of the withstand voltage circuit is connected with one end of the clamping circuit, and the withstand voltage circuit and The other end of the clamping circuit is respectively connected to either end of the two ends of the power semiconductor device under test. The withstand voltage is composed of several withstand voltage units and a current limiting circuit. The two ends of the clamping circuit are the output ends of the measuring circuit. The clamping voltage of the bit circuit is higher than the conduction voltage drop of the power semiconductor device under test. When the power semiconductor device under test is turned off, the clamp circuit plays a clamping role; when the power semiconductor device under test is turned on, the clamp circuit The clamping effect fails. The invention realizes a great improvement of the withstand voltage level of the measurement circuit through the series voltage division of a plurality of withstand voltage units, and can improve the transient performance of the measurement system by adjusting the device parameters in the current limiting circuit and the clamping circuit, and the measurement is accurate and applicable. Wide and low cost.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a circuit and a system for measuring conduction voltage drop of a power semiconductor device with high voltage resistance and adjustable transient performance.
Background
The power semiconductor device is an important element in the power electronic converter, and the power semiconductor device is the part with the highest fault probability and the highest cost in the power electronic converter. The conduction voltage drop is one of important characteristic parameters of the power semiconductor device, and is related to the junction temperature of the power semiconductor device and the aging state of a bonding wire in the device, so that the conduction voltage drop can be used as a temperature-sensitive coefficient for monitoring the heating state of the device and can also be used for detecting the aging state of the device. Accurate on-line measurement of the conduction voltage drop of the power semiconductor device is helpful for thermal characteristic analysis of the device and can predict the fault of the device, and the method is an effective means for improving the reliability of the power electronic converter
In order to accurately monitor the junction temperature and the aging state of the device, the accuracy of the conduction voltage drop needs to reach the mV level. However, when the power semiconductor device is turned off under a working condition, both ends of the power semiconductor device need to withstand high voltage of hundreds of volts or even kilovolts, and when the device is turned on, the on-state voltage drop of the power semiconductor device is only about 1V, so that the measurement accuracy of the on-state voltage drop is reduced due to the large range of a measurement system by directly measuring the voltage at both ends of the device, and the voltage when the device is turned off needs to be clamped at a lower value so as to accurately measure the on-state voltage drop when the device is turned on.
Disclosure of Invention
In order to improve the resolution of the measurement system, the measurement circuit needs to be designed to clamp the high voltage at the time of turning off the power semiconductor device to a lower voltage value. Therefore, the invention provides a measuring circuit for conducting voltage drop of a power semiconductor device with high voltage resistance and adjustable transient performance.
According to a first aspect of the present invention, there is provided a circuit for measuring conduction voltage drop of a high withstand voltage power semiconductor device, comprising a withstand voltage circuit and a clamp circuit, wherein one end of the withstand voltage circuit is connected to one end of the clamp circuit, the other ends of the withstand voltage circuit and the clamp circuit are respectively connected to any one of two ends of a power semiconductor device to be measured, and two ends of the clamp circuit are output ends of the measuring circuit,
the voltage-resistant circuit is formed by connecting a voltage-resistant unit and a current-limiting circuit in series, and the voltage-resistant unit is one or more than one;
the clamping voltage of the clamping circuit is higher than the conduction voltage drop of the power semiconductor device to be measured, and the clamping circuit plays a clamping role when the power semiconductor device to be measured is switched off; when the power semiconductor device to be tested is conducted, the clamping effect of the clamping circuit is invalid.
Optionally, the voltage-withstanding circuit and the clamping circuit are both two-port circuit modules, each two-port circuit module has a positive port and a negative port, and the inter-module connection mode includes any one of two modes:
-the negative port of the voltage-tolerant circuit is connected to the positive port of the clamp circuit, the positive port of the voltage-tolerant circuit is connected to the first terminal D of the power semiconductor device under test, and the negative port of the clamp circuit is connected to the second terminal S of the power semiconductor device under test; or the like, or, alternatively,
-the positive port of the voltage-tolerant circuit is connected to the negative port of the clamp, the positive port of the clamp is connected to the first terminal D of the power semiconductor device under test, and the negative port of the voltage-tolerant circuit is connected to the second terminal S of the power semiconductor device under test.
Optionally, the voltage withstand unit and the current limiting circuit are both two-port circuit modules, and when the voltage withstand unit is more than one, the serial connection mode of the voltage withstand unit and the current limiting circuit includes:
the negative port of one of the voltage-withstanding units is connected to the positive port of the other voltage-withstanding unit, or either end of the current-limiting circuit is connected to either end of the voltage-withstanding unit, wherein,
the positive port of the voltage-withstanding circuit is the positive port of a voltage-withstanding unit or one end of the current-limiting circuit, and the negative port of the voltage-withstanding circuit is the negative port of the voltage-withstanding unit or one end of the current-limiting circuit.
Optionally, the voltage withstand unit includes a first field effect transistor and a gate resistor, a drain of the first field effect transistor is a positive port of the voltage withstand unit, a source of the first field effect transistor is connected to one end of the gate resistor, and the other end of the gate resistor is connected to a gate of the first field effect transistor and serves as a negative port of the voltage withstand unit.
Preferably, the voltage-withstanding circuit further comprises a voltage-sharing resistor, and two ends of the voltage-sharing resistor are respectively connected with the drain and the gate of the first field-effect transistor.
Optionally, the clamp circuit includes a second field effect transistor, a gate and a drain of the second field effect transistor are connected to serve as a positive port of the clamp circuit, and a source of the second field effect transistor serves as a negative port of the clamp circuit.
Optionally, the clamping circuit further comprises a diode, a cathode of the diode is connected with a gate and a drain of the second field effect transistor, and an anode of the diode is used as a positive port of the clamping circuit, or an anode of the diode is connected with a source of the second field effect transistor, and a cathode of the diode is used as a negative port of the clamping circuit.
Optionally, the clamp circuit comprises a transistor having a gate connected to a collector as a positive port of the clamp circuit and an emitter as a negative port of the clamp circuit.
Preferably, the clamp circuit may further include a tuning capacitor, one end of the tuning capacitor is connected to the gate of the second fet or the gate of the transistor, and the other end of the tuning capacitor is connected to the source of the second fet or the emitter of the transistor.
Optionally, the current limiting circuit is a resistor or an inductor or a series connection of a resistor and an inductor.
According to a second aspect of the present invention, there is provided an on-line measurement system for conduction voltage drop of a power semiconductor device, comprising any one of the on-line measurement circuits or a combination of a plurality of the on-line measurement circuits.
Compared with the prior art, the embodiment of the invention has at least one of the following beneficial effects:
1. the on-line measuring circuit for the conduction voltage drop of the power semiconductor device is simple in circuit structure, clamps the high voltage at two ends of the power semiconductor device to be measured at a lower voltage value by means of the characteristics of the field effect transistor, and does not need an additional low-voltage auxiliary power supply. A plurality of withstand voltage units are connected in series (and can further be equalized), the withstand voltage grade of the test loop is improved, the withstand voltage requirement of the field effect tube in the withstand voltage unit is reduced, and the cost is reduced.
2. According to the on-line measuring circuit for the conduction voltage drop of the power semiconductor device, when the power semiconductor device to be measured is conducted, no voltage drop exists in the on-line measuring circuit, and the influence of the voltage drop change of components in the on-line measuring circuit on a measuring result is avoided.
3. According to the on-line measuring circuit for the conduction voltage drop of the power semiconductor device, the current limiting circuit is connected in series in the voltage-resistant circuit, so that the transient current generated in the measuring circuit when the switching state of the device to be measured changes is reduced, the loss generated on the field effect tube in the voltage-resistant circuit is reduced, the requirement on the capacity of the field effect tube is reduced, and the safety and the economical efficiency of the testing circuit are improved.
4. According to the on-line measuring circuit for the conduction voltage drop of the power semiconductor device, the capacitors are connected in parallel in the clamping circuit, so that the transient time is shortened, the negative pressure overshoot phenomenon caused in the switching-on process is relieved, and the transient performance of the testing circuit is improved.
5. According to the on-line measuring circuit for the conduction voltage drop of the power semiconductor device, the power semiconductor device to be measured can be a fully-controlled, uncontrollable or combined power semiconductor device, for example, the conduction voltage drop of a power transistor and an anti-parallel diode thereof can be measured simultaneously, the embarrassment that separate measurement is needed is avoided, the measurement steps are simplified, and the measurement speed is improved.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a schematic diagram of the overall connection of an on-line measurement circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of the overall connection of an online measurement circuit according to another embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating a principle of a conduction voltage drop of an on-line measurement circuit according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of a voltage withstanding unit according to a preferred embodiment of the present invention;
FIG. 5 is a schematic diagram of the connection of a voltage-withstanding unit including a voltage-equalizing resistor according to another preferred embodiment of the present invention;
FIG. 6 is a schematic diagram showing the connection of a voltage withstanding circuit composed of a plurality of voltage withstanding units shown in FIG. 5;
FIG. 7 is a schematic diagram of the connection between the current limiting circuit and the voltage withstanding unit according to a preferred embodiment of the present invention;
FIG. 8 is a schematic diagram of the connection between the current limiting circuit and the voltage withstanding unit according to another preferred embodiment of the present invention;
FIG. 9 is a schematic diagram of the connection of a clamp circuit including a tuning capacitor according to a preferred embodiment of the present invention;
FIG. 10 is a schematic diagram of the connection of a clamping circuit including diodes in a preferred embodiment of the present invention;
FIG. 11 is a schematic diagram of the connection of a clamping circuit including a diode according to another preferred embodiment of the present invention;
FIG. 12 is a schematic diagram of the connection of a clamp circuit using transistors in an embodiment of the present invention;
FIG. 13 is a schematic diagram of the connection of a high withstand voltage on-line measurement circuit according to a preferred embodiment of the present invention;
FIG. 14 is a schematic connection diagram of an embodiment of an on-line measuring circuit assembly for measuring the conduction voltage drop of a bridge arm according to the present invention;
FIG. 15 is a schematic diagram of a transient current path of an on-line measurement circuit according to a preferred embodiment of the present invention;
FIG. 16 is a schematic connection diagram of an on-line measurement circuit with adjustable transient performance according to a preferred embodiment of the present invention.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the spirit of the invention. All falling within the scope of the present invention.
Fig. 1 is a connection schematic diagram of an on-line voltage drop measurement circuit of a power semiconductor device according to an embodiment of the present invention. Referring to fig. 1, in this embodiment, the on-line measuring circuit for the conduction voltage drop of the power semiconductor device includes a voltage withstanding circuit and a clamping circuit, where the voltage withstanding circuit is obtained by connecting a plurality of voltage withstanding units 1-N in series and connecting a current limiting circuit in series, and the voltage withstanding units may be one or more than one, such as two, three … …, and the like. The two ends of the power semiconductor device to be measured are respectively a first end D and a second end S, the positive port of the voltage-withstanding circuit is connected with the first end D of the power semiconductor device to be measured, the negative port of the voltage-withstanding circuit is connected with the positive port of the clamping circuit, and the negative port of the clamping circuit is connected with the second end S of the power semiconductor device to be measured; the two ends of the clamping circuit are output ends of the measuring circuit. Meanwhile, the clamping voltage of the clamping circuit is higher than the conduction voltage drop of the power semiconductor device to be tested. The circuit structure of the embodiment is simple, the high voltage at the two ends of the power semiconductor device to be measured is clamped at a lower voltage value by the characteristics of the field effect transistor, and an additional low-voltage auxiliary power supply is not needed. The graded series connection of the plurality of voltage-resistant units reduces the voltage-resistant requirement on the field-effect tube, greatly improves the voltage-resistant grade of the measuring circuit, reduces the cost of the field-effect tube and improves the safety of the measuring circuit.
Fig. 2 is a schematic connection diagram of an on-line measuring circuit for conduction voltage drop of a power semiconductor device according to another embodiment of the present invention, and fig. 2 shows that the on-line measuring circuit for conduction voltage drop of a power semiconductor device in this embodiment includes a voltage withstanding circuit and a clamping circuit, where the voltage withstanding circuit is obtained by connecting one or more voltage withstanding units in series and connecting the voltage withstanding units in a positive-negative manner with a current limiting circuit. The two ends of the power semiconductor device to be measured are respectively a first end D and a second end S, the negative port of the voltage-withstanding circuit is connected with the second end S of the power semiconductor device to be measured, the positive port of the voltage-withstanding circuit is connected with the negative port of the clamping circuit, and the positive port of the clamping circuit is connected with the first end D of the power semiconductor device to be measured; the two ends of the clamping circuit are output ends of the measuring circuit.
Fig. 3 is a schematic diagram illustrating a principle of a conduction voltage drop of an online measurement circuit according to an embodiment of the invention. Referring to fig. 3, when the power semiconductor device under test is turned off, the input voltage of the measurement circuit is a high voltage VceThe clamp circuit plays a clamping role, and the output voltage of the measuring circuit is clamp voltage VclampA difference Δ V between an input voltage and an output voltage is applied to the voltage-withstanding circuit; when the power semiconductor device to be measured is conducted, the input voltage of the measuring circuit is the conducting voltage drop of the device, the clamping action of the clamping circuit fails, and the output voltage of the measuring circuit is the conducting voltage drop of the power semiconductor device to be measured. The whole measuring circuit automatically switches the circuit state according to the characteristics of the device without additional driving signal input. Therefore, when the output circuit of the on-line measuring circuit is sampled and measured, the measuring range only needs to reach the clamping voltage V close to the conduction voltage dropclampTherefore, the measurement resolution is greatly improved, and the on-line measurement of the conduction voltage drop of the power semiconductor device is accurately and simply realized.
FIG. 4 is a circuit diagram of a voltage withstanding unit according to a preferred embodiment of the present invention. Referring to fig. 4, M is the first fet in this embodiment, and R is the gate resistor. The voltage-withstanding unit comprises a first field-effect tube M and a grid resistor R, wherein the drain electrode of the first field-effect tube M is the positive port of the voltage-withstanding unit, the source electrode of the first field-effect tube M is connected with one end of the grid resistor R, and the other end of the grid resistor R is connected with the grid electrode of the first field-effect tube M and serves as the negative port of the voltage-withstanding unit.
FIG. 5 is a circuit diagram of a voltage withstanding unit according to another preferred embodiment of the present invention. Referring to fig. 5, this embodiment adds a voltage equalizing resistor to the voltage withstanding unit of the embodiment shown in fig. 4, where M is the first fet, and R is1Is the gate resistance, R2Is a voltage equalizing resistor, wherein the first field effect transistor M and the gate resistor R1The connection of (2) is the same as that in the above-mentioned FIG. 4, and the voltage equalizing resistor R2Respectively connected to the drain and gate of the first field effect transistor M. In the embodiment, on the basis of adopting one or more voltage-withstanding units, voltage-equalizing is further carried out by adopting the voltage-equalizing resistor, so that the voltage-withstanding grade of the test loop can be further improved.
Fig. 6 is a schematic diagram showing the connection of a voltage-resistant circuit including a plurality of voltage-resistant cells shown in fig. 5. Referring to fig. 6, units 1 to UnitN are N voltage-withstanding units shown in fig. 5, and CL is a current-limiting circuit, in this embodiment, N voltage-withstanding units Unit1 to UnitN are sequentially connected in series at positive and negative ports, one end of the current-limiting circuit CL is connected to the negative port of the nth voltage-withstanding Unit UnitN, the positive port of the voltage-withstanding circuit is the positive port of the first voltage-withstanding Unit1, and the negative port of the voltage-withstanding circuit is the other end of the current-limiting circuit CL. In the embodiment, the current limiting circuit is connected in series in the voltage-resistant circuit, so that the transient current generated in the measuring loop when the switching state of the tested device is changed is reduced, the loss generated on the field effect tube in the voltage-resistant loop is reduced, and the safety of the test circuit is improved.
FIG. 7 is a schematic diagram of the connection between the current limiting circuit and the voltage withstanding unit according to a preferred embodiment of the present invention. Referring to fig. 7, the current limiting circuit CL is connected between two voltage-withstanding units, and the rest of the connections are similar to those in fig. 6, in this embodiment, the positive port of the voltage-withstanding circuit is the positive port of the first voltage-withstanding Unit1, and the negative port of the voltage-withstanding circuit is the negative port of the nth voltage-withstanding Unit UnitN.
FIG. 8 is a schematic diagram of the connection between the current limiting circuit and the voltage withstanding unit in another preferred embodiment of the present invention. Referring to fig. 8, one end of the current limiting circuit CL is connected to the positive port of the first voltage withstanding Unit1, and the rest of the connections are similar to those in fig. 6, in this embodiment, the positive port of the voltage withstanding circuit is the other end of the current limiting circuit CL, and the negative port of the voltage withstanding circuit is the negative port of the nth voltage withstanding Unit UnitN.
FIG. 9 is a schematic diagram of the connection of a clamp circuit including a tuning capacitor according to a preferred embodiment of the present invention. Referring to fig. 9, the clamping circuit includes a second fet and further includes a tuning capacitor. In this example M is the second FET, CgNamely, the adjusting capacitor, the grid electrode and the drain electrode of the second field effect transistor M are connected to be used as the positive port of the clamping circuit, the source electrode of the second field effect transistor M is used as the negative port of the clamping circuit, and the adjusting capacitor CgAre respectively connected with the grid electrode and the source electrode of the second field effect transistor M. In the clamping circuit in the embodiment, the capacitors are connected in parallel, so that the transient time is shortened, the negative pressure overshoot phenomenon caused in the switching-on process is relieved, and the transient performance of the test circuit is improved.
The on-line measurement circuit for the conduction voltage drop of the power semiconductor device based on the clamp circuit of the embodiment shown in fig. 9 can be used for on-line measurement of the conduction voltage drop of a fully-controlled power semiconductor device, such as a MOSFET, a power transistor, an IGBT, and the like, and corresponds to the fully-controlled power semiconductor device, two ports of the above-mentioned power semiconductor device to be measured: the first end D of the MOSFET is a drain electrode, and the second end S is a source electrode; the first end D of the power transistor is a collector, and the second end S of the power transistor is an emitter; the first end D of the IGBT is a collector, and the second end S is an emitter.
FIG. 10 is a connection diagram of a clamping circuit including a diode according to a preferred embodiment of the present invention. Referring to fig. 10, the clamp circuit includes a second fet having a gate and a drain connected as a positive port of the clamp circuit, and a source as a negative port of the clamp circuit. A diode is also included in this embodiment. In the figure, D is a diode, the anode of the diode D is connected to the source of the second fet M, the cathode of the diode D is used as the negative port of the clamping circuit, and the rest of the circuit connections are the same as those shown in fig. 9.
FIG. 11 is a connection diagram of a clamping circuit including a diode according to another preferred embodiment of the present invention. Referring to fig. 11, the embodiment is different from fig. 10 in that: the cathode of the diode D is connected to the gate and source of the second fet M, the anode of the diode D serves as the positive port of the clamp circuit, and the rest of the circuit connections are the same as those shown in fig. 9.
Fig. 12 is a connection diagram of a clamp circuit using transistors according to an embodiment of the invention. Referring to FIG. 12, T is a transistor in this embodiment, CgFor adjusting the capacitance, the gate and collector of the transistor T are connected as the positive port of the clamp, the emitter of the transistor T is used as the negative port of the clamp, and the capacitor C is adjustedgThe connection of (a) is the same as that shown in fig. 9 described above. The transistor T in this embodiment may be an insulated gate bipolar transistor without an anti-parallel diode.
The power semiconductor device to be measured applicable to the on-line measuring circuit for the conduction voltage drop of the power semiconductor device based on the clamping circuit of the embodiment shown in fig. 10 to 12 can be a fully-controlled type, an uncontrollable type (diode), a combined type and other power semiconductor devices. The combined power semiconductor device includes, but is not limited to, a MOSFET and its anti-parallel diode, an IGBT and its anti-parallel diode, and the like. For the uncontrollable type (diode), the first end D of the power semiconductor device under test is a cathode, and the second end S is an anode. In the combined power semiconductor device, when an MOSFET and an anti-parallel diode thereof are connected, a first end D is a drain electrode and a cathode, and a second end S is a source electrode and an anode; when the IGBT and the anti-parallel diode thereof are connected in parallel, the first end D is an emitter and a cathode, and the second end S is a collector and an anode.
FIG. 13 is a schematic connection diagram of a high withstand voltage on-line measurement circuit according to a preferred embodiment of the present invention. As shown in FIG. 13, the on-line measurement circuit comprises N voltage-withstanding units 1-UnitN, a current-limiting circuit CL, a transistor T and a regulating capacitor CgWherein the transistor T and the regulating capacitor CgThe clamp circuit is configured in the manner of the embodiment shown in fig. 12, and the N withstand voltage units and the current limiting circuit CL are configured in the manner of the embodiment shown in fig. 6. The ith voltage withstanding unit UnitI comprises the first field effect transistor MIThe gate resistance RI1And the voltage equalizing resistor RI2These devices constitute a voltage-resistant unit in the manner of the embodiment shown in fig. 5.
When the power semiconductor device to be measured is turned off, the input voltage of the on-line measuring circuit, namely the voltage at two ends of the power semiconductor device to be measured is high voltage, and the first field effect transistors M in each voltage-resisting unit1-MNAnd saturation, wherein the output voltage of the online measuring circuit is the gate threshold voltage of the transistor T, the gate threshold voltage of the transistor T is slightly higher than the conduction voltage drop of the power semiconductor device to be measured, at the moment, the difference delta V between the input voltage and the output voltage of the online measuring circuit is applied to the voltage-withstanding circuit, and due to the existence of voltage-equalizing resistors in all voltage-withstanding units, the voltage delta V/N is uniformly applied to each voltage-withstanding unit, so that the bearing voltage of each voltage-withstanding unit is greatly reduced, the cost of the required device is reduced, and the safety of the measuring circuit is enhanced. When the power transistor in the tested power semiconductor device is turned on, the first field effect transistor M in each voltage-resisting unit1-MNConducting, because the current in the test loop is almost zero at this time, the first field effect tube M1-MNAnd a gate resistance R11-RN1Is equal to zero, so that the output voltage of the measuring circuit is exactly equal to the conduction voltage drop of the power semiconductor device to be measured.
The transient characteristic of the on-line measuring circuit is controllable by introducing the current limiting circuit with adjustable parameters and the adjusting capacitor, and the switching frequency suitable for testing is wider.
In a more preferred embodiment, the first field effect transistor M1-MNIs a depletion MOS transistor, and the transistor T is an insulated gate bipolar transistor without an anti-parallel diode. Preferably, the first field effect transistor M1-MNMay be an N-channel field effect transistor. The type of the field effect transistor can be selected according to actual conditions.
FIG. 14 is a schematic connection diagram of an embodiment of the on-line measuring circuit assembly of the present invention for measuring the conduction voltage drop of a bridge arm. The test system shown in fig. 14 uses two online measurement circuits (VCEM _ H and VCEM _ L) to perform online monitoring of conduction voltage drops of two power semiconductor devices (DUT _ H and DUT _ L) of a bridge arm, and for convenience of description, only one voltage-withstanding unit is used in the voltage-withstanding circuit portion of the online measurement circuit in this embodiment. Wherein each power semiconductor device under test comprises a power transistor (T1, T2).
Taking the conduction voltage drop measuring circuit VCEM _ H of the bridge arm as an example, the first field effect transistor MHAnd one end D of the power semiconductor device DUT _ H under testHConnected, transistor THIs connected to the other end S of the power semiconductor device under test DUT _ HHWherein D isHIs a common terminal of the drain of the power transistor T1 and the cathode of the diode D1, SHWhich is common to the source of the power transistor T1 and the anode of the diode D1. When the power semiconductor device DUT _ H to be measured is turned off, the input voltage of the measuring circuit is equal to the DC bus voltage VDCAt this time MHSaturated and subjected to high voltage, the output voltage of the on-line measuring circuit being transistor THThe gate threshold voltage of. When the power semiconductor device under test DUT _ H (T1) is turned on, the first FET MHConducting and first field effect transistor MHAnd the voltage drop of the resistor R is equal to zero, and the output voltage of the measuring circuit is equal to the conduction voltage drop of the tested power semiconductor device DUT _ H. The principle of the conduction voltage drop measuring circuit VCEM _ L of the lower bridge arm is the same as that of the conduction voltage drop measuring circuit VCEM _ H of the upper bridge arm, and the description thereof is omitted.
FIG. 15 is a schematic diagram of a transient current path of an on-line measurement circuit according to a preferred embodiment of the present invention. Referring to fig. 15, for convenience of description, the embodiment uses a voltage-withstanding unit and a single resistor R2The current limiting circuit of (1) constitutes a voltage withstanding circuit, wherein the voltage withstanding unit includes a first field effect transistor M and a gate resistor R1, the connection is the same as the embodiment shown in fig. 4, the transistor T and the adjusting capacitor Cg constitute a clamping circuit, the connection is the same as the embodiment shown in fig. 12, and the connection between the voltage withstanding circuit and the clamping circuit is the same as the embodiment shown in fig. 1. Capacitor C connected by dotted linedgAnd CgeRespectively representing the equivalent parasitic capacitance between the drain electrode and the grid electrode of the first field effect transistor M and between the gate electrode and the emitter electrode of the transistor T.
The dashed line with arrows in fig. 15 indicates the main transient current path in the on-line measurement circuit when the power semiconductor device under test is turned from the off-state to the on-state, and this transient includes two processes: 1) the first field effect transistor M is converted from a saturation state to a conduction state, and in the process, transient current passes through a path I to enable a parasitic capacitor CdgDischarging until CdgThe voltage at both ends drops to 0; 2) the output voltage of the clamping circuit reaches a stable value, namely the conduction voltage drop of the power semiconductor device to be tested, and in the process, the transient current passes through a path II to enable a parasitic capacitor CgeDischarged or charged until CgeThe voltage across the terminals reaches a stable value. Due to parasitic capacitance CgeAlso on path I, in process 1 above, parasitic capacitance CdgParasitic capacitance C while discharginggeIs also discharging, and thus the parasitic capacitance CdgAnd CgeThe magnitude relationship of (A) determines the parasitic capacitance C at the end of process 1geThe voltage across the terminals, i.e. V as shown in FIG. 3nThe magnitude of the voltage at the point. Due to parasitic capacitance CgeThe voltage at two ends, namely the output voltage of the on-line measuring circuit, is always low, and can be applied to the parasitic capacitor CgeTwo-end parallel capacitance regulation CdgAnd CgeIn relation to the magnitude of, i.e. regulating the capacitance C in parallelg. When C is presentdgAnd CgeWhen the magnitude relation of (1) is appropriate, the output voltage V at the end of the processnThe conduction voltage drop of the tested device when the on-state voltage is close to stable can prevent overlarge negative voltage overshoot from damaging the test circuit, and can greatly shorten the transient time of the process 2, so that the on-line test circuit can be suitable for tested power semiconductor devices with wider switching frequency range.
At the same time, due to the parasitic capacitance C in Process 1dgThe rapid voltage drop at both ends will cause a large transient current, so that the loss generated on the first fet M is large, and thus the current limiting circuit, i.e. R in this embodiment, is2The transient current can be suppressed, and the effect of protecting the first field effect transistor M is achieved.
FIG. 16 is a schematic connection diagram of an on-line measurement circuit with adjustable transient performance according to a preferred embodiment of the present invention. As shown in FIG. 16, N withstand voltagesUnit1-UnitN and current limiting circuit RLThe withstand voltage circuit is formed by the connection method of the embodiment shown in fig. 6, the transistor T and the adjusting capacitor Cg are formed by the connection method of the embodiment shown in fig. 12, and the on-line measuring circuit is formed by the connection method of the embodiment shown in fig. 1 between the withstand voltage circuit and the clamping circuit. Wherein R in the current limiting circuitLFor adjustable resistors or toggle-controlled grading resistors, C in clamping circuitsgFor the tested power semiconductor devices with different withstand voltage grades and switching frequencies, the adjustable capacitor or the graded capacitor controlled by the dial switch can be used for adjusting RLAnd CgAnd the adjustment of the transient characteristic of the online measurement circuit and the improvement of the safety are realized by accessing the effective value of the online measurement circuit.
The on-line measuring circuit for the conduction voltage drop of the power semiconductor device provided by the embodiments of the invention clamps the high voltage at two ends of the device to be measured at a lower voltage value by depending on the characteristics of the field effect transistor, and does not need an additional low-voltage auxiliary power supply optimization circuit structure; when the power semiconductor device to be measured is conducted, no voltage drop exists in the online measuring circuit, so that the influence of the voltage drop change of the components in the online measuring circuit on the measuring result is avoided; the conduction voltage drop of the power transistor and the anti-parallel diode thereof can be measured simultaneously, and the embarrassment that separate measurement is needed is avoided. Furthermore, in the embodiment of the invention, the requirement on the voltage resistance of the field effect transistor is reduced by the graded series connection of the plurality of voltage resistance units, so that the voltage resistance grade of the measuring circuit is greatly improved, the cost of the field effect transistor is reduced, and the safety of the measuring circuit is improved; and the transient characteristic of the on-line measuring circuit is controllable by introducing the current-limiting circuit with adjustable parameters and the adjusting capacitor, so that the switching frequency suitable for testing is wider.
The embodiments of the invention simplify the measurement steps and improve the measurement speed, the on-line measurement circuit for the conduction voltage drop of the power semiconductor device has accurate measurement and low cost, and the application range is wider by improving the voltage resistance and the transient performance.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes and modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The preferred features may be used in any combination without conflict.
Claims (6)
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| CN113740693A (en) * | 2021-08-26 | 2021-12-03 | 珠海零边界集成电路有限公司 | Device performance testing method and device, storage medium and electronic equipment |
| CN114441924B (en) * | 2022-04-11 | 2022-06-28 | 山东阅芯电子科技有限公司 | Narrow pulse conduction voltage drop test method and circuit suitable for power semiconductor device |
| CN116165499B (en) * | 2022-09-08 | 2025-07-22 | 深圳市汇芯通信技术有限公司 | Circuit and method for measuring drain-source on-resistance of power switch device in working |
| CN115639453A (en) * | 2022-10-13 | 2023-01-24 | 国网浙江省电力有限公司电力科学研究院 | An On-Line Measurement Circuit of Conduction Voltage Drop of Power Devices That Can Realize Component Reuse |
| CN116718884B (en) * | 2023-04-25 | 2024-07-19 | 重庆大学 | Conduction voltage drop detection circuit, equipment and power conversion device |
| CN117169675B (en) * | 2023-09-01 | 2024-04-26 | 南京航空航天大学 | On-line monitoring circuit for conduction voltage drop of inverter-stage wide-temperature-zone power device |
| CN119644105A (en) * | 2024-11-19 | 2025-03-18 | 北京智芯微电子科技有限公司 | Device channel degradation monitoring circuit and chip |
| CN120074205A (en) * | 2025-04-29 | 2025-05-30 | 北京怀柔实验室 | Series voltage equalizing circuit of power semiconductor devices and power electronic converter |
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