CN111711564A - a gateway circuit - Google Patents

Abstract

The invention discloses a gateway circuit, comprising: a power supply module for supplying power to each functional module of the gateway circuit; a single-chip microcomputer for controlling each functional module of the gateway circuit and network data processing; an Ethernet module for realizing communication with a server Data interaction; LORA transmitter module, used to send radio frequency signals; LORA receiver module, used to receive radio frequency signals. Compared with the prior art, on the premise of satisfying the performance of the gateway, the present invention replaces the control module of the gateway circuit from a high-standard chip with a single-chip microcomputer, which greatly reduces the production cost of the gateway.

Description

a gateway circuit

technical field

The present invention relates to the field of gateways, in particular to a gateway circuit.

Background technique

LORA communication technology is an ultra-long-distance wireless communication technology, which has the advantages of low power consumption and long transmission distance. With the emergence of 5G, the Internet of Things technology has been widely popularized, and the Internet of Everything has gradually entered people's lives. The gateway is a kind of network connector, which is the communication bridge between the network node device and the network server. The existing LORA gateway combines the router-specific solution, MCU (Microcontroller Unit, micro control unit) and LORA WAN (Wide Area Network, wide area network) ) solution, which requires the use of expensive router chips, some of which are even more than 100 US dollars in price, resulting in a serious waste of software and hardware resources. Therefore, under the premise of satisfying performance, it is very important to reduce the production cost of the existing gateway.

SUMMARY OF THE INVENTION

The main purpose of the present invention is to provide a gateway circuit, aiming at realizing the technical problem of reducing the production cost of the existing gateway.

The present invention provides a gateway circuit, comprising:

The power module is used to supply power to each functional module of the gateway circuit;

Single-chip microcomputer, used to control the functional modules of the gateway circuit and network data processing;

Ethernet module for data interaction with the server;

LORA transmitter module, used to transmit radio frequency signals;

The LORA receiving module is used to receive radio frequency signals.

Preferably, the model of the microcontroller includes STM32F107RCT6.

Preferably, the Ethernet module includes an Ethernet control module, a network transformer and an interface module;

The signal output end of the LORA receiving module is connected with the first signal input end of the single-chip microcomputer;

The first signal output end of the single-chip microcomputer is connected with the first signal input end of the Ethernet control module;

The first signal output end of the Ethernet control module is connected with the first signal input end of the network transformer;

The first signal output end of the network transformer is connected with the signal input end of the interface module.

Preferably, the signal output end of the interface module is connected to the second signal input end of the network transformer;

The second signal output end of the network transformer is connected with the second signal input end of the Ethernet control module;

The second signal output end of the Ethernet control module is connected with the second signal input end of the microcontroller;

The second signal output end of the single-chip microcomputer is connected to the signal end input of the LORA transmitting module.

Preferably, the power module includes a transformer module, a first linear regulator and a second linear regulator;

The transformer module is respectively connected with the first linear regulator tube and the second linear regulator tube, wherein the transformer module is used to reduce the input voltage from 12V to 5V;

The first linear regulator reduces the 5V voltage to 3.3V to power the LORA transmitter module;

The second linear regulator reduces the 5V voltage to 3.3V to supply power to the functional modules in the circuit except the LORA transmitter module.

Preferably, the model of the transformer module includes SY8120B1ABC, and the model of the first linear regulator and the second linear regulator includes ME6210A33PG.

Preferably, the gateway circuit further includes a first filtering module and a second filtering module;

One end of the first filter module is connected to the first power supply output end of the power supply module, and the other end is connected to the power supply input end of the microcontroller;

One end of the second filter module is connected to the second power supply output end of the power supply module, and the other end is connected to the power supply input end of the Ethernet control module.

Preferably, the gateway circuit includes:

The first clock module is used to provide a clock signal with a frequency of 25MHz to the single-chip microcomputer;

The second clock module is used to provide a clock signal with a frequency of 50MHz to the Ethernet control module;

The third clock module is used to provide a clock signal with a frequency of 32MHz to the LORA transmitting module;

The fourth clock module is used to provide the LORA receiving module with a clock signal with a frequency of 32MHz.

Preferably, the gateway circuit further includes an indicator light module;

The third power supply output end of the power supply module is connected with the power supply input end of the indicator light module;

The third signal output end of the single-chip microcomputer is connected with the signal input end of the indicator light module.

Preferably, the LORA transmitting module transmits the radio frequency signal at a frequency of 471MHz, and the LORA receiving module receives the radio frequency signal at a frequency of 434MHz.

The beneficial effects of the present invention are: on the premise of satisfying performance, the control module of the gateway circuit is replaced from a high-standard chip to a single-chip microcomputer, which greatly reduces the production cost of the gateway. Specifically, through the scheme of single chip (running FreeRTOS system), port physical layer and dual LORA (separation of receiver and transmitter), the chips of this gateway circuit scheme are packaged in LQFP and QFN, which greatly reduces the difficulty of software and hardware development. In terms of software, it also realizes simple functions such as dial-up and server address modification, which simplifies the function of the router, and also realizes the function of LORA WAN, making it a full-time dedicated product, which greatly reduces the power consumption of the product and improves the product stability.

Description of drawings

1 is a schematic diagram of a first partial structure of a first embodiment of a gateway circuit of the present invention;

FIG. 2 is a second partial structural schematic diagram of the first embodiment of a gateway circuit of the present invention;

3 is a schematic structural diagram of a power module of the gateway circuit in FIG. 1;

FIG. 4 is a schematic structural diagram of the single-chip microcomputer of the gateway circuit in FIG. 1;

Fig. 5 is the structural representation of the Ethernet module of the gateway circuit in Fig. 1;

FIG. 6 is a schematic structural diagram of the LORA transmitting module in FIG. 2;

Fig. 7 is the structural representation of the LORA receiving module in Fig. 2;

FIG. 8 is the indicator light module in FIG. 1 .

Label description:

1. Power supply module; 11. Transformer module; 12. The first linear regulator; 13. The second linear regulator;

2. Single chip microcomputer; 21. The first filter module; 22. The first clock module;

3. Ethernet module; 31. Ethernet control module; 32. Network transformer; 33. Interface module; 34. Second filter module;

4. LORA transmitter module; 41. The third clock module;

5. LORA receiving module; 51. Fourth clock module;

6. Indicator light module.

The realization, functional characteristics and advantages of the present invention will be further described with reference to the accompanying drawings in conjunction with the embodiments.

Detailed ways

It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

1 to 8, the present invention provides a gateway circuit, including:

The power supply module 1 is used to supply power to each functional module of the gateway circuit;

The single chip microcomputer 2 is used to control the functional modules of the gateway circuit and network data processing;

Ethernet module 3, used to realize data interaction with the server;

LORA transmitting module 4, used for transmitting radio frequency signal;

The LORA receiving module 5 is used for receiving radio frequency signals.

In the embodiment of the present invention, FIG. 1 and FIG. 2 constitute a complete gateway circuit diagram. The gateway circuit includes a power supply module 1 , a single-chip microcomputer 2 , an Ethernet module 3 , a LORA transmitting module 4 and a LORA receiving module 5 . The power supply module 1 is used to step down the externally input 12V DC voltage to 5V, and then supply power to the LORA transmitter module 4 and other functional modules through a linear voltage regulator. The MCU 2 mainly realizes the underlying driver and network data processing. The microcontroller 2 performs initialization configuration and data processing with the LORA receiving module 5 through the SPI1 (Serial PeripheralInterface, serial peripheral interface) communication interface; performs initialization configuration and data processing with the LORA transmitting module 5 through the SPI3 communication interface; Drives Ethernet through the RMII interface The physical layer chip, so as to realize the function of the gateway connecting the network. The control chip model of Ethernet module 3 includes DP83848x, which realizes data interaction with the server. In the LORA transmitting module 4, after the gateway receives the server data, it transmits the radio frequency signal at the preset frequency through the matching circuit and the antenna. The LORA receiving module 5, when the antenna receives the radio frequency signal, filters out the corresponding radio frequency signal through the receiving circuit and sends it to the radio frequency chip for processing, and the single chip microcomputer 2 takes out the radio frequency data through SPI1 for processing. Through the cooperation of the above functional modules and the LORA radio frequency technology, the remote management of the door lock device can be realized. Users can realize practical functions such as remote door opening, remote password issuance/cancellation, real-time upload of door opening logs, and setting door lock status (long close/long open/normal). To sum up, on the premise of satisfying the performance, the control module of the gateway circuit is replaced from a high-standard chip to a single-chip microcomputer, which greatly reduces the production cost of the gateway. Specifically, through the scheme of single chip (running FreeRTOS system), port physical layer and dual LORA (separation of receiver and transmitter), the chips of this gateway circuit scheme are packaged in LQFP and QFN, which greatly reduces the difficulty of software and hardware development. In terms of software, it also realizes simple functions such as dial-up and server address modification, which simplifies the function of the router, and also realizes the function of LORA WAN, making it a full-time dedicated product, which greatly reduces the power consumption of the product and improves the product stability.

Referring to Figure 4, the model of the microcontroller includes STM32F107RCT6.

In the embodiment of the present invention, the STM32F107RCT6 system has its own MAC layer, which reduces the difficulty of software development. As long as a simple port physical layer and interface circuit are plugged in, the TCP/IP network connection can be realized, and the chip also supports multi-channel SPI interface implementation. The separation of LORA receiving and sending does not conflict, and the chip IO port resources and internal ROM and RAM resources also meet the performance requirements. To sum up, this single-chip microcomputer is cost-effective, reduces the difficulty of software and hardware development, and can meet the performance requirements of the gateway.

5, the Ethernet module 3 includes an Ethernet control module 31, a network transformer 32 and an interface module 33;

The signal output end of the LORA receiving module 5 is connected to the first signal input end of the single-chip microcomputer 1;

The first signal output end of the single-chip microcomputer 2 is connected to the first signal input end of the Ethernet control module 31;

The first signal output end of the Ethernet control module 31 is connected to the first signal input end of the network transformer 32;

The first signal output end of the network transformer 32 is connected to the signal input end of the interface module 33 .

In the embodiment of the present invention, the Ethernet control module 31 is used to control the work of the Ethernet module 3, the network transformer 32 is used to protect the Ethernet control module 31, and the interface module 33 is used for data exchange between the gateway and the server. The process of the gateway circuit receiving external radio frequency signals is as follows: the external radio frequency signals enter the LORA receiving module 5 through the antenna ANT_LF_RX, the model of the LORA receiving module 5 includes SX1278IMLTRT, and the external radio frequency signals enter the LORA receiving module 5 through the RFI_LF pin. The LORA receiving module 5 uses the SCK, MISO, MOSI and NSS pins as signal output terminals to connect to the first signal input terminal (PA4, PB3 to PB5 pins) of the single-chip microcomputer 1 . The PB12 and PB13 pins of the microcontroller 2 are used as the first signal output end of the microcontroller 2 to connect to the first signal input end (TXD_0 and TXD_1 pins) of the Ethernet control module 31, wherein the model of the Ethernet control module 31 includes DP83848x; The network control module 31 uses the TD+ and TD- pins as the first signal output terminals to connect to the first signal input terminals (TD+ and TD- pins) of the network transformer 32, wherein the model of the network transformer includes H1102NL; the network transformer 32 uses the TX+ The and TX- pins are used as the first signal output terminals to connect to the signal input terminals (TX+ and TX-) of the interface module 33, wherein the model of the interface module 33 includes RJ45. To sum up, the external radio frequency signal is sent to the server through the LORA receiving module 5 , the microcontroller 2 and the Ethernet module 3 .

5, the signal output end of the interface module 33 is connected to the second signal input end of the network transformer 32;

The second signal output end of the network transformer 32 is connected to the second signal input end of the Ethernet control module 31;

The second signal output end of the Ethernet control module 31 is connected to the second signal input end of the single-chip microcomputer 2;

The second signal output end of the single-chip microcomputer 2 is connected to the signal end input of the LORA transmitting module 5 .

In the embodiment of the present invention, the process of sending radio frequency signals by the gateway circuit is as follows: the RX+ and RX- pins of the interface module 33 are used as signal output terminals to connect to the second signal input terminals (RX+ and RX- pins) of the network transformer 32; The transformer 32 uses (RD+ and RD- pins) as the second signal output terminals to connect to the second signal input terminals (RD+ and RD- pins) of the Ethernet control module 31; As the second signal output terminal, the pin is connected to the second signal input terminal (PC4 and PC5 pins) of the single-chip microcomputer 2. The single-chip microcomputer 2 uses the pins PA15, PC10, PC11 and PC12 as the second signal output terminal to connect to the signal input terminal (NSS pin) of the LORA transmitter module 5, and then transmits the radio frequency signal through the antenna. To sum up, the radio frequency signal is transmitted by the Ethernet module 3, the microcontroller 2 and the LORA transmitting module 4.

Referring to FIG. 3 , the power module 1 includes a transformer module 11 , a first linear regulator 12 and a second linear regulator 13 ;

The transformer module 11 is respectively connected with the first linear regulator tube 12 and the second linear regulator tube 13, wherein the transformer module 11 is used for reducing the input voltage from 12V to 5V;

The first linear regulator 12 reduces the 5V voltage to 3.3V to supply power to the LORA transmitting module 4;

The second linear voltage regulator 13 reduces the 5V voltage to 3.3V to supply power to the functional modules in the circuit except the LORA transmitting module 4 .

In the embodiment of the present invention, after the external input voltage is stepped down by the transformer module 11, it is divided into two channels to supply power to the functional modules on the gateway circuit. The functional modules except the LORA transmitting module 4 are powered. The advantages of this design are: first, to ensure that the transmission power of the LORA transmitter module 4 is optimal, and to ensure that the voltage and current remain stable when the radio frequency transmits signals; A ferrite bead filter is connected in series to filter out the high-frequency noise generated by each functional module inside and outside the main power supply, so that the power supply of each functional module will not interfere with each other, and achieve the best power supply state. The overall stability of the gateway circuit is improved.

The power supply process of the present invention is as follows: the external input voltage enters the power supply module 1 through the No. 1 pin of DC, is input to the WIN pin of the transformer module 11 (that is, U2), and is output by the SW pin of U2. The voltage is reduced from 12V to 5V; the 5V voltage is input to the Vin pin of the first linear regulator 12 (ie U7), and is output from the Vout pin of U7 to the power supply input of the LORA transmitter module 4 (ie the 3 of the chip U5). No. 1 pin, No. 14 pin and No. 24 pin), so as to complete the power supply of the power module 1 to the LORA transmitter module 4.

In yet another embodiment of the present invention, the partial input voltage enters the power supply module 1 through the No. 1 pin of DC, is input to the WIN pin of the transformer module 11 (ie U2), and is output by the SW pin of U2 to convert the voltage From 12V to 5V; the 5V voltage is input through the Vin pin of the second linear regulator 13 (ie U9), and after the voltage is stepped down to 3.3V, the Vout pin output is filtered and output to the power supply input of the microcontroller 3 respectively. (VBAT, VDDA, VDD_4, VDD_1 and VDD_3 pins), output to the power supply input terminals (pins 1, 18 and 26) of the Ethernet control module 31, and the peripheral circuits of the Ethernet control module 31; output to Power supply input terminals of LORA receiving module 5 (pins 3, 14 and 25).

3 , the model of the transformer module 11 includes SY8120B1ABC, and the model of the first linear voltage regulator 12 and the second linear voltage regulator 13 includes ME6210A33PG.

In the embodiment of the present invention, the model of the transformer module 11 includes SY8120B1ABC, which has the advantages of wide voltage input (4.5 to 18V), efficiency as high as 96%, 2A high current output, simple peripheral circuit and small package. The models of the first linear regulator 12 and the second linear regulator 13 include ME6210A33PG, which have the advantages of ultra-low quiescent current, wide input voltage, low dropout (11mV@Iout=10mA), 2% high output accuracy and The 500mA high current output ensures that the circuit of each module will not cause voltage drop when working, so that the LORA transmitter module 4 has insufficient transmission power and abnormal operation due to insufficient voltage and current.

4 and 5, the gateway circuit further includes a first filtering module 21 and a second filtering module 34;

One end of the first filter module 21 is connected to the first power supply output end of the power supply module 1, and the other end is connected to the power supply input end of the single-chip microcomputer 2;

One end of the second filter module 34 is connected to the second power supply output end of the power supply module 1 , and the other end is connected to the power supply input end of the Ethernet control module 31 .

In the embodiment of the present invention, the first filtering module 21 and the second filtering module 34 filter out high-frequency noises generated inside and outside the single chip microcomputer 2 and the Ethernet control module 31 respectively, so as to improve the stability of the gateway circuit.

1 to 7, the gateway circuit includes:

The first clock module 21 is used to provide the single-chip microcomputer 2 with a clock signal with a frequency of 25 MHz;

The second clock module is used to provide a clock signal with a frequency of 50MHz to the Ethernet control module 31;

The third clock module 41 is used to provide the LORA transmitting module 4 with a clock signal with a frequency of 32MHz;

The fourth clock module 51 is used to provide the LORA receiving module 5 with a clock signal with a frequency of 32 MHz.

In the embodiment of the present invention, each clock module provides a clock signal to each functional module, so as to ensure the normal operation of the gateway circuit.

3, 4 and 8, the gateway circuit further includes an indicator light module 6;

The third power supply output end of the power supply module 1 is connected to the power supply input end of the indicator light module 6;

The third signal output end of the single chip 2 is connected to the signal input end of the indicator light module 6 .

In the embodiment of the present invention, the third power supply output terminal of the power supply module 1 is connected to the No. 5 pin of the indicator light module 6, and the third signal output terminal (No. 37 to No. 40 pins) of the microcontroller 2 is transmitted to (No. 1 to No. 1 to pin 8). The indicator light module 6 is controlled by the single-chip microcomputer 2, and the single-chip microcomputer 2 outputs PWM waveform control. Specifically, the indicator light module 6 is always on when the Ethernet module is connected to the network, and the indicator light module 6 breathes when it is not connected to the network.

Further, the LORA transmitting module 4 transmits the radio frequency signal at a frequency of 471MHz, and the LORA receiving module 5 receives the radio frequency signal at a frequency of 434MHz.

In the embodiment of the present invention, the gateway adopts a dual-frequency single-channel transceiver mechanism, using a frequency band of 434 MHz when sending data, and using a frequency band of 471 MHz when receiving data. In this way, the collision of data transmission can be effectively avoided, thereby improving the success rate of data transmission and ensuring the reliability and stability of the communication link.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied to other related All technical fields are similarly included in the scope of patent protection of the present invention.

Claims (10)

1. A gateway circuit, comprising:

the power supply module is used for supplying power to each functional module of the gateway circuit;

the single chip microcomputer is used for controlling each functional module of the gateway circuit and processing network data;

the Ethernet module is used for realizing data interaction with the server;

the LORA transmitting module is used for transmitting radio frequency signals;

and the LORA receiving module is used for receiving the radio frequency signal.

2. The gateway circuit of claim 1, comprising: the model of the single chip microcomputer comprises STM32F107RCT 6.

3. The gateway circuit of claim 2, wherein the ethernet module comprises an ethernet control module, a network transformer, and an interface module;

the signal output end of the LORA receiving module is connected with the first signal input end of the single chip microcomputer;

a first signal output end of the singlechip is connected with a first signal input end of the Ethernet control module;

a first signal output end of the Ethernet control module is connected with a first signal input end of the network transformer;

and the first signal output end of the network transformer is connected with the signal input end of the interface module.

4. The gateway circuit of claim 3, wherein the signal output of the interface module is connected to the second signal input of the network transformer;

a second signal output end of the network transformer is connected with a second signal input end of the Ethernet control module;

a second signal output end of the Ethernet control module is connected with a second signal input end of the singlechip;

and a second signal output end of the singlechip is connected with a signal end input of the LORA transmitting module.

5. The gateway circuit according to any one of claims 1 to 4, wherein the power supply module comprises a voltage transformation module, a first linear voltage regulator tube and a second linear voltage regulator tube;

the voltage transformation module is respectively connected with the first linear voltage regulator tube and the second linear voltage regulator tube, wherein the voltage transformation module is used for reducing the input voltage from 12V to 5V;

the first linear voltage-regulator tube reduces the voltage of 5V to 3.3V so as to supply power to the LORA transmitting module;

and the second linear voltage-regulator tube reduces the voltage of 5V to 3.3V so as to supply power to functional modules in the circuit except the LORA transmitting module.

6. The gateway circuit of claim 5, wherein the model number of the voltage transformation module comprises SY8120B1ABC, and the model numbers of the first and second linear regulators comprise ME6210A33 PG.

7. The gateway circuit of claim 1, further comprising a first filtering module and a second filtering module;

one end of the first filtering module is connected with a first power supply output end of the power supply module, and the other end of the first filtering module is connected with a power supply input end of the single chip microcomputer;

one end of the second filtering module is connected with a second power supply output end of the power supply module, and the other end of the second filtering module is connected with a power supply input end of the Ethernet control module.

8. The gateway circuit of claim 1, comprising:

the first clock module is used for providing a clock signal with the frequency of 25MHz for the singlechip;

the second clock module is used for providing a clock signal with the frequency of 50MHz for the Ethernet control module;

the third clock module is used for providing a clock signal with the frequency of 32MHz for the LORA transmitting module;

and the fourth clock module is used for providing a clock signal with the frequency of 32MHz for the LORA receiving module.

9. The gateway circuit of claim 1, further comprising an indicator light module;

the third power supply output end of the power supply module is connected with the power supply input end of the indicator lamp module;

and a third signal output end of the singlechip is connected with a signal input end of the indicator light module.

10. The gateway circuit of claim 1, wherein the LORA transmit module transmits radio frequency signals at 471MHz and the LORA receive module receives radio frequency signals at 434 MHz.

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