CN111665748B

CN111665748B - Electronic execution unit working state self-holding protection circuit and system

Info

Publication number: CN111665748B
Application number: CN202010379070.8A
Authority: CN
Inventors: 郑致远; 袁成保; 郑春阳
Original assignee: Zhixin Control System Co ltd
Current assignee: Zhixin Control System Co ltd
Priority date: 2020-05-07
Filing date: 2020-05-07
Publication date: 2022-04-01
Anticipated expiration: 2040-05-07
Also published as: CN111665748A

Abstract

The invention discloses a self-holding protection circuit and a system for the working state of an electronic execution unit, which comprises a working state signal end of the electronic execution unit, at least two logic signal input ends of the self-holding protection circuit, a logic operation circuit and a trigger circuit, wherein the logic operation circuit and the trigger circuit are respectively used for carrying out logic operation output on at least two logic input signals. The invention utilizes the logic operation circuit and the trigger circuit, so that the working state of the working state signal end of the electronic execution unit is not influenced when the microcontroller is temporarily abnormal for a plurality of times. Even if the output signal of the microcontroller is abnormal, the working state of the execution unit is not influenced. When the microcontroller returns to normal, the working state of the current execution unit can be identified, and a correct control instruction is continuously given.

Description

Electronic execution unit working state self-holding protection circuit and system

Technical Field

The invention belongs to the protection technology of industrial control electronic execution units, and particularly relates to a self-holding control technology of the state of an electronic execution unit.

Background

In the field of industrial control, the operating state of electronic execution units is of great importance. Erroneous execution of an action may have serious consequences. In the automobile industry, the working state of the electronic execution unit is related to the safety of people and vehicles, and if the working state is careless, the tragic accident of vehicle destruction and death can be caused. For example, for a new energy automobile electronic system, if a relay execution unit of a high-voltage main loop is disconnected due to an abnormality of a micro control system when a vehicle runs at a high speed, a whole vehicle loses a high-voltage electric energy source, and the vehicle is out of control.

The CN110739961A level shifter is based on time domain control, when the input signal meeting specific logic relation can control the level shifter circuit to shift high and low levels through the logic operation circuit, the shifted level shifter signal passes through the power-down self-holding circuit, if the power-down self-holding circuit sends a power-down signal, the level shifter signal can still output by self-holding, and the influence on the output of the signal caused by the power-down of the circuit is avoided. Although simple in structure, the stability is poor, and the device fails once the time domain signal is out of order. And the method is not suitable for a complex control system of the new energy vehicle.

CN105553079A a power fail safeguard device and new energy automobile of new energy automobile controller, it also only realizes the power fail safeguard of vehicle, can't solve the protection when microcontroller output signal is unusual.

In a conventional vehicle-mounted control circuit, when a part of types of microcontrollers are initialized, unstable state signals (as shown in the upper diagram of fig. 1) may be emitted. When such a signal is directly applied, the actuator is continuously switched in a short time.

Disclosure of Invention

The invention aims to provide a self-holding protection circuit and a self-holding protection system for the working state of an electronic execution unit, which can prevent the working state of the execution unit from being influenced when the output signal of a microcontroller is abnormal.

One of the technical schemes of the invention is as follows: the self-holding protection circuit of the working state of the electronic execution unit comprises a working state signal end of the electronic execution unit, at least two logic signal input ends of the self-holding protection circuit, a first logic circuit and a second logic circuit, wherein the first logic circuit and the second logic circuit are respectively used for carrying out logic operation output on at least two logic input signals; the third logic circuit is used for carrying out logic operation on the output signal of the first logic circuit and the working state signal end signal of the electronic execution unit to output a first trigger; the fourth logic circuit is used for carrying out logic operation on the output signal of the second logic circuit and the working state signal end signal of the electronic execution unit to output a second trigger; the output end of the first trigger is connected with the working state signal end of the electronic execution unit, and a switching circuit for converting the working state of the electronic execution unit from high level to low level is connected between the output end of the second trigger and the working state signal end of the electronic execution unit.

The conversion circuit is a grounding switch circuit. When the normal working state of the ground switch circuit changes, the high-level state grounding of the working state of the electronic execution unit is converted into the low-level state.

When the circuit is in a normal working state, level signal combinations in a normal state are input by at least two logic signal input ends, after the logic circuit is operated and normal operation is realized, if the input signals are the level signal combinations in an abnormal state in the process, the actuator still executes according to the existing state signals due to no trigger signals, and the execution of wrong state signals is avoided; when the normal working state is switched, the trigger gives a trigger signal to change the normal working state signal.

In the circuit of the invention, for the same electronic execution unit, trigger + logic control is adopted. When the logic signal is sent out, the timing signal is sent out after a period of time, and the actuator can respond. The error proofing capability is enhanced.

The further preferred technical scheme is as follows: the first trigger and the second trigger are both D triggers.

The rising edge controlled by the D trigger time sequence is used for completing triggering, and the work is stable.

The further preferred technical scheme is as follows: the logic signal input ends of the self-holding protection circuit are three logic input signals.

The error execution probability of the output circuit is reduced by adopting the combined input of three logic signals. Only the combination of two logic signals is used, so that the fault tolerance rate of the system is low; by using more than three logic signal combinations, the fault tolerance of the system is higher, but the microcontroller resource is wasted.

The further preferred technical scheme is as follows: the first logic circuit comprises a first group of two NOT circuits and a signal buffer which are respectively connected with the logic input signals; the outputs of the two NOT gate circuits and the signal buffer are connected with a first three-input AND gate circuit.

The further preferred technical scheme is as follows: the second logic circuit comprises a second group of two NOT circuits and a signal buffer which are respectively connected with the logic signals; the outputs of the two NOT gate circuits and the signal buffer are connected with a second three-input AND gate circuit.

The logic circuit which obtains two opposite signals after the input logic combination signal is operated has various structural forms, and the two same first logic circuits and second logic circuits are adopted, so that the cost of the circuit can be reduced, and devices can be selected and connected easily.

The further preferred technical scheme is as follows: the first logic input signal connected to the signal buffer in the first logic circuit is inverted with respect to the second logic input signal connected to the signal buffer in the second logic circuit.

The further preferred technical scheme is as follows: the third logic circuit is a first or gate circuit.

The further preferred technical scheme is as follows: the fourth logic circuit comprises a second OR gate circuit connected with the output end of the second logic circuit, the other input end of the second OR gate circuit is connected with the output end of the NOR gate circuit, and the input ends of the NOR gate circuit are respectively connected with the output end of the first three-input AND gate circuit and the working state signal end of the electronic execution unit.

The further preferred technical scheme is as follows: the grounding switch circuit comprises a grounding capacitor connected with the output end of the second trigger and a grounding triode connected with the output end of the second trigger.

The second technical scheme of the invention is as follows: the self-holding protection system for the working state of the electronic execution unit is characterized by comprising a microprocessor and a self-holding protection circuit for the working state of the electronic execution unit, wherein at least two logic signal input ends of the self-holding protection circuit are connected with the microprocessor, and the trigger signal input ends of a first trigger and a second trigger are connected with the microprocessor.

The further preferred technical scheme is as follows: the working state signal end of the electronic execution unit passes through the feedback circuit and the microprocessor.

The system of the invention has a plurality of temporary abnormalities in the microcontroller, and the working state of the system and even the whole vehicle can not be influenced. Even if the output signal of the microcontroller is abnormal, the working state of the execution unit is not influenced. When the microcontroller returns to normal, the working state of the current execution unit can be identified, and a correct control instruction is continuously given.

Drawings

FIG. 1 illustrates a schematic diagram of a microcontroller that may issue unstable status signals and stable outputs corresponding to the present invention during initialization;

FIG. 2 is a schematic diagram of the circuit configuration of the present invention;

FIG. 3 is a schematic diagram of the system of the present invention.

Detailed Description

The following detailed description is provided for the purpose of explaining the claimed embodiments of the present invention so that those skilled in the art can understand the claims. The scope of the invention is not limited to the following specific implementation configurations. It is intended that the scope of the invention be determined by those skilled in the art from the following detailed description, which includes claims that are directed to this invention.

As shown in fig. 2, in the present embodiment, the logic signal input terminal is three logic signals a, B, and C; the first logic circuit comprises a first group of two NOT gate circuits U1, U3 and a signal buffer U2 which are respectively connected with logic input signals; the outputs of the two NOT gate circuits and the signal buffer are connected with a first three-input AND gate circuit U7; the output signal of the and circuit U7 is K.

The second logic circuit comprises a second group of two NOT circuits U4, U5 and a signal buffer U6 which are respectively connected with logic signals; the outputs of the two not gate circuits and the signal buffer are connected with a second three-input and gate circuit U8. The output signal of the and circuit U8 is L.

Of the three logic signals A, B and C, the logic signal A is respectively connected with the NOT circuit U1 and the NOT circuit U4.

The logic signal B is connected to the signal buffer U2 and the NOT gate circuit U5.

The logic signal C is connected with the NOT gate circuit U3 and the signal buffer U6 respectively.

The third logic circuit is a first or gate circuit U9, and two input terminals of the first or gate circuit U9 are respectively connected to the output terminal of the and gate circuit U7 and the operating state signal terminal R of the electronic execution unit.

The output of the first OR gate U9 is connected with a first flip-flop U12, and the output signal of the first OR gate U9 is M; the first flip-flop U12 is a D flip-flop, and the output signal of the Q output end of the first flip-flop U12 is P; the Q output end is connected with the working state signal end R of the electronic execution unit through a resistor R2.

The fourth logic circuit comprises a second three-input AND circuit U8, the output end of which is connected with a second OR gate circuit U10, the other input end of the second OR gate circuit U10 is connected with the output end of a NOR gate circuit U11, and the input ends of the NOR gate circuit U11 are respectively connected with the output end of the first three-input AND circuit U7 and the working state signal end R of the electronic execution unit.

The output signal of the second OR gate circuit U10 is N; the output connection of the first trigger is connected with a second trigger U13; the second flip-flop U13 is a D flip-flop. The Q terminal of the second flip-flop U13 outputs a signal S.

The trigger signal inputs of the first flip-flop U12 and the second flip-flop U13 are connected to the timing signal D.

A switching circuit for converting the working state of the electronic execution unit from high level to low level is connected between the second flip-flop U13 and the working state signal terminal R of the electronic execution unit, in the embodiment, the output terminal of the second flip-flop U13 is connected with the resistor R1; the output of the resistor R1 is connected with the triode grounding switch circuit. The base electrode of the triode Q is connected with the resistor R1, the emitting electrode is grounded, and the collecting electrode is connected with the working state signal end R of the electronic execution unit. The base of the triode Q is connected with a grounding resistor R3 and a grounding capacitor C. The resistors R1 and R2 have the current buffering function; the resistor R3 plays a role of pull-down; and C is a capacitor which plays a role in voltage buffering and energy storage.

As shown in fig. 3, the three logic signal input terminals a, B, C of the self-holding circuit 100 are connected to the microprocessor 200; the timing trigger signal input terminal D is connected to the timing output terminal of the microprocessor 200. The electronic execution unit operation state signal terminal R of the self-holding circuit 100 is connected to the execution unit 300, i.e. the execution control output terminal. The electronic execution unit working state signal terminal R is connected to the microprocessor 200 through the feedback circuit 400.

The power supplies of the self-holding circuit 100 include a self-holding power supply 500 and a normal power supply 600. The power supply with high voltage is selected for use, and the two power supplies cannot interfere with each other.

The active state of a logic signal is either a logic level 1 or a logic level 0. The active state of the timing signal is a "rising edge". That is, only after the "logic signal" is stabilized, the rising edge of the "timing signal" is sent out, and the signal state of the electronic execution unit working state signal end R (execution control line) of the self-holding circuit 100 will change.

The working principle of the circuit is as follows:

when the system is normally started:

1. the self-sustaining power supply 500 and the normal power supply 600 normally output power.

2. The microprocessor 200 (microcontroller chip) enters an initialization state where the microprocessor 200 output state may not be program controlled. However, the logic + timing signal set by the self-holding circuit 100 cannot be asserted, so that the self-holding circuit 100 does not erroneously assert the enable signal to the execution unit 300.

3. The microprocessor 200 outputs correct multi-bit logic level signals (e.g., 0, 1, 0) through the logic signal input terminals a, B, C, after being logically processed by the U1, U3 inverter and U2 buffer, the E, F, G logic level signals are 1,1,1, after being logically processed by the U7 three-input and gate, the K logic level signal is 1, the R is 0 in the initial state, and the M logic level signal is 1 after being logically processed by the U9 or gate. P has a logic level of 0.

Meanwhile, after the signals of the logic signal input ends A, B and C are logically processed by a U4, a U5 inverter and a U6 buffer, the logic level signals of H, I and J are 1,0 and 0 are logically processed by a U8 three-input AND gate, the logic level signal of L is 0, the logic level of R in an initial state is 0, the logic level of T is 0 after the processing of a U11 NOR gate, and the logic level of N is 0 after the processing of a U10 OR gate logic signal. Since the pulse signal of D is not received by U12 and U13 'D flip-flop', S is at the logic level of 0 in the initial state, and the Q triode is in the off state. The self-holding circuit does not respond at this time.

4. When the microprocessor 200 outputs a timing trigger rising edge level through the timing trigger signal D, the self-holding circuit 100 compares and judges a multi-bit logic level signal output by the microprocessor 200 with a preset logic level signal, when the multi-bit logic level signal and the preset logic level signal are all consistent, the U12 and the U13 "D flip-flop" respond, at this time, the logic level of P is 1, the logic level of S is 0, the Q triode is in an off state, and the logic level of R is 1. R outputs a control level to the execution unit 300, thereby operating the execution unit.

5. The self-holding circuit 100 outputs the working state signal terminal R of the electronic execution unit, the state signal is transmitted to the microprocessor 200 through the feedback circuit 400, and the microprocessor 200 determines whether the system is outputting according to the normal requirement through the feedback state signal.

When the system continuously works: the specific timing + logic signal is unchanged and the execution unit continues to operate.

When the system is normally closed:

1. the microprocessor 200 outputs the correct multi-bit logic level signals (e.g., 0, 1) via logic signal inputs a, B, C. At this time, after the logic processing of the U1, the U3 inverter and the U2 buffer, the logic level signals of E, F and G are 1,0 and 0, after the logic processing of the U7 three-input AND gate, the logic level signal of K is 0, R is in an open state and is 1, after the logic processing of the U9 OR gate, the logic level signal of M is 1, and at this time, the logic level of P is 1.

Meanwhile, after the logic signal input ends A, B and C signals are logically processed by a U4, a U5 inverter and a U6 buffer, the logic level signals of H, I and J are 1,1 and 1 are logically processed by a U8 three-input AND gate, the logic level signal of L is 1, the logic level of R in an open state is 1, the logic level of K is 1, the logic level of T is 0 after the logic processing of a U11 NOR gate, and the logic level of N is 1 after the logic signal processing of a U10 OR gate. Since the pulse signal of D is not received by the U12 and the U13 'D trigger', the S is in the initial state, the logic level is 0, the Q triode is in the off state, and the self-holding circuit does not respond.

2. When the microprocessor 200 outputs the rising edge timing trigger level through the timing trigger signal D, the output state of the U12 "D flip-flop" in the self-holding circuit 100 is switched, the output state of the U13 "D flip-flop" is switched, the logic signal level of S is 1, the transistor Q is turned on, and the logic level of R is 0. R outputs a control level to the execution unit 300, thereby stopping the operation of the execution unit. According to the logic level signal output by the microprocessor 200, the comparison and judgment with the preset logic level signal are carried out, and when the logic level signal is consistent with the preset logic level signal, the control level is cut off to the 'execution unit circuit', so that the execution unit stops working.

3. The signal R in fig. 2 output from the holding circuit 100 is input to the "reverse disturbance resisting state feedback circuit" through the "signal feedback line". The microcontroller judges whether the system outputs according to normal requirements by identifying signals output by the reverse disturbance resisting state feedback circuit.

4. The self-holding circuit 100 outputs the working state signal terminal R of the electronic execution unit, the state signal is transmitted to the microprocessor 200 through the feedback circuit 400, and the microprocessor 200 judges whether the system is disconnected for output according to the normal requirement through the feedback state signal.

When the microcontroller works abnormally:

1. the microprocessor 200 is operating abnormally and the watchdog circuit resets the microcontroller. At this time, all levels of the microprocessor 200 are initialized, and at this time, the output states of the logic signal input terminals a, B, and C are uncertain, and the port state fed back by the identification signal at the port of the feedback circuit 400 of the microprocessor 200 is uncertain (i.e., the feedback signal at the signal terminal R of the electronic execution unit working state cannot be identified).

2. As for the one-way feedback circuit, the signal of the working state signal end R of the electronic execution unit is not affected, meanwhile, the signal of the working state signal end R of the electronic execution unit is not changed due to the absence of the correct signal of the D trigger, the working state of the execution unit 300 is not affected, and the original output state is maintained.

3. When the microprocessor 200 resumes normal operation, the microprocessor 200 reads the operating state of the operating state signal terminal R of the electronic execution unit through the feedback circuit 400, and determines whether the current state of the execution unit 300 is on or off, so that the microprocessor 200 continues the operating state of the execution unit 300 by outputting the relevant logic of "system normally on" or "system normally off" through the logic signal input terminals a, B, C.

The invention can realize that stable signals are obtained after the logic operation of the signals in the unstable state (such as the lower diagram of figure 1). The instability of the output circuit is reduced.

Claims

1. A self-holding protection circuit for working state of electronic execution unit is prepared as using signal end of working state of electronic execution unit and at least two logic signal input ends of self-holding protection circuit as well as using first logic circuit and second logic circuit to carry out logic operation output on at least two logic input signals separately and outputting output logic signal of first logic circuit and second logic circuit in reverse direction; the third logic circuit is used for carrying out logic operation on the output signal of the first logic circuit and the working state signal end timing signal of the electronic execution unit to output a first trigger; the fourth logic circuit is used for carrying out logic operation on the output signal of the second logic circuit and the working state signal end timing signal of the electronic execution unit to output a second trigger; the output end of the first trigger is connected with the working state signal end of the electronic execution unit, a conversion circuit for converting the working state of the electronic execution unit into a low level state is connected between the output end of the second trigger and the working state signal end of the electronic execution unit, the first logic circuit comprises a first signal buffer, and a first group of inverters are respectively connected with at least two logic signals; the second logic circuit comprises a second signal buffer and a second group of inverters which are respectively connected with at least two logic signals;

the first trigger and the second trigger are both D triggers;

the logic signal input end of the self-holding protection circuit is three logic input signals; the first logic circuit comprises a first group of two NOT circuits which are respectively connected with the logic input signals; the outputs of the two NOT gate circuits and the signal buffer are connected with a first three-input AND gate circuit; the second logic circuit comprises a second group of two NOT circuits which are respectively connected with the logic signals; the outputs of the two NOT gate circuits and the signal buffer are connected with a second three-input AND gate circuit; a first logic input signal connected with the signal buffer in the first logic circuit is inverted with a second logic input signal connected with the signal buffer in the second logic circuit; the third logic circuit is a first or gate circuit; the fourth logic circuit comprises a second OR gate circuit connected with the output end of the second logic circuit, the other input end of the second OR gate circuit is connected with the output end of the NOR gate circuit, and the input ends of the NOR gate circuit are respectively connected with the output end of the first three-input AND gate circuit and the working state signal end of the electronic execution unit; the grounding switch circuit comprises a grounding capacitor connected with the output end of the second trigger and a grounding triode connected with the output end of the second trigger.

2. A self-holding protection system for the working state of an electronic execution unit, which comprises a microprocessor and a self-holding protection circuit for the working state of the electronic execution unit as claimed in claim 1, wherein at least two logic signal input terminals of the self-holding protection circuit are connected with the microprocessor, and the trigger signal input terminals of the first trigger and the second trigger are connected with the microprocessor.

3. The self-sustaining protection system for the working status of electronic execution units of claim 2, wherein the signal terminal of the working status of electronic execution unit is connected to the microprocessor through the feedback circuit.