CN111596135A - Method for analyzing resistance characteristics of electrodeposited gold structure - Google Patents

Abstract

The invention discloses a resistance characteristic analysis method of an electrodeposited gold structure, which relates to the technical field of material detection, and avoids the influence on a measurement result due to different structures of the electrodeposited gold structure and different contact areas during measurement of the electrodeposited gold structure in contact measurement by detecting the impedance of a gold interdigital electrode by using an electrochemical workstation. The method for analyzing the resistance characteristic of the electrodeposited gold structure comprises the following steps: providing a plurality of gold interdigital electrodes, wherein the resistance related parameters of the gold interdigital electrodes are different; detecting the impedance of a plurality of gold interdigital electrodes under different frequency sinusoidal voltages by using an electrochemical workstation; and analyzing the resistance characteristics of the electrodeposited gold structure according to the impedance of the plurality of gold interdigital electrodes under sinusoidal voltages with different frequencies.

Description

A method for analyzing resistance characteristics of electrodeposited gold structures

technical field

The invention relates to the field of material detection, in particular to a resistance characteristic analysis method of an electrodeposited gold structure.

Background technique

Electrodeposited gold structures have excellent electrical properties, strong corrosion resistance, chemical and optical properties, and are widely used in integrated circuits, biosensing, electronic communications, and aerospace. The resistance characteristics of the electrodeposited gold structure will directly affect the transmission efficiency of the signal, so the measurement of the resistance of the electrodeposited gold structure becomes particularly important.

At present, the method for measuring the resistance of electrodeposited gold structures generally uses a probe station for four-point probe measurement. However, this method has extremely high requirements on the roughness of the electrodeposited gold structure, and the contact area between the probe and the electrodeposited gold structure will also lead to unstable measurement results, which in turn affects the accuracy of the measurement results of the electrodeposited gold structure resistance. .

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a method for analyzing the resistance characteristics of the electrodeposited gold structure, using an electrochemical workstation to analyze the resistance characteristics of the electrodeposited gold structure, and to more accurately characterize the resistance characteristics of the electrodeposited gold structure.

The invention provides a resistance characteristic analysis method of electrodeposited gold structure, the method comprises the following steps:

Provide multiple gold interdigitated electrodes, and the resistance-related parameters of multiple gold interdigitated electrodes are different;

Using an electrochemical workstation to detect the impedance of multiple electrodeposited gold structures under intermediate frequency sinusoidal voltage;

The resistance characteristics of the electrodeposited gold structures were analyzed according to the impedance of a plurality of the electrodeposited gold structures under the intermediate frequency sinusoidal voltage.

Optionally, the resistance-related parameters of each gold interdigitated electrode are the height of the gold interdigitated electrode and the surface roughness of the gold interdigitated electrode.

Optionally, the frequency range of the sinusoidal voltage is 100Hz to 500kHz, the amplitude of the sinusoidal voltage is 5mV, and the DC bias voltage is 0V.

Optionally, providing a plurality of gold interdigitated electrodes includes:

Provides multiple golden interdigitated seeds;

A plurality of interdigitated seeds are processed in a one-to-one correspondence under the control of various electrodeposition parameters by an electrochemical deposition method to obtain a plurality of gold interdigitated electrodes.

Optionally, the electrodeposition parameters include electrodeposition time, forward pulsed plating current and reverse etch current.

Optionally, the electrodeposition time included in each electrodeposition parameter is different;

The magnitude and pulse width of the forward pulse plating current included in each electrodeposition parameter are the same;

The magnitude and duration of the reverse etch current included in each electrodeposition parameter were different.

Optionally, providing a plurality of golden interdigitated seeds includes:

provide a substrate;

forming a gold seed layer on the substrate;

The gold seed layer is patterned to obtain gold interdigitated seeds.

Optionally, forming a gold seed layer on the substrate includes:

defining an interdigital region on the substrate;

A gold seed layer is plated on the interdigital region by electroplating.

Optionally, the electroplating solution is an inorganic salt solution of gold.

Optionally, the pH value of the electroplating solution is 6.5-7.5, and the temperature of the electroplating solution is 25°C to 55°C.

Compared with the prior art, the method for analyzing the resistance characteristics of the electrodeposited gold structure provided by the present invention measures the impedance of a plurality of gold interdigitated electrodes with different resistance-related parameters under sinusoidal voltages of different frequencies, avoiding contact. In the measurement, due to the difference in the structure of the electrodeposited gold structure itself, as well as the influence of the different contact areas during the measurement of the electrodeposited structure on the measurement results. On this basis, using the impedance measurement results to characterize the impedance changes of different electrodeposited gold structures at different frequencies, the resistance characteristics of the electrodeposited gold structures can be accurately analyzed. In the subsequent measurement of the resistance of the electrodeposited gold structures, The resistance of the electrodeposited gold structure can be accurately measured by referring to the resistance characteristics of the electrodeposited gold structure.

Description of drawings

The accompanying drawings described herein are used to provide further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the attached image:

1 is a schematic structural diagram of an interdigital electrode provided by the present invention;

Fig. 2 is a kind of schematic diagram of putting the interdigital electrode into deionized water provided by the present invention;

3 is an equivalent circuit diagram of a kind of interdigital electrode provided by the present invention;

Fig. 4 is the step flow chart of the resistance characteristic analysis method of a kind of electrodeposited gold structure provided by the present invention;

Fig. 5 is a kind of structural schematic diagram when the electrochemical workstation is used to detect the resistance characteristics of gold interdigitated electrodes provided by the present invention;

6 is an electron microscope image of gold interdigitated electrodes prepared by different reverse currents provided by the present invention;

7 is a frequency-impedance diagram of gold interdigitated electrodes prepared by a kind of different reverse currents and different electroplating times provided by the present invention;

FIG. 8 is a frequency-impedance diagram of a gold interdigitated electrode with different thicknesses provided by the present invention.

Detailed ways

Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not to scale, some details have been exaggerated for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships are only exemplary, and in practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art should Regions/layers with different shapes, sizes, relative positions can be additionally designed as desired.

In the context of this disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present therebetween. element. In addition, if a layer/element is "on" another layer/element in one orientation, then when the orientation is reversed, the layer/element can be "under" the other layer/element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined. "Several" means one or more than one, unless expressly specifically defined otherwise.

In the description of the present invention, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense, unless otherwise expressly specified and limited, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; may be mechanical connection or electrical connection; may be direct connection or indirect connection through an intermediate medium, may be internal communication between two elements or an interaction relationship between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

Electrodeposited gold structures have excellent electrical properties, strong corrosion resistance, chemical and optical properties, and are widely used in integrated circuits, biosensing, electronic communications, and aerospace. Electrodeposited gold structures can be divided into hard gold structures and soft gold structures.

The hard gold structure usually adds iron, cobalt, nickel and other metals to increase the mechanical properties of the gold structure, and is used in electrical interconnection and PCB boards.

Soft gold structure has high purity and high signal fidelity, and it has become an irreplaceable part of integrated circuit interconnection, packaging, MEMS, X-ray optical components, etc. The resistance characteristics of the soft gold structure will directly affect the transmission efficiency of the signal, so the measurement of the resistance of the electrodeposited gold structure becomes particularly important. However, due to the low resistivity of gold materials, the resistance characteristics of electrodeposited gold structures are highly sensitive, greatly affected by the measurement environment, and difficult to measure. In the field of scientific research, the most commonly used method to measure the resistance of electrodeposited gold structures is to use a probe However, this method has extremely high requirements on the roughness of the electrodeposited gold structure, and the contact area between the probe and the electrodeposited gold structure will also lead to unstable measurement results. These factors will seriously affect the measurement results. The accuracy of this method reduces the reliability of this method in measuring the resistance of small-scale devices.

Based on this, the embodiment of the present invention proposes an interdigital electrode commonly used in the field of biosensing to analyze the resistance characteristics of the electrodeposited gold structure. Figure 1 shows a schematic structural diagram of an interdigital electrode. As shown in Figure 1, the interdigitated electrode is a commonly used interdigitated microelectrode in the field of biosensing, which has the advantages of good specificity, high biological fidelity, high sensitivity and fast detection speed. It has an important role and broad application prospects in the fields of biological detection, environmental monitoring and food safety. Different concentrations of detection solutions are dropped on the working area of the interdigital electrode to detect the change of its frequency-impedance, so as to detect the resistance of the interdigital electrode. Wherein, the detection solution can be deionized water. FIG. 2 shows a schematic diagram of measuring the resistance of interdigital electrodes. As shown in Figure 2, 201 is an interdigital electrode, and 202 is deionized water. After the deionized water 202 is dropped, the equivalent circuit diagram of the interdigital electrode 201 is shown in FIG. 3 . Among them, Rs is the equivalent resistance of the interdigital electrodes, and Cdl and Cdi are the equivalent capacitances of the interdigitated electrodes.

FIG. 4 shows a method for analyzing resistance characteristics of an electrodeposited gold structure provided by an embodiment of the present invention. As shown in FIG. 4 , the method for analyzing resistance characteristics of the electrodeposited gold structure includes the following steps:

Step 101 , providing a plurality of gold interdigitated electrodes, and the resistance-related parameters of the plurality of gold interdigitated electrodes are different.

In the embodiment of the present invention, in order to improve the accuracy of characterizing the resistance characteristics of different electrodeposited gold structures, a plurality of gold interdigitated electrodes with different resistance-related parameters are provided. In the embodiment of the present invention, the gold interdigitated electrode is placed in the detection solution when the resistance characteristic of the gold interdigitated electrode is analyzed. Compared with the prior art, when measuring the electrodeposited gold structure, it is necessary to contact the probe with the electrodeposited gold structure. The method of the embodiment of the present invention can improve the reliability and operability of the resistance detection, and has a good effect on the electrodeposited gold structure. The structure itself has lower structural requirements. Exemplarily, the above-mentioned resistance-related parameters may be the height of the gold interdigitated electrode and the surface roughness of the gold interdigitated electrode.

Step 102 , using an electrochemical workstation to detect impedances of multiple gold interdigitated electrodes under sinusoidal voltages with different frequencies.

In the embodiment of the present invention, FIG. 5 shows a schematic diagram of analyzing the resistance characteristics of gold interdigitated electrodes by using an electrochemical workstation. Referring to FIG. 5 , when analyzing the resistance characteristics of different gold interdigitated electrodes, the cathode and anode of the gold interdigitated electrodes are first electrically connected to the electrochemical workstation, and then the gold interdigitated electrodes are placed in the detection solution. The electrochemical workstation is then used to obtain frequency-impedance maps of multiple gold interdigitated electrodes with different resistance-related parameters under sinusoidal voltages of different frequencies. Exemplarily, the electrochemical workstation can be a Brilliance CHI660E electrochemical workstation.

Step 103 , analyze the resistance characteristics of the electrodeposited gold structures according to the impedance of the plurality of electrodeposited gold structures under sinusoidal voltages of different frequencies.

In the embodiment of the present invention, the resistance characteristics of the electrodeposited gold structure are analyzed by frequency-impedance spectra of a plurality of gold interdigitated electrodes with different resistance-related parameters under sinusoidal voltages of different frequencies. The whole process of the method for analyzing the resistance characteristics of the electrodeposited gold structure in the embodiment of the present invention can avoid the change of the actual results caused by the contact measurement, and more accurately and directly characterize the resistance characteristics of the electrodeposited gold structure itself.

Exemplarily, the above-mentioned providing a plurality of gold interdigitated electrodes may include the following steps:

Step 1011, providing a plurality of golden interdigitated seeds. Providing a plurality of gold interdigitated seeds may include: providing a substrate; forming a gold seed layer on the substrate; and patterning the gold seed layer to obtain gold interdigitated seeds. Specifically, the substrate may be a SiO ₂ substrate. Forming the gold seed layer on the substrate may be: preparing the gold seed layer by electron beam evaporation on a SiO ₂ substrate. The gold seed layer is patterned to obtain gold interdigitated seeds, which can be obtained by photolithography on the gold seed layer to obtain an interdigitated electroplating area pattern, which is the gold interdigitated seed. It can be understood that other methods may also be used to perform patterning processing on the gold seed layer, which is not limited in this embodiment of the present invention. After obtaining the gold interdigitated seeds, the embodiment of the present invention further includes etching the residual photoresist on the surface of the gold interdigitated seeds.

As a specific example, performing photolithography on the gold seed layer to obtain an interdigitated electroplating area pattern may be: spin-coating a 1.5-micron-thick NR1500 photoresist on the gold seed layer and pre-baking at 120°C for 2 minutes, using UV Exposure with a contact lithography machine, harden the film at 150° C., and then develop for 40 s to obtain the to-be-plated pattern of the interdigital electrode. Exemplarily, according to actual requirements, the area of the electro-plated area of the to-be-plated pattern can be 0.25 cm ² . Electroplating area 2cm ² .

Step 1012 , using an electrochemical deposition method to process a plurality of interdigitated seeds in a one-to-one correspondence under the control of a plurality of different electrodeposition parameters to obtain a plurality of gold interdigitated electrodes. Exemplarily, the electrochemical deposition method may be an electroplating method, and the electrodeposition parameters may be electrodeposition time, forward pulse current and reverse etching current.

As a specific example, the process of using the electroplating method to process the interdigitated seeds to obtain gold interdigitated electrodes can be as follows: using an AC and DC source meter to provide a forward pulse plating current and a reverse etching current. The forward pulsed electroplating current is used for ion discharge and metal deposition on the cathode surface; the reverse etching current is used to etch away sharp protrusions formed on the surface during electrodeposition, and move the etched ions to The concentration of gold ions is supplemented in the diffusion layer, thereby changing the microscopic morphology of the gold structure.

In the embodiment of the present invention, the parameters related to the resistance of the gold interdigitated electrode are the height of the gold interdigitated electrode and the surface roughness of the gold interdigitated electrode. Gold interdigitated electrodes with different heights can be obtained by different plating times. Gold interdigitated electrodes with different surface roughness can be obtained by different reverse etching currents. The same forward pulse plating current can be used to prepare gold interdigitated electrodes with different resistance-related parameters. For example, the forward pulse plating current is 20mA, and the pulse width is 2ms.

As a specific example, in order to obtain gold interdigitated electrodes with different heights, the plating time may be 5 min, 8 min, 10 min or 15 min. At this time, a timer can be used to control the electroplating time, so that the electroplating thickness can be controlled, and when the required electroplating thickness is reached, the cathode electroplating parts are taken out.

In order to obtain gold interdigitated electrodes with different surface roughness, it can be achieved by setting different magnitudes of reverse etching currents. The reverse etching current can change the etching efficiency and make the etched gold ions replenish into the diffusion layer for redistribution. Based on this, the filling quality of the gold structure can be improved, thereby changing the surface roughness of the gold interdigitated electrode.

Exemplarily, after the electroplating parts are taken out in the embodiment of the present invention, dry etching and wet cleaning may be used to remove the photoresist on the substrate to complete the electroplating experiment and obtain a plurality of gold interdigitated electrodes.

In order not to affect the subsequent accurate determination of the resistance characteristics of different gold interdigitated electrodes by the electrochemical workstation, and to prevent the short circuit problem of the electrical interdigitated electrodes themselves, after obtaining multiple gold interdigitated electrodes, ion beam etching can be used to remove them. The excess gold seed layer on the surface of the gold interdigitated electrode.

It can be understood that, in order to make the subsequent process better compatible, environmentally friendly, and reduce the difficulty of production and post-processing of the electroplating solution, the electroplating solution can use a neutral gold inorganic salt solution. For example, gold sulfite plating baths. At this time, the pH value of the electroplating solution is 6.5-7.5, which is neutral in acid and alkali. In order to improve the quality of the electroplating layer, before electroplating, the neutral gold sulfite electroplating solution in the electroplating tank can be heated to 40 ℃ with a constant temperature water bath, and stirred at a speed of 200r/min for half an hour to make the ions in the plating solution for a more uniform diffusion. During the electroplating process, the developed gold interdigitated seeds were placed in the electroplating tank as the cathode, and the anode was a 20cm×10cm rectangular platinum-plated titanium mesh with a thickness of 3 μm, and the distance between the anode and the cathode was 8cm.

As a specific example, the embodiment of the present invention uses different reverse etching currents to etch away the sharp nano-grain structure formed by the gold interdigitated electrode during the deposition process, thereby changing the deposited gold interdigitated electrode. micro structure. As the microstructure changes, the resistance of the gold interdigitated electrode also changes.

Exemplarily, referring to FIG. 6 , electron microscope images of different gold interdigitated electrode structures obtained under different reverse etching currents are shown. Among them, Figure 6(a) shows the electron microscope image of the gold interdigitated electrode structure obtained under the reverse etching current of 0mA; Figure 6(b) shows the gold fork obtained under the reverse etching current of 0.4mA Electron microscope image of the finger electrode structure; Figure 6(c) shows the electron microscope image of the gold interdigitated electrode structure obtained under the reverse etching current of 1.4mA; Figure 6(d) shows the reverse etching at 2.0mA. Electron microscope image of the gold interdigitated electrode structure obtained under current. It can be seen that the microstructures of the gold interdigitated electrodes obtained under different reverse etching currents are different.

The impedance of the four gold interdigitated electrodes shown in Fig. 6 under different frequency sinusoidal voltages was detected by an electrochemical workstation. Among them, the frequency range of the sinusoidal voltage provided by the electrochemical workstation is 100 Hz to 500 kHz, the amplitude of the sinusoidal voltage is 5 mV, and the DC bias voltage is 0 V.

Figure 7 shows frequency-impedance plots of gold structures fabricated with different reverse etch currents. Among them, curve 1 is the phase distribution curve of the impedance of the gold interdigitated electrode at different frequencies; curve 2 is the frequency of the gold interdigitated electrode with a height of 300nm prepared by using a reverse etching current of 1.4A at different frequencies- Impedance curves; curve 3 is the frequency-impedance curve of gold interdigitated electrodes with a height of 100nm prepared by using a reverse etching current of 2A at different frequencies; curve 4 is a reverse etching current of 0.4A The frequency-impedance curve of the prepared gold interdigitated electrode with a height of 300nm at different frequencies; curve 5 is the frequency of the gold interdigitated electrode with a height of 300nm prepared by using a reverse etching current of 0A at different frequencies- impedance curve.

Curve 2, curve 4 and curve 5 in FIG. 7 are respectively the frequency-impedance curves of the gold interdigitated electrode obtained by using different reverse etching currents. Among them, the reverse etching current in curve 5 is the smallest, and the reverse etching current in curve 2 is the largest. With the change of different reverse currents and the alternating effects of etching and passivation, the microstructure of the gold interdigitated electrode shows a change trend of quasi-single crystal-single crystal-quasi-single crystal-polycrystal. It can be seen from Figure 7 that under reverse currents of 0 and 1.4 mA, numerous defects embedded in the quasi-single crystal structure affect the transport of electrons, causing their resistance to be greater than that of the gold structure prepared under reverse current of 0.4 mA . Although the height of the polycrystalline gold structure is low, the resistance of the gold structure is high because the grain boundaries in the structure can seriously hinder the transport of electrons.

It can be seen from FIG. 7 that the gold interdigitated electrode represented by curve 3 has the largest resistance in the intermediate frequency region. The height of the gold interdigitated electrode represented by curve 3 is 100 nm, and the height of the gold interdigitated electrode represented by other curves is 300 nm, so it can be basically concluded that the height of the gold interdigitated electrode is inversely proportional to the resistance of the gold interdigitated electrode .

Figure 8 shows frequency-impedance plots of gold interdigitated electrodes of different thicknesses. Among them, curve 6 is the phase distribution curve of the impedance of the gold interdigitated electrode at different frequencies; curve 7 is the frequency of the gold interdigitated electrode with a thickness of 300nm prepared by using a reverse etching current of 0.4A at different frequencies- Impedance curve; curve 8 is the frequency-impedance curve of gold interdigitated electrodes with a thickness of 700 nm prepared by using a reverse etching current of 0.4 A at different frequencies. It can be seen from Figure 8 that the change in the thickness of the gold interdigitated electrode at the nanoscale has a negligible effect on the resistance.

Referring to Figure 7 and Figure 8, with the change of the measurement frequency, the impedance of the interdigital electrode is mainly divided into three states, the double-layer capacitor, the structural resistance and the dielectric capacitor, which correspond to the low-frequency region of 183Hz to 1kHz and the low-frequency region of 1kHz to 50kHz, respectively. Mid-frequency region and high frequency region from 50kHz to 500kHz. Combined with the analysis of the corresponding phase curve, in the intermediate frequency region, the phase angle of the corresponding phase curve is very close to 0 degrees, and the capacitance characteristics can be ignored, which is a pure resistance circuit. It can be seen that the change of the impedance value in the intermediate frequency region of the interdigital electrode is almost equal to the change of the structural resistance.

In practical applications, using the above conclusions, if resistance measurement of the electrodeposited gold structure is required, the electrodeposited gold structure can be connected to an electrochemical workstation. The electrochemical workstation is used to apply an intermediate frequency sinusoidal voltage to the electrodeposited gold structure, and the impedance of the electrodeposited gold structure under the intermediate frequency sinusoidal voltage is obtained from the electrochemical workstation, and the impedance is the resistance of the electrodeposited gold structure.

In the above description, technical details such as patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not exactly the same as those described above. Additionally, although the various embodiments have been described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

Embodiments of the present disclosure have been described above. However, these examples are for illustrative purposes only, and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art can make various substitutions and modifications, and these substitutions and modifications should all fall within the scope of the present disclosure.

Claims (10)

1. a resistance characteristic analysis method of electrodeposited gold structure, is characterized in that, described method may further comprise the steps: A plurality of gold interdigitated electrodes are provided, and the resistance-related parameters of the plurality of gold interdigitated electrodes are different; Using an electrochemical workstation to detect the impedance of a plurality of the gold interdigitated electrodes under sinusoidal voltages with different frequencies; The resistance characteristics of the electrodeposited gold structure were analyzed according to the impedance of the plurality of gold interdigitated electrodes under sinusoidal voltages of different frequencies. 2. The method for analyzing resistance characteristics of electrodeposited gold structure according to claim 1, wherein the resistance-related parameters of each of the gold interdigitated electrodes are the height of the gold interdigitated electrode and the surface of the gold interdigitated electrode. roughness. 3. The resistance characteristic analysis method of electrodeposited gold structure according to claim 1, is characterized in that, the frequency range of described sinusoidal voltage is 100Hz to 500kHz, the amplitude of sinusoidal voltage is 5mV, and the DC bias voltage is 0V. 4. The resistance characteristic analysis method of the electrodeposited gold structure according to claim 1, wherein the providing a plurality of gold interdigitated electrodes comprises: Provides multiple golden interdigitated seeds; The plurality of interdigitated seeds are processed in a one-to-one correspondence under the control of a plurality of electrodeposition parameters by an electrochemical deposition method to obtain a plurality of gold interdigitated electrodes. 5 . The method for analyzing resistance characteristics of electrodeposited gold structures according to claim 4 , wherein the electrodeposition parameters include electrodeposition time, forward pulse plating current and reverse etching current. 6 . 6. the resistance characteristic analysis method of electrodeposited gold structure according to claim 5, is characterized in that, the electrodeposition time that each described electrodeposition parameter comprises is different; The magnitude and pulse width of the forward pulse electroplating current included in each of the electrodeposition parameters are the same; The magnitude and duration of the reverse etching current included in each of the electrodeposition parameters are different. 7. The method for analyzing resistance characteristics of electrodeposited gold structures according to claim 4, wherein the providing a plurality of gold interdigitated seeds comprises: provide a substrate; forming a gold seed layer on the substrate; The gold seed layer is patterned to obtain gold interdigitated seeds. 8. The method for analyzing resistance characteristics of an electrodeposited gold structure according to claim 7, wherein the forming a gold seed layer on the substrate comprises: defining an interdigital region on the substrate; A gold seed layer is electroplated on the interdigitated region by electroplating. 9 . The method for analyzing resistance characteristics of an electrodeposited gold structure according to claim 8 , wherein the electroplating solution is an inorganic salt solution of gold. 10 . 10 . The method for analyzing resistance characteristics of an electrodeposited gold structure according to claim 8 , wherein the pH of the electroplating solution is 6.5-7.5, and the temperature of the electroplating solution is 25° C. to 55° C. 11 .

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